CN114334883A - 半导体装置 - Google Patents

半导体装置 Download PDF

Info

Publication number
CN114334883A
CN114334883A CN202111121122.2A CN202111121122A CN114334883A CN 114334883 A CN114334883 A CN 114334883A CN 202111121122 A CN202111121122 A CN 202111121122A CN 114334883 A CN114334883 A CN 114334883A
Authority
CN
China
Prior art keywords
semiconductor device
semiconductor element
semiconductor
wire
opposing portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111121122.2A
Other languages
English (en)
Inventor
北林拓也
益本宽之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN114334883A publication Critical patent/CN114334883A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/049—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being perpendicular to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5386—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48095—Kinked
    • H01L2224/48096—Kinked the kinked part being in proximity to the bonding area on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48111—Disposition the wire connector extending above another semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/48175—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/4917—Crossed wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10254—Diamond [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1027—IV
    • H01L2924/10272—Silicon Carbide [SiC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/1033—Gallium nitride [GaN]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12032—Schottky diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12036—PN diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16196—Cap forming a cavity, e.g. being a curved metal foil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/171—Frame
    • H01L2924/1715—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Dispersion Chemistry (AREA)
  • Geometry (AREA)
  • Wire Bonding (AREA)

Abstract

目的在于提供能够实现半导体装置的小型化的技术。半导体装置具有：绝缘基板；第1半导体元件，其与绝缘基板连接；导电部件，其配置于绝缘基板之上，包含在俯视观察时相对于第1半导体元件而彼此位于相反侧的第1相对部分以及第2相对部分；第1导线，其连接于第1半导体元件之上以及第1相对部分之上；以及第2导线，其连接于第1半导体元件之上以及第2相对部分之上，在俯视观察时相对于第1导线与第1半导体元件之间的连接点而位于与第1导线相反侧。

Description

半导体装置
技术领域
本发明涉及半导体装置。
背景技术
近年来，伴随半导体元件的小型化以及表面积的减小化，有时无法在半导体元件之上键合足够根数的导线，每1根导线的电流密度增加。并且，由于由该电流密度的增加引起的导线的发热，有时损害半导体装置的可靠性。提出了各种用于解决这样的问题的技术。例如在专利文献1中提出了下述技术，即，通过在母线之上、半导体元件之上、母线之上对导线进行缝焊键合，从而在半导体元件之上键合通常的2倍根数的导线。
专利文献1：日本特开2009-206140号公报
但是，在专利文献1的技术中，设置有母线的绝缘层是与半导体元件分离地配置的。在这样的结构中，为了使得母线不会从绝缘层的上部错开，需要将绝缘层的尺寸设定得较大。其结果，存在半导体装置的小型化困难这一问题。
发明内容
因此，本发明就是鉴于上述这样的问题而提出的，其目的在于提供能够实现半导体装置的小型化的技术。
本发明涉及的半导体装置具有：绝缘基板；第1半导体元件，其与所述绝缘基板连接；导电部件，其配置于所述绝缘基板之上，包含在俯视观察时相对于所述第1半导体元件而彼此位于相反侧、且彼此电连接的第1相对部分以及第2相对部分；第1导线，其连接于所述第1半导体元件之上以及所述第1相对部分之上；以及第2导线，其连接于所述第1半导体元件之上以及所述第2相对部分之上，在俯视观察时相对于所述第1导线与所述第1半导体元件之间的连接点而位于与所述第1导线相反侧。
发明的效果
根据本发明，第2导线在俯视观察时相对于第1导线与第1半导体元件之间的连接点而位于与第1导线相反侧，导电部件配置于连接有第1半导体元件的绝缘基板之上。根据这样的结构，能够使半导体装置小型化。
附图说明
图1是表示实施方式1涉及的半导体装置的概略结构的剖视图。
图2是表示实施方式1涉及的半导体装置的结构的俯视图。
图3是表示实施方式1涉及的半导体装置的结构的侧视图。
图4是表示实施方式1涉及的半导体装置的结构的电路图。
图5是表示实施方式2涉及的半导体装置的结构的俯视图。
图6是表示实施方式3涉及的半导体装置的结构的俯视图。
图7是表示实施方式3涉及的半导体装置的结构的俯视图。
图8是表示实施方式4涉及的半导体装置的结构的俯视图。
图9是表示实施方式4涉及的半导体装置的结构的侧视图。
图10是表示实施方式5涉及的半导体装置的结构的俯视图。
图11是表示实施方式6涉及的半导体装置的结构的俯视图。
图12是表示实施方式6涉及的半导体装置的结构的侧视图。
图13是表示实施方式6涉及的半导体装置的结构的俯视图。
图14是表示实施方式7涉及的半导体装置的结构的俯视图。
具体实施方式
以下，一边参照附图一边对实施方式进行说明。在以下各实施方式中说明的特征都是例示，并非所有特征都是必须的。另外，在以下所示的说明中，在多个实施方式中，对相同的结构要素标注相同或者类似的标号，主要对不同的结构要素进行说明。另外，在以下所记载的说明中，“上”、“下”、“左”、“右”、“表”或者“背”等特定的位置和方向并非必须与实际实施时的方向一致。
＜实施方式1＞
下面，对本实施方式1涉及的半导体装置是半导体模块的情况进行说明。图1是表示本实施方式1涉及的半导体装置的概略结构的剖视图。此外，该图1是表示半导体装置的概略结构的图，因此，与图2及其后的图稍微不同。
图1的半导体装置具有基座板11、壳体12、盖部13、外部控制端子21、外部连接端子22、绝缘基板31、第1半导体元件33a、控制用导线34、发射极导线35、连接用导线36、封装材料37和多个电路图案32。此外，虽然在图1中未图示，但与第1半导体元件33a同样地，半导体装置具有第2半导体元件33b。
壳体12配置于由铜等金属构成的基座板11之上，将基座板11的一部分包围。通过基座板11以及壳体12而形成将第1半导体元件33a等收容于内部空间的容器体。盖部13通过将壳体12的开口堵塞，从而将容器体的内部空间密封。
外部控制端子21以及外部连接端子22各自例如由金属板等构成。外部控制端子21的一端位于壳体12的外部，与半导体装置的外部(例如外部端子)连接。外部控制端子21的另一端位于壳体12的内部、即容器体的内部空间，与半导体装置的内部的结构要素连接。同样地，外部连接端子22的一端位于壳体12的外部，外部连接端子22的另一端位于壳体12的内部。
在绝缘基板31的上表面之上以及下表面之上配置有由金属构成的电路图案32。此外，在绝缘基板31的上表面配置有彼此分离的多个电路图案32。
绝缘基板31经由绝缘基板31的下表面侧的电路图案32和焊料38a而与基座板11的被壳体12包围的部分连接。
第1半导体元件33a经由上表面侧的电路图案32和焊料38b而与绝缘基板31连接。第1半导体元件33a例如是IGBT(Insulated Gate Bipolar Transistor)以及MOSFET(MetalOxide Semiconductor Field Effect Transistor)等半导体开关元件。
控制用导线34将外部控制端子21中的位于内部空间的部分与在第1半导体元件33a之上配置的控制电极(例如栅极电极)连接。发射极导线35将在第1半导体元件33a之上配置的被控制电极(例如发射极电极)与电路图案32连接。连接用导线36将连接有发射极导线35的电路图案32与外部连接端子22中的位于内部空间的部分连接。
封装材料37例如是凝胶，将绝缘基板31、第1半导体元件33a、控制用导线34、发射极导线35、连接用导线36以及多个电路图案32等封装。
图2是表示本实施方式1涉及的半导体装置的结构的俯视图，图3是表示本实施方式1涉及的半导体装置的结构的侧视图。此外，在图2及图3中图示了图1的结构的一部分。
图1的绝缘基板31的上表面侧的电路图案32包含图2的集电极图案32a、发射极图案32b和控制用图案32c。此外，例如能够形成具有1mm左右的宽度的图案的湿蚀刻被用于集电极图案32a、发射极图案32b以及控制用图案32c等电路图案32的形成。
集电极图案32a是经由焊料38b而与第1半导体元件33a连接的电路图案32。此外，在图2中，与第1半导体元件33a同样地，图示了经由焊料38b而与集电极图案32a连接的第2半导体元件33b。第2半导体元件33b例如是PND(PN junction Diode)以及SBD(SchottkyBarrier Diode)等二极管。
发射极图案32b是包含第1相对部分32b1以及第2相对部分32b2的导电部件。第1相对部分32b1以及第2相对部分32b2在俯视观察时相对于第1半导体元件33a而彼此位于相反侧。此外，在图2的例子中，第2相对部分32b2相对于第1半导体元件33a而位于第1相对部分32b1的正对面，但如后面所述那样，不限于此。第1相对部分32b1以及第2相对部分32b2彼此电连接，具有相同电位。
控制用图案32c仅与外部控制端子21和第1半导体元件33a之间的控制用导线34连接。
图1的发射极导线35包含图2的第1导线即第1发射极导线35a以及第2导线即第2发射极导线35b。
第1发射极导线35a连接于第1半导体元件33a的被控制电极之上以及第1相对部分32b1之上。第2发射极导线35b连接于第1半导体元件33a的被控制电极之上以及第2相对部分32b2之上。
并且，如图2所示，第2发射极导线35b在俯视观察时相对于第1发射极导线35a与第1半导体元件33a之间的连接点而位于与第1发射极导线35a相反侧。在本实施方式1中，在俯视观察时，第1发射极导线35a的延伸方向与第2发射极导线35b的延伸方向形成平角(180度的角度)。但是，也可以如在实施方式7中说明的那样，在俯视观察时，第1发射极导线35a的延伸方向与第2发射极导线35b的延伸方向形成钝角(大于90度且小于180度的角度)。
此外，在图2的例子中，第1发射极导线35a以及第2发射极导线35b是被缝焊键合的1根导线，但不限于此，也可以是分离的。
第2半导体元件33b也与第1半导体元件33a同样地，通过第1发射极导线35a而与第1相对部分32b1连接，通过第2发射极导线35b而与第2相对部分32b2连接。
图4是与图2的结构对应的电路图。第2半导体元件33b即二极管与第1半导体元件33a即半导体开关元件并联连接，作为续流二极管起作用。
此外，图4的集电极配线41相当于图2的集电极图案32a。图4的发射极配线42相当于图2的发射极图案32b、第1发射极导线35a以及第2发射极导线35b。图4的控制配线43相当于图2的控制用图案32c以及控制用导线34。
＜实施方式1的汇总＞
根据上述这样的本实施方式1涉及的半导体装置，第2发射极导线35b在俯视观察时相对于第1发射极导线35a与第1半导体元件33a之间的连接点而位于与第1发射极导线35a相反侧。根据这样的结构，能够将导线依此键合至大致排列于一条直线上的发射极图案32b、第1半导体元件33a以及发射极图案32b。因此，即使在通常无法向第1半导体元件33a键合足够根数的导线的情况下，也能够对导线进行键合。因此，能够不使半导体装置大型化地维持导线的根数以及导线的发热，因而能够提高导线配线的可靠性。
另外，在本实施方式1中，在连接有第1半导体元件33a的绝缘基板31之上配置发射极图案32b。由此，能够减小俯视观察时的第1半导体元件33a与发射极图案32b之间的绝缘用的空间，因而能够使半导体装置小型化。另外，发射极图案32b的布局的变更变得容易，因此，能够提高半导体装置的制造中的通用性。
此外，本实施方式1涉及的半导体装置具有控制用图案32c，但也可以不具有控制用图案32c。但是，通过具有控制用图案32c，能够提高设计布局的自由度，因而能够期待半导体装置的进一步小型化。另外，本实施方式1涉及的半导体装置具有第2半导体元件33b，但也可以不具有第2半导体元件33b。
＜实施方式2＞
图5是表示本实施方式2涉及的半导体装置的结构的俯视图，是与图2对应的图。
如图5所示，本实施方式2涉及的半导体装置具有多个第1半导体元件33a以及多个第2半导体元件33b，但不具有控制用图案32c。
多个第1半导体元件33a各自与实施方式1的第1半导体元件33a同样地，通过第1发射极导线35a以及第2发射极导线35b而与发射极图案32b连接。由此，多个第1半导体元件33a彼此通过多个第1发射极导线35a、多个第2发射极导线35b、以及发射极图案32b而并联连接，因而能够并联驱动。同样地，多个第2半导体元件33b彼此通过多个第1发射极导线35a、多个第2发射极导线35b、以及发射极图案32b而并联连接。
根据上述这样的本实施方式2涉及的半导体装置，能够实现多个第1半导体元件33a的并联驱动，因此能够期待半导体装置的大容量化。
＜实施方式3＞
图6及图7是表示本实施方式3涉及的半导体装置的结构的俯视图，是与图2对应的图。
在本实施方式3中，与实施方式2的图5的结构中具有控制用图案32c的结构相同。也可以如图6所示，在多个第1半导体元件33a各自设置有控制用图案32c，也可以如图7所示，在多个第1半导体元件33a设置有共用的1个控制用图案32c。根据这样的结构，与实施方式2的结构相比，能够提高设计布局的自由度，因而，能够期待半导体装置的小型化。
此外，如本实施方式3所示，在控制用图案32c配置于集电极图案32a等其它电路图案32的端部的情况下，能够降低控制用导线34与其它电路图案32电连接的可能性。
＜实施方式4＞
图8是表示本实施方式4涉及的半导体装置的结构的俯视图，是与图2对应的图。图9是表示本实施方式4涉及的半导体装置的结构的侧视图，是与图3对应的图。
如图9所示，在本实施方式4中，多个第1半导体元件33a的控制电极之间的控制用导线34与控制电极缝焊键合。由此，在本实施方式4中，并非针对多个第1半导体元件33a分别设置多个控制用导线34，而是针对多个第1半导体元件33a设置1个控制用导线34。控制用导线34只要与大于或等于1个控制电极缝焊键合即可。根据上述这样的本实施方式4涉及的半导体装置，控制用导线34的配线变得容易。
另外，如图8所示，在本实施方式4中，控制用导线34从第1发射极导线35a中的远离第2发射极导线35b的一端至第2发射极导线35b中的远离第1发射极导线35a的一端为止之间的上方穿过。根据这样的结构，控制用导线34的配线变得容易。此外，也可以与图8的例子不同，在第1发射极导线35a以及第2发射极导线35b分离的情况下，构成为控制用导线34从第1发射极导线35a与第2发射极导线35b之间的部分的上方穿过。
＜实施方式5＞
图10是表示本实施方式5涉及的半导体装置的结构的俯视图，是与图2对应的图。
如图10所示，在本实施方式5中，第2半导体元件33b连接于第1半导体元件33a与第1相对部分32b1之间的第1发射极导线35a、或者第1半导体元件33a与第2相对部分32b2之间的第2发射极导线35b。
根据这样的本实施方式5涉及的半导体装置，第1半导体元件33a以及第2半导体元件33b共用第1发射极导线35a或者第2发射极导线35b。由此，能够减少半导体装置整体的导线的根数，因而能够期待半导体装置的小型化或者大容量化。
＜实施方式6＞
图11是表示本实施方式6涉及的半导体装置的结构的俯视图，是与图2对应的图。图12是表示本实施方式6涉及的半导体装置的结构的侧视图，是与图3对应的图。
实施方式1～5涉及的导电部件是包含第1相对部分32b1以及第2相对部分32b2的发射极图案32b。与此相对，本实施方式6涉及的导电部件如图11及图12所示包含发射极图案32b、第1铜块32b3以及第2铜块32b4，该发射极图案32b不包含第1相对部分32b1以及第2相对部分32b2。
如图12所示，第1铜块32b3以及第2铜块32b4对应于第1相对部分32b1以及第2相对部分32b2，经由焊料38c而配置于发射极图案32b之上。在仅通过焊料38c无法支撑第1铜块32b3以及第2铜块32b4的情况下，也可以如图12所示，在第1铜块32b3以及第2铜块32b4与集电极图案32a之间配置绝缘部件39。另外，也可以如图13所示，配置多个第1铜块32b3以及多个第2铜块32b4。
根据上述这样的本实施方式6涉及的半导体装置，能够使用不包含第1相对部分32b1以及第2相对部分32b2的发射极图案32b。由此，能够减小俯视观察时的第1半导体元件33a与第1相对部分32b1以及第2相对部分32b2之间的绝缘用的空间，因而能够使半导体装置小型化。
＜实施方式7＞
图14是表示本实施方式7涉及的半导体装置的结构的俯视图，是与图2对应的图。
在实施方式1～6中，在俯视观察时，第2相对部分32b2相对于第1半导体元件33a而位于第1相对部分32b1的正对面。并且，在俯视观察时，第1发射极导线35a的延伸方向与第2发射极导线35b的延伸方向形成平角。
与此相对，在本实施方式7中，如图14所示，在俯视观察时，相对于第1半导体元件33a，第2相对部分32b2从第1相对部分32b1的正对面的位置错开。并且，第1发射极导线35a的延伸方向与第2发射极导线35b的延伸方向形成钝角，它们之间的角度θ大于90度且小于180度。
根据上述这样的本实施方式7涉及的半导体装置，能够提高设计布局的自由度而不损害导线配线的可靠性，因而能够期待半导体装置的小型化或者大容量化。
＜实施方式8＞
在本实施方式8中，第1半导体元件33a以及第2半导体元件33b的至少任一者包含宽带隙半导体。宽带隙半导体例如包含碳化硅(SiC)、氮化镓(GaN)、金刚石。根据这样的本实施方式8，能够期待半导体装置的小型化以及并联化。
此外，能够对各实施方式以及各变形例自由地进行组合，或者对各实施方式以及各变形例适当地进行变形、省略。
标号的说明
21外部控制端子，31绝缘基板，32b发射极图案，32b1第1相对部分，32b2第2相对部分，32b3第1铜块，32b4第2铜块，32c控制用图案，33a第1半导体元件，33b第2半导体元件，34控制用导线，35a第1发射极导线，35b第2发射极导线。

Claims (9)

1.一种半导体装置，其具有：
绝缘基板；
第1半导体元件，其与所述绝缘基板连接；
导电部件，其配置于所述绝缘基板之上，包含在俯视观察时相对于所述第1半导体元件而彼此位于相反侧、且彼此电连接的第1相对部分以及第2相对部分；
第1导线，其连接于所述第1半导体元件之上以及所述第1相对部分之上；以及
第2导线，其连接于所述第1半导体元件之上以及所述第2相对部分之上，在俯视观察时相对于所述第1导线与所述第1半导体元件之间的连接点而位于与所述第1导线相反侧。
2.根据权利要求1所述的半导体装置，其中，
多个所述第1半导体元件彼此通过所述导电部件、多个所述第1导线、以及多个所述第2导线而并联连接。
3.根据权利要求1或2所述的半导体装置，其中，
该半导体装置还具有：
外部控制端子，其与所述半导体装置的外部连接；以及
控制用图案，其配置于所述绝缘基板之上，仅与所述外部控制端子和所述第1半导体元件之间的控制用导线连接。
4.根据权利要求2所述的半导体装置，其中，
所述多个第1半导体元件的控制电极之间的控制用导线与所述控制电极缝焊键合。
5.根据权利要求2所述的半导体装置，其中，
与所述第1半导体元件连接的控制用导线从所述第1导线中的远离所述第2导线的一端至所述第2导线中的远离所述第1导线的一端为止之间的上方穿过。
6.根据权利要求1或2所述的半导体装置，其中，
还具有第2半导体元件，该第2半导体元件配置于所述绝缘基板之上，与所述第1半导体元件和所述第1相对部分之间的所述第1导线、或者所述第1半导体元件和所述第2相对部分之间的所述第2导线连接。
7.根据权利要求1或2所述的半导体装置，其中，
所述导电部件包含：
发射极图案，其配置于所述绝缘基板之上；以及
第1铜块以及第2铜块，它们配置于所述发射极图案之上，分别对应于所述第1相对部分以及所述第2相对部分。
8.根据权利要求1至7中任一项所述的半导体装置，其中，
在俯视观察时，所述第1导线的延伸方向与所述第2导线的延伸方向形成钝角。
9.根据权利要求1至8中任一项所述的半导体装置，其中，
所述第1半导体元件包含宽带隙半导体。
CN202111121122.2A 2020-09-30 2021-09-24 半导体装置 Pending CN114334883A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2020-165305 2020-09-30
JP2020165305A JP7407684B2 (ja) 2020-09-30 2020-09-30 半導体装置

Publications (1)

Publication Number Publication Date
CN114334883A true CN114334883A (zh) 2022-04-12

Family

ID=80624587

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111121122.2A Pending CN114334883A (zh) 2020-09-30 2021-09-24 半导体装置

Country Status (4)

Country Link
US (1) US11784156B2 (zh)
JP (1) JP7407684B2 (zh)
CN (1) CN114334883A (zh)
DE (1) DE102021123205A1 (zh)

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0758272A (ja) 1993-08-20 1995-03-03 Origin Electric Co Ltd 電力用半導体装置
JPH0878619A (ja) 1994-09-07 1996-03-22 Hitachi Ltd 電力用半導体装置
JP4449219B2 (ja) 2001-01-04 2010-04-14 日産自動車株式会社 半導体実装構造
JP2006156479A (ja) 2004-11-25 2006-06-15 Toyota Motor Corp パワー半導体装置
JP2009206140A (ja) 2008-02-26 2009-09-10 Sumitomo Electric Ind Ltd パワーモジュール
JP6200759B2 (ja) 2013-10-09 2017-09-20 株式会社日立製作所 半導体装置およびその製造方法
KR102041645B1 (ko) * 2014-01-28 2019-11-07 삼성전기주식회사 전력반도체 모듈
JP2017107937A (ja) 2015-12-08 2017-06-15 三菱電機株式会社 電力用半導体装置
JP2018186302A (ja) 2018-08-20 2018-11-22 三菱電機株式会社 半導体装置およびそれを備える半導体モジュール
US10756207B2 (en) * 2018-10-12 2020-08-25 Transphorm Technology, Inc. Lateral III-nitride devices including a vertical gate module

Also Published As

Publication number Publication date
US11784156B2 (en) 2023-10-10
DE102021123205A1 (de) 2022-03-31
JP2022057189A (ja) 2022-04-11
JP7407684B2 (ja) 2024-01-04
US20220102312A1 (en) 2022-03-31

Similar Documents

Publication Publication Date Title
KR100430772B1 (ko) 반도체장치
US7443014B2 (en) Electronic module and method of assembling the same
US8587105B2 (en) Semiconductor device
US8546926B2 (en) Power converter
US20130207121A1 (en) Power conversion device
CN110546757B (zh) 电子元器件和半导体装置
US11133303B2 (en) Semiconductor device and semiconductor arrangement comprising semiconductor devices
KR20160110011A (ko) 반도체 장치 및 반도체 패키지
WO2018159018A1 (ja) 半導体装置
CN114334883A (zh) 半导体装置
US20220302074A1 (en) Semiconductor device
JP7353233B2 (ja) 半導体装置
KR101626534B1 (ko) 반도체 패키지 및 그 제조 방법
TW202226485A (zh) 半導體裝置
JP7209615B2 (ja) 半導体装置
JP2021197389A (ja) 半導体装置
CN115668508A (zh) 半导体装置
CN109564918B (zh) 半导体装置
US9362221B2 (en) Surface mountable power components
US11862553B2 (en) Semiconductor device
EP4270477A2 (en) Power module and method for manufacturing a power module
CN110299340B (zh) 半导体装置
WO2023090137A1 (ja) 半導体素子および半導体装置
CN109994445B (zh) 半导体元件和半导体装置
EP4113605A1 (en) Power semiconductor module arrangement

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination