CN114145080A - Chip component, method for manufacturing chip component, and method for manufacturing electronic device - Google Patents
Chip component, method for manufacturing chip component, and method for manufacturing electronic device Download PDFInfo
- Publication number
- CN114145080A CN114145080A CN202080052169.5A CN202080052169A CN114145080A CN 114145080 A CN114145080 A CN 114145080A CN 202080052169 A CN202080052169 A CN 202080052169A CN 114145080 A CN114145080 A CN 114145080A
- Authority
- CN
- China
- Prior art keywords
- electrode
- bonding
- chip component
- protruding
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 77
- 238000000034 method Methods 0.000 title claims description 76
- 229910000679 solder Inorganic materials 0.000 claims abstract description 144
- 239000000463 material Substances 0.000 claims abstract description 115
- 230000004907 flux Effects 0.000 claims description 88
- 238000010438 heat treatment Methods 0.000 claims description 20
- 239000000203 mixture Substances 0.000 claims description 10
- 230000002093 peripheral effect Effects 0.000 claims description 4
- 238000002844 melting Methods 0.000 description 19
- 230000008018 melting Effects 0.000 description 19
- 230000000052 comparative effect Effects 0.000 description 15
- 239000010949 copper Substances 0.000 description 13
- 229910052802 copper Inorganic materials 0.000 description 10
- 230000000694 effects Effects 0.000 description 9
- 239000000155 melt Substances 0.000 description 8
- 238000005476 soldering Methods 0.000 description 7
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 6
- 238000001816 cooling Methods 0.000 description 6
- 230000004048 modification Effects 0.000 description 6
- 238000012986 modification Methods 0.000 description 6
- 229910052709 silver Inorganic materials 0.000 description 5
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 229910052718 tin Inorganic materials 0.000 description 4
- 238000009736 wetting Methods 0.000 description 4
- 229910052742 iron Inorganic materials 0.000 description 3
- 238000007650 screen-printing Methods 0.000 description 3
- 238000003892 spreading Methods 0.000 description 3
- 230000007480 spreading Effects 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- DJOYTAUERRJRAT-UHFFFAOYSA-N 2-(n-methyl-4-nitroanilino)acetonitrile Chemical compound N#CCN(C)C1=CC=C([N+]([O-])=O)C=C1 DJOYTAUERRJRAT-UHFFFAOYSA-N 0.000 description 1
- RSWGJHLUYNHPMX-UHFFFAOYSA-N Abietic-Saeure Natural products C12CCC(C(C)C)=CC2=CCC2C1(C)CCCC2(C)C(O)=O RSWGJHLUYNHPMX-UHFFFAOYSA-N 0.000 description 1
- KHPCPRHQVVSZAH-HUOMCSJISA-N Rosin Natural products O(C/C=C/c1ccccc1)[C@H]1[C@H](O)[C@@H](O)[C@@H](O)[C@@H](CO)O1 KHPCPRHQVVSZAH-HUOMCSJISA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910002367 SrTiO Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 229910002113 barium titanate Inorganic materials 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- AOWKSNWVBZGMTJ-UHFFFAOYSA-N calcium titanate Chemical compound [Ca+2].[O-][Ti]([O-])=O AOWKSNWVBZGMTJ-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003985 ceramic capacitor Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- VEALVRVVWBQVSL-UHFFFAOYSA-N strontium titanate Chemical compound [Sr+2].[O-][Ti]([O-])=O VEALVRVVWBQVSL-UHFFFAOYSA-N 0.000 description 1
- KHPCPRHQVVSZAH-UHFFFAOYSA-N trans-cinnamyl beta-D-glucopyranoside Natural products OC1C(O)C(O)C(CO)OC1OCC=CC1=CC=CC=C1 KHPCPRHQVVSZAH-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/142—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals or tapping points being coated on the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/148—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals embracing or surrounding the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
- H01G2/02—Mountings
- H01G2/06—Mountings specially adapted for mounting on a printed-circuit support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
- H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/328—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
A chip component (1) is provided with: an electronic component (10) including a 1 st electrode (11) and a 2 nd electrode (12) arranged at a distance from the 1 st electrode in a 1 st direction (A); a 1 st bonding portion (21) bonded to the 1 st electrode; and a 2 nd bonding portion (22) bonded to the 2 nd electrode. The material constituting the 1 st joint portion and the 2 nd joint portion includes solder. The 1 st joint part has a 1 st protruding part (21A) protruding relative to the 1 st electrode in a 2 nd direction (B) intersecting the 1 st direction. The 2 nd joint has a 2 nd projecting portion (22A) projecting in the 2 nd direction with respect to the 2 nd electrode.
Description
Technical Field
The present disclosure relates to a chip (chip) component, a method of manufacturing the chip component, and a method of manufacturing an electronic apparatus.
Background
Miniaturization and high functionality are sought for electronic devices. Along with this, miniaturization is also demanded for electronic components soldered and mounted on a printed circuit board in electronic equipment. Miniaturized electronic components are mounted at higher density.
In jp 62-058030 a, the following methods are disclosed as a method for mounting a miniaturized electronic component on a printed circuit board: the electronic component is soldered to each electrode portion in advance to form a soldered portion, each soldered portion is arranged on each electrode portion of the printed circuit board, and each soldered portion is further melted in a far infrared furnace.
Prior art documents
Patent document
Patent document 1: japanese Kokai publication Sho 62-058030
Disclosure of Invention
Problems to be solved by the invention
However, when a miniaturized electronic component is mounted on a printed circuit board by the above-described conventional mounting method, it is difficult to suppress the occurrence of poor bonding at the solder bonding portion between the electronic component and the printed circuit board.
Specifically, in the above-described conventional mounting method, since the solder portions are formed by soldering the electrode portions, it is difficult to make the shapes of the solder portions formed on 1 electronic component uniform. Therefore, in a state where the solder portions are arranged on the electrode portions of the printed circuit board, the contact state between the solder portions and the electrode portions of the printed circuit board becomes uneven, and the timing at which the solder portions melt becomes uneven. In this case, in the solder joint portion between the electronic component and the printed wiring board, a positional shift of the electronic component with respect to the printed wiring board and a bonding failure such as a so-called chip mounting phenomenon are likely to occur.
A main object of the present disclosure is to provide a chip component and a method for manufacturing the same, in which occurrence of poor bonding between an electronic component and a solder bonding portion of a printed circuit board can be suppressed as compared with a chip component used in a conventional mounting method.
Another object of the present disclosure is to provide a method for manufacturing an electrical device, which can suppress the occurrence of poor bonding at a solder bonding portion between an electronic component and a printed circuit board, as compared with a conventional mounting method.
Means for solving the problems
The chip component according to the present disclosure includes: an electronic component including a 1 st electrode and a 2 nd electrode arranged at a distance from the 1 st electrode in a 1 st direction; a 1 st bonding portion, the 1 st bonding portion being bonded to the 1 st electrode; and a 2 nd bonding portion, the 2 nd bonding portion being bonded to the 2 nd electrode. The material constituting the 1 st joint portion and the 2 nd joint portion includes solder. The 1 st joint part has a 1 st protruding portion protruding relative to the 1 st electrode in a 2 nd direction intersecting the 1 st direction. The 2 nd bonding part has a 2 nd protruding portion protruding in the 2 nd direction with respect to the 2 nd electrode.
ADVANTAGEOUS EFFECTS OF INVENTION
According to the present disclosure, it is possible to provide a chip component in which the occurrence of poor bonding at the solder bonding portion between the electronic component and the printed circuit board can be suppressed as compared with a chip component used in a conventional mounting method, and a method for manufacturing the same, and it is also possible to provide a method for manufacturing an electrical device in which the occurrence of poor bonding at the solder bonding portion between the electronic component and the printed circuit board can be suppressed as compared with a conventional mounting method.
Drawings
Fig. 1 is a perspective view illustrating a chip component according to embodiment 1.
Fig. 2 is a cross-sectional view of the chip component shown in fig. 1.
Fig. 3 is a cross-sectional view showing a step of the method for manufacturing the chip component shown in fig. 1.
Fig. 4 is a cross-sectional view showing a step subsequent to the step shown in fig. 3 of the method for manufacturing a chip component shown in fig. 1.
Fig. 5 is a cross-sectional view showing a step subsequent to the step shown in fig. 4 of the method for manufacturing a chip component shown in fig. 1.
Fig. 6 is a cross-sectional view showing a step subsequent to the step shown in fig. 5 of the method for manufacturing a chip component shown in fig. 1.
Fig. 7 is a cross-sectional view showing a step subsequent to the step shown in fig. 6 of the method for manufacturing a chip component shown in fig. 1.
Fig. 8 is a sectional view showing an electronic device according to embodiment 1.
Fig. 9 is a cross-sectional view showing a step of the method for manufacturing the electronic device shown in fig. 8.
Fig. 10 is a cross-sectional view showing a step subsequent to the step shown in fig. 9 of the method of manufacturing the electronic device shown in fig. 8.
Fig. 11 is a cross-sectional view showing a step subsequent to the step shown in fig. 10 of the method of manufacturing the electronic device shown in fig. 8.
Fig. 12 is a cross-sectional view showing a chip component according to embodiment 2.
Fig. 13 is a cross-sectional view showing a step of the method for manufacturing the chip component shown in fig. 12.
Fig. 14 is a cross-sectional view showing a step subsequent to the step shown in fig. 13 in the method for manufacturing a chip component shown in fig. 12.
Fig. 15 is a cross-sectional view showing a step subsequent to the step shown in fig. 14 in the method for manufacturing a chip component shown in fig. 12.
Fig. 16 is a cross-sectional view showing a modification of the method for manufacturing the chip component shown in fig. 12.
Fig. 17 is a cross-sectional view showing a chip component according to embodiment 3.
Fig. 18 is a cross-sectional view showing a step of the method for manufacturing the chip component shown in fig. 17.
Fig. 19 is a cross-sectional view showing a step subsequent to the step shown in fig. 19 of the method for manufacturing a chip component shown in fig. 17.
Fig. 20 is a cross-sectional view showing a step subsequent to the step shown in fig. 20 in the method for manufacturing a chip component shown in fig. 18.
Fig. 21 is a cross-sectional view showing a chip component according to embodiment 4.
Fig. 22 is a cross-sectional view showing a modification of the chip component according to embodiment 1.
Fig. 23 is a cross-sectional view showing another modification of the chip component according to embodiment 1.
Fig. 24 is a cross-sectional view showing a chip component according to embodiment 5.
Fig. 25 is a plan view showing the chip component shown in fig. 24.
Fig. 26 is a sectional view showing a step of the method for manufacturing the electronic device shown in fig. 24.
Fig. 27 is a cross-sectional view showing a step subsequent to the step shown in fig. 26 in the method for manufacturing a chip component shown in fig. 24.
Fig. 28 is a cross-sectional view showing a step subsequent to the step shown in fig. 27 in the method for manufacturing a chip component shown in fig. 24.
Fig. 29 is a sectional view showing an electronic device according to embodiment 5.
Fig. 30 is a cross-sectional view showing a comparative example of the electronic device according to embodiment 5.
Fig. 31 is a cross-sectional view showing another comparative example of the electronic device according to embodiment 5.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding portions are denoted by the same reference numerals, and description thereof will not be repeated.
< construction of chip parts >
As shown in fig. 1 and 2, the chip component 1 according to embodiment 1 includes the electronic component 10 and the 1 st bonding part 21 and the 2 nd bonding part 22, and these parts are integrally formed.
The electronic component 10 includes a 1 st electrode 11, a 2 nd electrode 12, and a non-electrode portion 13. The 1 st electrode 11 and the 2 nd electrode 12 are arranged at intervals from each other in the 1 st direction a. The 1 st electrode 11 and the 2 nd electrode 12 constitute, for example, both end portions in the 1 st direction a of the electronic component 10. The material constituting the 1 st electrode 11 and the 2 nd electrode 12 is a conductive material, and includes, for example, copper (Cu). The material constituting the non-electrode portion 13 is, for example, a material having a lower electrical conductivity than the material constituting the 1 st electrode 11 and the 2 nd electrode 12.
The 1 st electrode 11 has: a 1 st surface 11A extending in a 1 st direction A and a 3 rd direction C in a 2 nd direction B; and a 2 nd surface 11B extending in the 1 st direction a and in the 2 nd direction B and the 3 rd direction C. The 2 nd direction B is a direction intersecting the 1 st direction a, and the 3 rd direction C is a direction intersecting the 1 st direction a and the 2 nd direction B. The 1 st direction a, the 2 nd direction B, and the 3 rd direction C are, for example, orthogonal to each other. The 2 nd direction B is, for example, a vertical direction.
The 2 nd electrode 12 has: a 3 rd surface 12A extending in the 1 st direction a and the 3 rd direction C toward the 2 nd direction B; and a 4 th surface 12B extending in the 1 st direction a and in the 2 nd direction B and the 3 rd direction C. The 3 rd surface 12A is disposed on the same plane as the 1 st surface 11A, for example. The 4 th surface 12B faces the opposite side of the 2 nd surface 11B in the 1 st direction a.
The electronic component 10 may have any configuration as long as it has the surface-mounted electronic component having the above-described configuration, and is, for example, a ceramic capacitor. In this case, the material constituting the non-electrode portion 13 is a ceramic dielectric, for example, barium titanate (BaTiO)3) Calcium titanate (CaTiO)3) Strontium titanate (SrTiO)3) And calcium zirconate (CaZrO)3) At least one of (a). The electronic component 10 may be configured as a resistor.
The 1 st bonding portion 21 is bonded to the 1 st electrode 11. The 1 st joint portion 21 is joined to at least a part of the 1 st surface 11A and the 2 nd surface 11B. The 1 st joining part 21 is joined to the entire 1 st surface 11A and a part of the 2 nd surface 11B, for example. The material constituting the 1 st joint portion 21 includes solder.
The 1 st bonding portion 21 has a 1 st protruding portion 21A protruding in the 2 nd direction B with respect to the 1 st surface 11A of the 1 st electrode 11. The 1 st protruding portion 21A has: a 1 st portion 21C disposed in a region overlapping with the 1 st electrode 11 in the 2 nd direction B; and a 2 nd portion 21D arranged in a region not overlapping with the 1 st electrode 11 in the 2 nd direction B and protruding with respect to the 2 nd surface 11B of the 1 st electrode 11 in the 1 st direction a. The 1 st portion 21C and the 2 nd portion 21D are connected to each other and integrally formed.
The 1 st bonding portion 21 further includes, for example, a portion that does not protrude in the 2 nd direction B with respect to the 1 st electrode 11, in other words, a 3 rd portion 21B that is arranged so as to overlap the 1 st electrode 11 in the 1 st direction a. The 3 rd portion 21B protrudes in the 1 st direction a with respect to the 2 nd surface 11B of the 1 st electrode 11. The 1 st projection 21A and the 3 rd projection 21B are integrally connected to each other. The 3 rd portion 21B is joined to, for example, a region on the 1 st face 11A side of the center of the 2 nd face 11B in the 2 nd direction B.
The top 21T of the 1 st engaging part 21, which is the longest distance from the 1 st surface 11A in the 2 nd direction B, is included in the 1 st protruding part 21A. For example, the top portion 21T is included in the 1 st portion 21C of the 1 st protruding portion 21A.
The outermost peripheral surface of the 1 st projecting portion 21A is a curved surface when viewed from the 3 rd direction C. When the 1 st projecting portion 21A is arranged on a plane extending along the 1 st direction a and the 3 rd direction C, the top 21T of the 1 st projecting portion 21A is formed in line contact with the plane. In the 1 st projecting portion 21A, line contact is made with the above-mentioned plane. The 1 st protruding portion 21A is configured as a part of a cylinder extending in the 3 rd direction C.
The 2 nd bonding portion 22 is bonded to the 2 nd electrode 12. The 2 nd joining part 22 is joined to at least a part of the 3 rd surface 12A and the 4 th surface 12B. The 2 nd joining part 22 is joined to the entire 3 rd surface 12A and a part of the 4 th surface 12B, for example. The material constituting the 2 nd bonding part 22 includes solder.
The 2 nd bonding part 22 has a 2 nd projecting portion 22A projecting in the 2 nd direction B with respect to the 3 rd face 12A of the 2 nd electrode 12. The 2 nd projection 22A has: a 4 th portion 22C disposed in a region overlapping with the 2 nd electrode 12 in the 2 nd direction B; and a 5 th portion 22D which is arranged in a region not overlapping with the 2 nd electrode 12 in the 2 nd direction B and protrudes in the 1 st direction a with respect to the 4 th surface 12B of the 2 nd electrode 12. The 4 th part 22C and the 5 th part 22D are connected to each other and integrally formed.
The 2 nd bonding portion 22 further includes, for example, a portion that does not protrude in the 2 nd direction B with respect to the 2 nd electrode 12, in other words, a 6 th portion 22B that is arranged so as to overlap the 2 nd electrode 12 in the 1 st direction a. The 6 th portion 22B protrudes in the 1 st direction a with respect to the 4 th face 12B of the 2 nd electrode 12. The 2 nd projection 22A and the 6 th projection 22B are connected to each other and integrally formed. The 6 th portion 22B is joined to, for example, a region on the 3 rd surface 12A side of the center of the 4 th surface 12B in the 2 nd direction B.
The 2 nd projecting portion 22A includes a top 22T of the 2 nd engaging portion 22, which is the longest distance from the 3 rd face 12A in the 2 nd direction B. For example, the top 22T is included in the 4 th part 22C of the 2 nd projection 22A.
The outermost peripheral surface of the 2 nd projecting portion 22A is a curved surface when viewed from the 3 rd direction C. When the 2 nd projecting portion 22A is arranged on a plane extending along the 1 st direction a and the 3 rd direction C, the top 22T of the 2 nd projecting portion 22A is formed in line contact with the plane. The 2 nd projecting portion 22A is constituted as a part of a cylinder extending in the 3 rd direction C.
As shown in fig. 2, when viewed from the 3 rd direction C, the height h1 of the 1 st protruding portion 21A in the 2 nd direction B with respect to the 1 st face 11A of the 1 st electrode 11 is equal to the height h2 of the 2 nd protruding portion 22A in the 2 nd direction B with respect to the 3 rd face 12A of the 2 nd electrode 12.
As shown in fig. 2, the distance L1 in the 1 st direction a between the top 21T of the 1 st protruding portion 21A and the top 22T of the 2 nd protruding portion 22A is equal to or greater than the shortest distance L2 in the 1 st direction a between the 1 st electrode 11 and the 2 nd electrode 12 (in other words, the width of the non-electrode portion 13 in the 1 st direction a). The distance L1 is equal to or less than the longest distance L3 in the 1 st direction a between the 1 st electrode 11 and the 2 nd electrode 12 (in other words, the shortest distance in the 1 st direction a between the 2 nd surface 11B of the 1 st electrode 11 and the 4 th surface 12B of the 2 nd electrode 12). From another point of view, the top portion 21T overlaps the 1 st surface 11A of the 1 st electrode 11 in the 2 nd direction B, and the top portion 22T overlaps the 3 rd surface 12A of the 2 nd electrode 12 in the 2 nd direction B.
As shown in fig. 2, the 1 st bonding portion 21 and the 2 nd bonding portion 22 are formed symmetrically with respect to a center line CL passing through the center between the 1 st electrode 11 and the 2 nd electrode 12 in the 1 st direction a and extending along the 2 nd direction B when viewed from the 3 rd direction C. The outline of the 1 st joint part 21 and the 2 nd joint part 22 is formed in a substantially arc shape, for example, when viewed from the 3 rd direction C.
The cross-sectional shape of the chip component 1 perpendicular to the 3 rd direction C is constant regardless of the position of the cross-section in the 3 rd direction C, for example.
The material constituting the 1 st bonding part 21 and the 2 nd bonding part 22 is, for example, lead-free solder. The material constituting the 1 st bonding part 21 and the 2 nd bonding part 22 contains, for example, tin (Sn), silver (Ag), and copper (Cu), and the alloy composition thereof is, for example, Sn-3.0% Ag-0.5% Cu. The material constituting the 1 st bonding portion 21 and the 2 nd bonding portion 22 may be any solder material, and may be, for example, a solder material obtained by adding at least one of Ag, Cu, bismuth (Bi), indium (In), antimony (Sb), and lead (Pb) to Sn. The 1 st bonding portion 21 and the 2 nd bonding portion 22 are formed by, for example, melting the mixture of the solder material and the flux and then cooling the mixture (details will be described later).
The size of the electronic component 10 is not particularly limited, and is, for example, 0603 (the length in the 1 st direction a (the distance L3) is 0.6mm and the length in the 3 rd direction C is 0.3mm), 0201 (the length in the 1 st direction a is 0.2mm and the length in the 3 rd direction C is 0.1mm), 1005 (the length in the 1 st direction a is 1.0mm and the length in the 3 rd direction C is 0.5mm), or 1608 (the length in the 1 st direction a is 1.6mm and the length in the 3 rd direction C is 0.8 mm).
< method for manufacturing chip component >
First, a mold 101 and a mask 102 shown in fig. 3 are prepared (step 1). The mold 101 has an upper surface 101A. The upper surface 101A is a plane extending in a direction intersecting the vertical direction. Hereinafter, the structure of the mold 101 will be described using the 1 st direction a, the 2 nd direction B, and the 3 rd direction C of the electronic component 10 in the 4 th step and the 5 th step (details will be described later) of disposing the electronic component 10 on the mold 101.
The mold 101 has a 1 st recess 201 and a 2 nd recess 202 recessed from the upper surface 101A. The 1 st recessed portion 201 and the 2 nd recessed portion 202 of the mold 101 are used to mold a bonding material described later into the 1 st bonding portion 21 and the 2 nd bonding portion 22 of the chip component 1. The 1 st recess 201 and the 2 nd recess 202 are arranged at intervals from each other in the 1 st direction a. The depth of the 1 st recess 201 is equal to the height h1 of the 1 st bonding portion 21 of the chip component 1. The depth of the 2 nd recessed portion 202 is equal to the height h2 of the 2 nd engaging portion 22 of the chip component 1. The length of the 1 st recess 201 and the 2 nd recess 202 in the 3 rd direction C is equal to the length of the 1 st electrode 11 and the 2 nd electrode 12 in the 3 rd direction C, for example. The depth of the 1 st recess 201 is equal to the depth of the 2 nd recess 202. The 1 st concave portion 201 and the 2 nd concave portion 202 are formed symmetrically with respect to a center line CL2 passing through the center between the 1 st concave portion 201 and the 2 nd concave portion 202 in the 1 st direction a and extending along the 2 nd direction B. The length in the 1 st direction a between the center of the 1 st recess 201 and the center of the 2 nd recess 202 in the 1 st direction a is equal to the above-described distance L1 in the chip component 1.
The mask 102 has: a lower surface 102A in contact with the upper surface 101A of the mold 101; and an upper surface 102B located on the opposite side of the lower surface 102A. The lower surface 102A and the upper surface 102B are planes extending along the 1 st direction a and the 3 rd direction C. The mask 102 has a 1 st through hole 203 and a 2 nd through hole 204 extending from the lower surface 102A to the upper surface 102B. The 1 st through hole 203 is formed so as to be continuous with the 1 st recess 201 in the 2 nd direction B. The 2 nd through hole 204 is formed so as to be continuous with the 2 nd concave portion 202 in the 2 nd direction B. The width of the 1 st through hole 203 is equal to the width of the 1 st recess 201 in the 1 st direction a, for example. The width of the 2 nd through hole 204 is equal to the width of the 2 nd concave portion 202 in the 1 st direction a, for example. The width of the 1 st through hole 203 and the 2 nd through hole 204 in the 3 rd direction C is equal to the length of the 1 st electrode 11 and the 2 nd electrode 12 in the 3 rd direction C, for example. The 1 st through hole 203 and the 2 nd through hole 204 are formed symmetrically with respect to the center line CL 2.
The material constituting the mask 102 includes, for example, stainless steel (SUS). In other words, the mask 102 is, for example, a metal mask. The thickness of the mask 102, in other words, the length of each of the 1 st through hole 203 and the 2 nd through hole 204 in the 2 nd direction B is, for example, 100 μm.
Next, as shown in fig. 4, the bonding material 23 (1 st bonding material) to be the 1 st bonding portion 21 is supplied into the 1 st recess 201 and the 1 st through hole 203 by screen printing. Further, the bonding material 24 (2 nd bonding material) to be the 2 nd bonding portion 22 is supplied into the 2 nd recess 202 and the 2 nd through hole 204 by screen printing (2 nd step). The bonding material 23 is filled in the 1 st recess 201 and the 1 st through hole 203 without a gap. The bonding material 24 is filled in the 2 nd recess 202 and the 2 nd through hole 204 without a gap. The upper surfaces of the bonding materials 23 and 24 form the same plane as the upper surface 102B of the mask 102, for example.
The bonding material 23 is, for example, a mixture of a plurality of solder balls 25 and flux 26. The bonding material 24 is, for example, a mixture of a plurality of solder balls 27 and flux 28. The solder balls 25, 27 are made of, for example, lead-free solder. The solder balls 25, 27 are made of a material containing, for example, Sn, Ag, and Cu, and the alloy composition thereof is, for example, Sn-3.0% Ag-0.5% Cu. The outer diameter of each solder ball 25, 27 is, for example, 30 μm. The sum of the volumes of the solder balls 25 is larger than the volume of the 1 st concave portion 201. The sum of the volumes of the solder balls 27 is larger than the volume of the 2 nd concave portion 202. The material constituting the fluxes 26, 28 contains rosin. The solder 36, 28 fills the gap between the solder balls 25, 27.
Next, as shown in fig. 5, the mask 102 is separated from the mold 101. The bonding materials 23, 24 protrude in the 2 nd direction B with respect to the mold 101. The height of the bonding material 23 in the 2 nd direction B with respect to the mold 101 is equal to the height of the bonding material 24 in the 2 nd direction B with respect to the mold 101.
Next, as shown in fig. 6, the electronic component 10 is prepared (step 3). Next, as shown in fig. 6, the electronic component 10 is disposed on the upper surface 101A of the mold 101 (step 4). The electronic component 10 is positioned with respect to the mold 101 and the joining materials 23, 24 in such a manner that the above-described center line CL of the electronic component 10 overlaps the above-described center line CL2 of the mold 101 when viewed from the 3 rd direction C.
The 1 st electrode 11 of the electronic component 10 is disposed in a part of the 1 st recess 201 located on the 2 nd recess 202 side in the 1 st direction a. In other words, in the state shown in fig. 6, the bonding material 23 has: a portion which is arranged inside the electronic component 10 with respect to the 2 nd surface 11B in the 1 st direction a and is arranged to overlap the 1 st electrode 11 in the 2 nd direction B; and a portion which is arranged outside the electronic component 10 in the 1 st direction a with respect to the 2 nd surface 11B and which is arranged so as not to overlap with the 1 st electrode 11 in the 2 nd direction B.
The 2 nd electrode 12 of the electronic component 10 is disposed in a part of the 2 nd recess 202 located on the 1 st recess 201 side in the 1 st direction a. In other words, in the state shown in fig. 6, the joining material 24 has: a portion which is disposed on the inner side of the electronic component 10 with respect to the 4 th surface 12B in the 1 st direction a and which is disposed so as to overlap the 2 nd electrode 12 in the 2 nd direction B; and a portion which is arranged outside the electronic component 10 with respect to the 4 th surface 12B in the 1 st direction a and which is arranged so as not to overlap with the 2 nd electrode 12 in the 2 nd direction B.
The 1 st surface 11A of the 1 st electrode 11 is in contact with the upper surface of a part of the bonding material 23 located on the bonding material 24 side in the 1 st direction a. Meanwhile, the 3 rd surface 12A of the 2 nd electrode 12 is in contact with the above-mentioned upper surface of a part of the bonding material 24 located on the bonding material 23 side in the 1 st direction a. The lower surface of the non-electrode portion 13 of the electronic component 10, that is, the surface connected to the 1 st surface 11A of the 1 st electrode 11 and the 3 rd surface 12A of the 2 nd electrode 12, is in contact with the upper surface 102B of the mask 102. The non-electrode portion 13 of the electronic component 10 is disposed between the bonding material 23 and the bonding material 24 in the 1 st direction a, and is spaced apart from the upper surface 101A of the mold 101 in the 2 nd direction B.
Next, the 1 st bonding portion 21 and the 2 nd bonding portion 22 are formed by the bonding materials 23 and 24 (step 5). First, the bonding materials 23 and 24 are heated and melted. The heating may be performed by any method, for example, by putting the entire mold 101, the electronic component 10, and the bonding materials 23 and 24 shown in fig. 6 into a reflow furnace and heating the entire material. The heating temperature is a temperature higher than the melting point of the materials constituting the bonding materials 23 and 24 and tolerable for the electronic component 10, and is 250 ℃. By the heating, the solder balls 25 and 27 and the fluxes 26 and 28 are entirely melted. As a result, the electronic component 10 receives the force of gravity, and the non-electrode portion 13 is lowered until it comes into contact with the upper surface 101A of the mold 101. A part of the molten bonding material 23 wets and spreads (wet-spread) on the 2 nd surface 11B of the 1 st electrode 11. A part of the molten bonding material 24 wets and spreads on the 4 th surface 12B of the 2 nd electrode 12.
Here, the bonding material 23 before melting has: a portion which is arranged inside the electronic component 10 with respect to the 2 nd surface 11B in the 1 st direction a and is arranged to overlap the 1 st electrode 11 in the 2 nd direction B; and a portion which is arranged outside the electronic component 10 in the 1 st direction a with respect to the 2 nd surface 11B and is arranged so as not to overlap the 1 st electrode 11 in the 2 nd direction B, the bonding material 23 after melting is likely to wet and spread on the 2 nd surface 11B of the 1 st electrode 11. Also, since the joining material 24 before melting has: a portion which is disposed on the inner side of the electronic component 10 with respect to the 4 th surface 12B in the 1 st direction a and which is disposed so as to overlap the 2 nd electrode 12 in the 2 nd direction B; and a portion which is arranged outside the electronic component 10 in the 1 st direction a with respect to the 4 th surface 12B and is arranged so as not to overlap the 2 nd electrode 12 in the 2 nd direction B, the bonding material 24 after melting is likely to wet and spread on the 4 th surface 12B of the 2 nd electrode 12.
The joining materials 23, 24 are cooled after being melted. The cooling may be performed by any method, for example, by taking out the entire mold 101, the electronic component 10, and the bonding materials 23 and 24 from the reflow furnace. As a result, chip component 1 including electronic component 10, 1 st bonding part 21 formed of bonding material 23, and 2 nd bonding part 22 formed of bonding material 24 is manufactured as shown in fig. 7. After the above-described step 5, the chip component 1 is taken out from the mold 101.
< construction of electronic apparatus >
The electronic device 3 according to embodiment 1 is manufactured by mounting the chip component 1 according to embodiment 1 on the printed circuit board 2. As shown in fig. 8, the electronic device 3 includes the electronic component 10, the printed circuit board 2, the 3 rd joint portion 41, and the 4 th joint portion 42.
The printed circuit board 2 includes a dielectric substrate and wiring patterns formed on the surface and inside of the dielectric substrate. The dielectric substrate has an upper surface 2A. The upper surface 2A is a plane extending along the 1 st direction a and the 3 rd direction C. The printed circuit board 2 includes a 3 rd electrode 31 and a 4 th electrode 32 which are formed on the upper surface 2A and constitute a part of the wiring pattern. The 3 rd electrode 31 and the 4 th electrode 32 are arranged at intervals in the 1 st direction a. The 3 rd electrode 31 and the 4 th electrode 32 are made of a conductive material, and include, for example, Cu. The 3 rd electrode 31 has a surface in contact with the upper surface 2A and a 9 th surface 31A located on the opposite side to the surface. The 4 th electrode 32 has a surface in contact with the upper surface 2A and a 10 th surface 32A located on the opposite side to the surface. The height of the 3 rd electrode 31 in the 2 nd direction B with respect to the upper surface 2A is, for example, equal to the height of the 4 th electrode 32 in the 2 nd direction B with respect to the upper surface 2A.
The 1 st electrode 11 of the electronic component 10 is disposed so as to overlap the 3 rd electrode 31 in the 2 nd direction B. The 2 nd electrode 12 of the electronic component 10 is disposed so as to overlap the 4 th electrode 32 in the 2 nd direction B. When viewed from the 3 rd direction C, the electronic component 10 is arranged such that the above-described center line CL overlaps with a center line CL3 passing through the center between the 3 rd electrode 31 and the 4 th electrode 32 in the 1 st direction a and extending along the 2 nd direction B.
The 3 rd bonding portion 41 is bonded to the 1 st electrode 11 and the 3 rd electrode 31. The 3 rd joint portion 41 is joined to the entire 1 st surface 11A, the entire 2 nd surface 11B, and the entire 9 th surface 31A, for example. The 4 th bonding portion 42 is bonded to the 2 nd electrode 12 and the 4 th electrode 32. The 4 th joint portion 42 is joined to the entire 3 rd surface 12A, the entire 4 th surface 12B, and the entire 10 th surface 32A, for example. The 3 rd engaging part 41 and the 4 th engaging part 42 are formed symmetrically with respect to the above-described center line CL3 when viewed from the 3 rd direction C.
The material constituting the 3 rd bonding portion 41 and the 4 th bonding portion 42 includes solder. The 3 rd bonding portion 41 is formed by the 1 st bonding portion 21 of the chip component 1 and the flux 33 described later. The 4 th bonding portion 42 is formed by the 2 nd bonding portion 22 of the chip component 1 and the flux 34 described later.
< method for manufacturing electronic device >
The electronic device 3 shown in fig. 8 is manufactured by the method for manufacturing the electronic device 3 shown in fig. 9 and 10.
First, chip component 1 and printed circuit board 2 shown in fig. 9 are prepared (step 7). On the printed circuit board 2, a 3 rd electrode 31 and a 4 th electrode 32 are formed.
Next, as shown in fig. 10, the solder 33 is formed on the 3 rd electrode 31 of the printed circuit board 2, and the solder 34 is formed on the 4 th electrode 32. The flux 33 is formed to cover the 3 rd electrode 31, for example. The flux 34 is formed to cover the 4 th electrode 32, for example.
Next, as shown in fig. 11, the chip component 1 is disposed on the printed circuit board 2 shown in fig. 10 (step 8). The chip component 1 is positioned with respect to the printed circuit board 2 in such a manner that the center line CL overlaps the center line CL3 when viewed from the 3 rd direction C. The 1 st bonding portion 21 is disposed on the 3 rd electrode 31 and the flux 33. Meanwhile, the 2 nd bonding portion 22 is disposed on the 4 th electrode 32 and the flux 34.
Next, the 3 rd joint 41 is formed by the 1 st joint 21, and the 4 th joint 42 is formed by the 2 nd joint 22 (9 th step). First, as shown in fig. 11, the 1 st bonding part 21, the 2 nd bonding part 22, the flux 33, and the flux 34 are heated and melted. The heating may be performed by any method, for example, as shown in fig. 11, hot air is blown to the 1 st bonding part 21, the 2 nd bonding part 22, the flux 33, and the flux 34 through the nozzle 300. The nozzle 300 is disposed on the opposite side of the electronic component 10 from the printed circuit board 2, for example. The heating temperature is a temperature higher than the melting point of the materials constituting the 1 st bonding part 21, the 2 nd bonding part 22, the flux 33, and the flux 34 and tolerable for the electronic component 10, and is 250 ℃. By the heating, the 1 st bonding part 21, the 2 nd bonding part 22, the flux 33, and the flux 34 are entirely melted. Thereby, a part of the melted 1 st bonding portion 21 wets and spreads on the 2 nd surface 11B of the 1 st electrode 11. A part of the melted 2 nd bonding portion 22 wets and spreads on the 4 th surface 12B of the 2 nd electrode 12.
The 1 st joint part 21 and the 2 nd joint part 22 are cooled after melting. The cooling may be performed by any method, for example, by stopping the heating by the nozzle 300. As a result, as shown in fig. 8, the electronic device 3 including the electronic component 10, the printed circuit board 2, the 3 rd bonding portion 41 formed of the 1 st bonding portion 21 and the flux 33, and the 4 th bonding portion 42 formed of the 2 nd bonding portion 22 and the flux 34 is manufactured.
< action Effect >
The operation and effect of chip component 1 will be described below in comparison with comparative examples. First, the conventional chip component described above is considered as a comparative example. In the comparative example, each of the soldering portions for bonding with each of the electrodes of the printed circuit board was bonded by soldering with respect to each of the electrodes of the electronic component. Therefore, the respective soldered portions of the comparative examples did not protrude toward the printed circuit board side with respect to the respective electrodes of the electronic component, and it was difficult to improve the uniformity of the shape of the soldered portion bonded to the 1 st electrode and the shape of the soldered portion bonded to the 2 nd electrode. Therefore, in the comparative example, the variation is liable to occur in the state where each soldered portion is in contact with each electrode of the printed circuit board, and for example, the following state occurs: the solder portion bonded to the 1 st electrode is in contact with the 3 rd electrode of the printed circuit board, but the solder portion bonded to the 2 nd electrode is not in contact with the 4 th electrode of the printed circuit board. When the soldered portions are heated in such a state, variations occur in timing of melting of each soldered portion, and a problem (poor bonding) occurs such that the electronic component is displaced from the position where it should be originally arranged, or the electronic component is lifted up, and one of the electrodes is not bonded to the printed circuit board. Such poor bonding is particularly likely to occur in miniaturized electronic components. This is because, in a miniaturized electronic component, the bonding failure is likely to occur even if the degree of the deviation is small. The above-described poor bonding is a problem particularly in electronic components that are miniaturized. In addition, repair work when a defective bonding occurs is generally performed by so-called manual soldering using an iron, but it is difficult to appropriately bring the iron into contact with a miniaturized electronic component.
On the other hand, chip component 1 includes electronic component 10, 1 st bonding portion 21, and 2 nd bonding portion 22. The material constituting the 1 st bonding portion 21 and the 2 nd bonding portion 22 includes solder. The 1 st joint part 21 has a 1 st protruding portion 21A protruding with respect to the 1 st electrode 11 in a 2 nd direction B intersecting the 1 st direction a. The 2 nd bonding part 22 has a 2 nd projecting portion 22A projecting in the 2 nd direction B with respect to the 2 nd electrode 12. Therefore, the 1 st bonding portion 21 and the 2 nd bonding portion 22 of the chip component 1 can be reliably brought into contact with the 3 rd electrode 31 and the 4 th electrode 32, as compared with the soldering portion of the comparative example. For example, when the printed circuit board 2 is warped, the 1 st bonding portion 21 and the 2 nd bonding portion 22 of the chip component 1 can be brought into contact with the 3 rd electrode 31 and the 4 th electrode 32. Therefore, when the 1 st joining part 21 and the 2 nd joining part 22 are melted in the method of manufacturing the electronic device 3, the variation in timing of melting the 1 st joining part 21 and the 2 nd joining part 22 is suppressed as compared with the comparative example. That is, according to chip component 1, occurrence of bonding failure such as displacement of electronic component 10 and tilting of the electronic component in electronic device 3 can be suppressed.
Further, the 1 st engaging part 21 including the 1 st protruding part 21A and the 2 nd engaging part 22 including the 2 nd protruding part 22A can be easily manufactured using the mold 101. Thus, the chip component 1 can be manufactured relatively easily. In addition, the uniformity of the shape of the 1 st joining part 21 and the 2 nd joining part 22 was improved as compared with the uniformity of each brazed part in the above comparative example formed by brazing without using the die 101. In addition, the uniformity of the shapes of the 1 st bonding part 21 and the 2 nd bonding part 22 between the plurality of chip components 1 manufactured using the same mold 101 is improved as compared with the uniformity of the respective soldered portions between the plurality of comparative examples.
In the chip component 1, when viewed from the 3 rd direction C, the height h1 of the 1 st protruding part 21A in the 2 nd direction B with respect to the 1 st electrode 11 is equal to the height h2 of the 2 nd protruding part 22A in the 2 nd direction B with respect to the 2 nd electrode 12.
The 1 st joining part 21 and the 2 nd joining part 22 are in contact with each other uniformly with respect to the 1 st plane. Thus, the chip component 1 is suitable for bonding with the printed circuit board 2 in which the upper surfaces of the 3 rd electrode 31 and the 4 th electrode 32 are arranged on the same plane.
In the chip component 1, the 1 st bonding part 21 and the 2 nd bonding part 22 are formed symmetrically with respect to a center line CL passing through the center between the 1 st electrode 11 and the 2 nd electrode 12 in the 1 st direction a and extending along the 2 nd direction B when viewed from the 3 rd direction C.
The 3 rd bonding portion 41 and the 4 th bonding portion 42 of the electronic device 3 manufactured using such chip components 1 may be formed symmetrically with respect to the center line CL. Therefore, the bonding reliability of the 3 rd bonding portion 41 and the 4 th bonding portion 42 in the electronic device 3 is improved as compared with the bonding reliability of the conventional electronic device manufactured by using the above-described comparative example.
In the chip component 1, the outermost peripheral surfaces of the 1 st protruding portion 21A and the 2 nd protruding portion 22A as viewed from the 3 rd direction C are curved surfaces. More specifically, when the 1 st protruding part 21A and the 2 nd protruding part 22A are arranged on planes extending in the 1 st direction a and the 3 rd direction C, respectively, the 1 st protruding part 21A and the 2 nd protruding part 22A are formed in point contact or line contact with the planes, respectively.
If the 1 st protruding portion 21A and the 2 nd protruding portion 22A are in surface contact with the flat surface, the uniformity is improved if the planar area of the 1 st protruding portion 21A in contact with the flat surface and the planar area of the 2 nd protruding portion 22A in contact with the flat surface are the same. In contrast, when the 1 st protruding portion 21A and the 2 nd protruding portion 22A are in line contact with the plane, the uniformity is improved if the linear region in the 1 st protruding portion 21A in contact with the plane and the linear region in the 2 nd protruding portion 22A in contact with the plane are parallel to each other.
In addition, when the 1 st protruding part 21A and the 2 nd protruding part 22A are in point contact with the plane, the relative positional relationship between the dot region of the 1 st protruding part 21A in contact with the plane and the dot region of the 2 nd protruding part 22A in contact with the plane is not particularly limited, and the uniformity is improved.
In the chip component 1, the top 21T of the 1 st projecting part 21A in the 2 nd direction B is arranged so as to overlap the 1 st electrode 11 in the 2 nd direction B. Further, the top 22T of the 2 nd projecting portion 22A in the 2 nd direction B is arranged so as to overlap with the 2 nd electrode 12 in the 2 nd direction B. In other words, when viewed from the 3 rd direction C, the top portion 21T is disposed inside the electronic component 10 with respect to the 2 nd surface 11B, and the top portion 22T is disposed inside the electronic component 10 with respect to the 4 th surface 12B.
In the method of manufacturing the electronic device 3, the surface tension of each of the melted 1 st bonding portion 21 and 2 nd bonding portion 22 acts on the electronic component 10. When the 1 st joining part 21 and the 2 nd joining part 22 are formed symmetrically with respect to the center line CL as viewed in the 3 rd direction C and when the timing at which the 1 st joining part 21 melts and the timing at which the 2 nd joining part 22 melts can be made to coincide completely, the surface tension of the melted 1 st joining part 21 cancels the surface tension of the melted 2 nd joining part 22. However, even when the 1 st joint part 21 and the 2 nd joint part 22 are formed symmetrically with respect to the center line CL as viewed from the 3 rd direction C, it is difficult to completely match the timing at which the 1 st joint part 21 melts with the timing at which the 2 nd joint part 22 melts, and the timings are usually slightly different. When the 1 st joining part 21 is melted earlier than the 2 nd joining part 22, the surface tension of the melted 1 st joining part 21 acts on the electronic component 10. Further, surface tension (hereinafter referred to as "2 nd surface tension") acting on the bonding material wetting and spreading on the 2 nd surface 11B among the melted 1 st bonding parts 21 acts to reduce the angle of the 2 nd surface 11B of the electronic component 10 with respect to the upper surface 2A of the printed circuit board 2. That is, the 2 nd surface tension acts, resulting in a so-called tombstoning phenomenon. On the other hand, the surface tension (hereinafter referred to as "1 st surface tension") acting on the bonding material wetting and spreading on the 1 st surface 11A in the molten 1 st bonding portion 21 acts, thereby suppressing the tombstoning phenomenon.
That is, even when the timing of melting the 1 st welded part 21 and the timing of melting the 2 nd welded part 22 do not completely coincide with each other and the 2 nd surface tension is larger than the 1 st surface tension, the tombstoning phenomenon can be suppressed when the difference between the 2 nd surface tension and the 1 st surface tension is smaller than the force required to cause the tombstoning phenomenon. In order to realize such a configuration, in the chip component 1, the top portion 21T of the 1 st protruding part 21A in the 2 nd direction B is arranged so as to overlap the 1 st electrode 11 in the 2 nd direction B, and the top portion 22T of the 2 nd protruding part 22A in the 2 nd direction B is arranged so as to overlap the 2 nd electrode 12 in the 2 nd direction B.
When the top portion 21T is disposed on the inner side of the electronic component 10 with respect to the 2 nd surface 11B, the 1 st surface tension becomes larger because the amount of the bonding material wetting and spreading on the 1 st surface 11A becomes larger than when the top portion 21T is disposed on the outer side of the electronic component 10 with respect to the 2 nd surface 11B. Therefore, the difference between the 2 nd surface tension and the 1 st surface tension in the former case is smaller than the difference between the 2 nd surface tension and the 1 st surface tension in the latter case. As a result, chip component 1 can suppress the occurrence of warpage of electronic component 10 in electronic device 3. The same effects as described above are exhibited also when the top portion 22T is disposed so as to overlap the 2 nd electrode 12 in the 2 nd direction B.
In the manufacturing method of the chip component 1, the 1 st bonding part 21 including the 1 st protruding part 21A and the 2 nd bonding part 22 including the 2 nd protruding part 22A are easily formed from the bonding materials 23, 24 arranged in the 1 st recess 201 and the 2 nd recess 202, respectively, by using the mold 101. In addition, the shape variations of the 1 st bonding portion 21 and the 2 nd bonding portion 22 among the plurality of chip components 1 manufactured by the method for manufacturing the chip components 1 are reduced as compared with the shape variations of the comparative example manufactured by soldering using a soldering iron.
In the manufacturing method of chip component 1, bonding materials 23, 24 comprise a mixture of solder balls and solder flux, respectively. Accordingly, even when a natural oxide film is formed on the surfaces of the 1 st electrode 11 and the 2 nd electrode 12 of the electronic component 10, the 1 st bonding portion 21 is reliably formed in a predetermined region of the 1 st electrode 11.
In the manufacturing method of the electronic device 3, by using the chip component 1, the 1 st protruding part 21A of the 1 st bonding part 21 is connected to the 3 rd electrode 31, and the 2 nd protruding part 22A of the 2 nd bonding part 22 is connected to the 4 th electrode 32, and thereafter, the 1 st bonding part 21 and the 2 nd bonding part 22 are melted. Therefore, the variation in the timing of melting the 1 st joining part 21 and the 2 nd joining part 22 is suppressed from the variation in the timing of melting in the above comparative example, and the timing of melting the 1 st joining part 21 may be the same as the timing of melting the 2 nd joining part 22. Therefore, in the method for manufacturing the electronic device 3, it is possible to suppress occurrence of a bonding failure such as the electronic component 10 being displaced from the position where it should be originally arranged or the electronic component being lifted up and one of the electrodes not being bonded to the printed circuit board, as compared with the method for manufacturing the conventional electronic device using the above-described comparative example.
As shown in fig. 12, chip component 4 according to embodiment 2 has basically the same configuration as chip component 1 according to embodiment 1, but differs from chip component 1 in that it includes 1 st bonding part 51 and 2 nd bonding part 52 instead of 1 st bonding part 21 and 2 nd bonding part 22.
The 1 st bonding portion 51 has basically the same configuration as the 1 st bonding portion 21, but is different from the 1 st bonding portion 21 in that it is formed of a solder ball 61 and a flux 63. The 2 nd bonding portion 52 has basically the same configuration as the 2 nd bonding portion 22, but is different from the 2 nd bonding portion 22 in that it is formed of a solder ball 62 and a flux 64.
First, a mold 101 shown in fig. 13 is prepared (step 1). The mold 101 has the same configuration as the mold 101 shown in fig. 3. Next, the solder ball 61 is supplied to the inside of the 1 st concave portion 201 of the mold 101, and the solder ball 62 is supplied to the inside of the 2 nd concave portion 202 of the mold 101 (2 nd step). The outer diameter of each solder ball 61, 62 is equal to or larger than the width of the 1 st electrode 11 and the 2 nd electrode 12 in the 1 st direction a and equal to or smaller than the width of the 1 st concave portion 201 and the 2 nd concave portion 202 in the 1 st direction a, and is, for example, 0.2 mm. The volume of each solder ball 61 is larger than the volume of the 1 st concave portion 201. The volume of the solder ball 62 is greater than the volume of the 2 nd recess 202. The solder balls 61, 62 are made of, for example, lead-free solder. The solder balls 61, 62 are made of a material containing, for example, Sn, Ag, and Cu, and the alloy composition thereof is, for example, Sn-3.0% Ag-0.5% Cu.
Further, a plurality of solder balls 61 and 62 may be supplied to the 1 st concave portion 201 and the 2 nd concave portion 202, respectively. In this case, the solder balls 61 are arranged not in the 1 st direction a but only in the 3 rd direction C, for example. The plurality of solder balls 62 are not arranged in the 1 st direction a, but arranged only in the 3 rd direction C, for example.
Next, the electronic component 10 is prepared (step 3). Next, the flux 63 is applied to the 1 st electrode 11 of the electronic component 10, and the flux 64 is applied to the 2 nd electrode 12 of the electronic component 10 (step 6). The region of the 1 st electrode 11 to which the flux 63 is applied includes a region of the 1 st electrode 11 of the chip component 4 to which the 1 st bonding portion 51 is bonded. The region of the 2 nd electrode 12 to which the flux 64 is applied includes a region of the 2 nd electrode 12 of the chip component 4 to which the 2 nd bonding portion 52 is bonded. The region to which the flux 63 is applied includes, for example, the entire 1 st surface 11A of the 1 st electrode 11 and a part of the 2 nd surface 11B located on the 1 st surface 11A side in the 2 nd direction B. The region to which the flux 64 is applied includes, for example, the entire 3 rd surface 12A of the 2 nd electrode 12 and a part of the 4 th surface 12B located on the 3 rd surface 12A side in the 2 nd direction B. The method of applying the fluxes 63, 64 is not particularly limited, and is, for example, transfer using a transfer device. A part of each of the fluxes 63, 64 may be applied to the non-electrode portion 13. Thereby, the electronic component 10 shown in fig. 14 is formed.
Next, as shown in fig. 14, the electronic component 10 subjected to the above-described 6 th step is placed on the solder balls 61 and 62 (4 th step). By disposing the electronic component 10 on the solder balls 61, 62, the flux 63 is in contact with the solder ball 61, and the flux 64 is in contact with the solder ball 62.
Next, the solder balls 61 and 62 and the fluxes 63 and 64 form the 1 st bonding portion 21 and the 2 nd bonding portion 22 (step 5). First, the solder balls 61 and 62 and the fluxes 63 and 64 are heated and melted. The heating may be performed by any method, for example, by putting the entire mold 101, the electronic component 10, the solder balls 61 and 62, and the solders 63 and 64 shown in fig. 14 into a reflow furnace and heating the same. The heating temperature is a temperature higher than the melting point of the material constituting the solder balls 61, 62 and the electronic component 10 can withstand, for example, 250 ℃. By the heating, the solder balls 61 and 62 and the fluxes 63 and 64 are entirely melted. Thereby, the electronic component 10 is lowered until the non-electrode portion 13 comes into contact with the upper surface 101A of the mold 101. The molten solder ball 61 and a part of the flux 63 wet and spread on the 2 nd surface 11B of the 1 st electrode 11. The molten solder ball 62 and a part of the flux 64 spread on the 4 th surface 12B of the 2 nd electrode 12.
The solder balls 61, 62 and the fluxes 63, 64 are cooled after melting. The cooling is performed by any method, for example, by taking out the entire assembly of the mold 101, the electronic component 10, the solder balls 61 and 62, and the fluxes 63 and 64 from the reflow furnace. As a result, as shown in fig. 15, chip component 4 including electronic component 10, 1 st bonding portion 51 formed of solder ball 61 and flux 63, and 2 nd bonding portion 52 formed of solder ball 62 and flux 64 is manufactured. After that, the chip component 4 is taken out from the mold 101.
In the method of manufacturing chip component 4, solder fluxes 63 and 64 may be applied to solder balls 61 and 62 disposed in first concave portion 201 and second concave portion 202 of mold 101. As shown in fig. 16, for example, the fluxes 63 and 64 may be applied so as to entirely cover the surfaces of the solder balls 61 and 62 exposed from the mold 101.
In the method for manufacturing chip component 4, in the 6 th step performed after the 2 nd step and before the 3 rd step, the flux is formed on the 1 st bonding portion 21 and the 2 nd bonding portion 22 of the 1 st electrode 11 and the 2 nd electrode 12, respectively, in the region where the 1 st bonding portion 21 and the 2 nd bonding portion 22 are to be formed. Alternatively, in the 6 th step, the solder flux is formed on the solder balls 61 and 62. Thus, in the method for manufacturing chip component 4, mask 102 used in the method for manufacturing chip component 1 is not required.
As shown in fig. 17, chip component 5 according to embodiment 3 has basically the same configuration as chip component 1 according to embodiment 1, but differs from chip component 1 in that it includes 1 st bonding part 71 and 2 nd bonding part 72 instead of 1 st bonding part 21 and 2 nd bonding part 22.
The 1 st bonding portion 71 has substantially the same configuration as the 1 st bonding portion 21, but is different from the 1 st bonding portion 21 in that it is formed of the die solder 81 and the flux 83. The 2 nd bonding portion 72 has basically the same configuration as the 2 nd bonding portion 22, but is different from the 2 nd bonding portion 22 in that it is formed of the die solder 82 and the flux 84.
First, the mold 101 and the chip solders 81 and 82 shown in fig. 18 are prepared. The mold 101 has the same configuration as the mold 101 shown in fig. 3. The chip solder 81 is disposed on the 1 st concave portion 201 of the mold 101, and the chip solder 82 is disposed on the 2 nd concave portion 202 of the mold 101. The volume of the chip solder 81 is larger than the volume of the 1 st recess 201. The volume of the chip solder 82 is greater than the volume of the 2 nd recess 202. The chip solder 81 is disposed so as to close the 1 st recess 201, for example. The width of the chip solder 81 in the 1 st direction a is larger than the width of the 1 st recess 201 in the 1 st direction a, for example. The width of the chip solder 81 in the 3 rd direction C is larger than the width of the 1 st recess 201 in the 3 rd direction C, for example. The chip solder 82 is disposed so as to close the 2 nd recessed portion 202. The width of the chip solder 82 in the 1 st direction a is larger than the width of the 2 nd recessed portion 202 in the 1 st direction. The width of the chip solder 82 in the 3 rd direction C is larger than the width of the 2 nd recessed portion 202 in the 3 rd direction.
The material constituting the chip solders 81 and 82 is, for example, a lead-free solder. The solder balls 61, 62 are made of a material containing, for example, Sn, Ag, and Cu, and the alloy composition thereof is, for example, Sn-3.0% Ag-0.5% Cu.
In addition, at least 1 chip solder 81 may be arranged on 1 st recess 201, and for example, a plurality of chip solders 81 may be arranged. In this case, the plurality of chip solders 81 are arranged in line in, for example, the 3 rd direction C. Similarly, at least 1 chip solder 82 may be arranged on 1 of the 2 nd recessed portions 202, and for example, a plurality of chip solders 82 may be arranged. In this case, the plurality of chip solders 82 are arranged in line in, for example, the 3 rd direction C.
Next, as shown in fig. 19, the electronic component 10 is prepared, and the electronic component 10 is further arranged on the chip solders 81 and 82. The electronic component 10 has, for example, the same configuration as the electronic component 10 prepared in the method for manufacturing the chip component 4. Flux 83 is applied on the 1 st electrode 11 of the prepared electronic component 10. Similarly, the flux 84 is applied on the 2 nd electrode 12 of the prepared electronic component 10. By disposing the electronic component 10 on the chip solders 81 and 82, the flux 83 is in contact with the chip solder 81, and the flux 84 is in contact with the chip solder 82.
The area of the 1 st electrode 11 of the prepared electronic component 10 coated with the flux 83 includes the area of the 1 st electrode 11 of the chip component 5 bonded to the 1 st bonding portion 71. The area of the 2 nd electrode 12 of the prepared electronic component 10 coated with the flux 84 includes the area of the 2 nd electrode 12 of the chip component 5 bonded to the 2 nd bonding portion 72.
The region coated with the flux 83 includes, for example, the entire 1 st surface 11A of the 1 st electrode 11 and a part of the 2 nd surface 11B located on the 1 st surface 11A side in the 2 nd direction B. The region where the flux 84 is applied includes, for example, the entirety of the 3 rd surface 12A of the 2 nd electrode 12 and a part of the 4 th surface 12B located on the 3 rd surface 12A side in the 2 nd direction B. The method of applying the fluxes 83, 84 is not particularly limited, and is, for example, transfer using a transfer device. A part of each of the fluxes 63, 64 may be applied to the non-electrode portion 13.
Next, the chip solders 81 and 82 and the fluxes 83 and 84 are heated and melted. The heating may be performed by any method, for example, by putting the entire mold 101, the electronic component 10, the chip solders 81 and 82, and the fluxes 83 and 84 shown in fig. 19 into a reflow furnace and heating the entire furnace. The heating temperature is a temperature higher than the melting point of the material constituting the chip solders 81 and 82 and tolerable for the electronic component 10, and is 250 ℃. The entire chip solders 81 and 82 and the fluxes 83 and 84 are melted by the heating. Thereby, a part of the melt of the die solder 81 and the flux 83 flows into the 1 st recess 201 to be filled therein, and the remaining part of the melt of the die solder 81 and the flux 83 wets and spreads on the 1 st surface 11A and the 2 nd surface 11B of the 1 st electrode 11. Similarly, a part of the melt of the die solder 82 and the flux 84 flows into the inside of the 2 nd recess 202 to be filled therein, and the remaining part of the melt of the die solder 82 and the flux 84 wets and spreads on the 3 rd surface 12A and the 4 th surface 12B of the 2 nd electrode 12.
The electronic component 10 descends until the non-electrode portion 13 comes into contact with the upper surface 101A of the mold 101. The molten die solder 81 and a part of the flux 83 wet and spread on the 2 nd surface 11B of the 1 st electrode 11. The melted chip solder 82 and a part of the flux 84 wet and spread on the 4 th surface 12B of the 2 nd electrode 12.
The chip solders 81 and 82 and the fluxes 83 and 84 are cooled after being melted. The cooling may be performed by any method, for example, by taking the entire assembly of the mold 101, the electronic component 10, the chip solders 81 and 82, and the fluxes 83 and 84 out of the reflow furnace. Thus, as shown in fig. 20, chip component 5 including electronic component 10, 1 st bonding portion 71 formed of chip solder 81 and flux 83, and 2 nd bonding portion 72 formed of chip solder 82 and flux 84 is manufactured. After that, the chip component 5 is removed from the mold 101.
In the method of manufacturing the chip component 5, the fluxes 83 and 84 may be applied to the chip solders 81 and 82 disposed on the 1 st concave portion 201 and the 2 nd concave portion 202 of the mold 101.
In the method for manufacturing chip component 5, in the 6 th step performed after the 2 nd step and before the 3 rd step, the flux is formed on the 1 st bonding portion 21 and the 2 nd bonding portion 22 of the 1 st electrode 11 and the 2 nd electrode 12, respectively, in the region where the 1 st bonding portion 21 and the 2 nd bonding portion 22 are to be formed. Alternatively, in the above-described 6 th step, the flux is formed on the chip solders 81 and 82. Thus, in the method for manufacturing chip component 5, mask 102 used in the method for manufacturing chip component 1 is not required.
As shown in fig. 21, chip component 6 according to embodiment 4 has basically the same configuration as chip component 1 according to embodiment 1, but differs from chip component 1 in that it includes 1 st bonding part 91 and 2 nd bonding part 92 instead of 1 st bonding part 21 and 2 nd bonding part 22.
The 1 st bonding portion 91 is different from the 1 st bonding portion 21 in that it is not bonded to the 2 nd surface 11B of the 1 st electrode 11. The 1 st joint part 91 is joined to, for example, the 1 st surface 11A only. The 2 nd bonding portion 92 is different from the 1 st bonding portion 21 in that it is not bonded to the 4 th surface 12B of the 2 nd electrode 12. The 2 nd engaging portion 92 engages with only the 3 rd surface 12A, for example.
In the method of manufacturing the chip component 6, the bonding of the 1 st bonding portion 91 and the 1 st electrode 11 and the bonding of the 2 nd bonding portion 92 and the 2 nd electrode 12 are performed by ultrasonic bonding. In other words, in the method for manufacturing the chip component 6, the bonding of the 1 st bonding portion 91 and the 1 st electrode 11 and the bonding of the 2 nd bonding portion 92 and the 2 nd electrode 12 are performed without using flux. In the method of manufacturing chip component 6, the 1 st bonding material or the 2 nd bonding material is constituted only by solder balls.
For example, the electronic component 10 and the solder balls 61 and 62 described above are prepared. Next, ultrasonic vibration is applied to the 1 st electrode 11 and the solder ball 61 of the electronic component 10 while pressing them in the 2 nd direction B. Similarly, ultrasonic vibration is applied to the 2 nd electrode 12 and the solder ball 62 of the electronic component 10 while pressing them in the 2 nd direction B. Thus, the chip component 6 is manufactured without using flux.
In the method for manufacturing chip component 6, the 1 st bonding material and the 2 nd bonding material are each composed of a solder ball, and in the 4 th step, the solder balls are ultrasonically bonded to the 1 st electrodes 11 or the 2 nd electrodes 12. Therefore, in the method for manufacturing the chip component 6, the flux used in each method for manufacturing the chip components 1, 4, and 5 is not required.
< modification example >
In the chip parts 1, 4 to 6, the 1 st projecting portion 21A may be arranged so as to make point contact with a plane extending in the 1 st direction a and the 3 rd direction C when the 1 st projecting portion 21A is arranged on the plane. Similarly, when the 2 nd projecting portion 22A is arranged on a plane extending in the 1 st direction a and the 3 rd direction C, the 2 nd projecting portion 22A may be arranged to make point contact with the plane. In this case, the number of points in contact with the flat surface in the 1 st protruding portion 21A and the number of points in contact with the flat surface in the 2 nd protruding portion 22A may be any number of 1 or more. In other words, the 1 st projection 21A and the 2 nd projection 22A may have a part of at least 1 spheroid or a part of at least 1 ellipsoid. The 1 st protruding part 21A and the 2 nd protruding part 22A may have a part of each of a plurality of spheroids arranged in the 3 rd direction C or a part of each of a plurality of ellipsoids arranged in the 3 rd direction C. The 1 st recess 201 and the 2 nd recess 202 of the mold 101 are provided to form the 1 st joint 21 and the 2 nd joint 22 including the 1 st protruding part 21A and the 2 nd protruding part 22A as described above.
As long as the chip components 1, 4 to 6 have the above-described configurations, the occurrence of poor bonding between the electronic component and the solder bonding portion of the printed circuit board can be suppressed more than the chip components used in the conventional mounting method. Therefore, other configurations of chip components 1, 4 to 6, for example, configurations of chip components 1, 4 to 6 in a cross section perpendicular to the 1 st direction a, and the like are not particularly limited as long as they can be established simultaneously with the above-described configurations.
The 1 st electrode 11 shown in fig. 1 further has: a 5 th surface 11C extending in the 1 st direction a and the 2 nd direction B toward the 3 rd direction C; and a 6 th surface 11D facing the opposite side of the 5 th surface 11C in the 3 rd direction C. The 2 nd electrode 12 further has: a 7 th surface 12C extending in the 1 st direction a and the 2 nd direction B toward the 3 rd direction C; and an 8 th surface 12D facing the opposite side of the 7 th surface 12C in the 3 rd direction C. In chip component 1 shown in fig. 1, first bonding portion 21 and second bonding portion 22 are not formed on 5 th surface 11C, 6 th surface 11D, 7 th surface 12C, and 8 th surface 12D, but not limited thereto. The 1 st joint portion 21 and the 2 nd joint portion 22 may be formed on the 5 th surface 11C, the 6 th surface 11D, the 7 th surface 12C, and the 8 th surface 12D.
Fig. 22 is a cross-sectional view perpendicular to the 1 st direction a of a modification of the chip component 1, and is a cross-sectional view of the 1 st part 21C of the 1 st projecting part 21A passing through the 1 st electrode 11 and the 1 st bonding part 21. As shown in fig. 22, the 1 st joining part 21 is joined to the 1 st surface 11A and the 2 nd surface 11B, and is joined to, for example, a part of each of the 5 th surface 11C and the 6 th surface 11D.
As shown in fig. 22, the 1 st projecting portion 21A further has: a 7 th portion 21E disposed in a region not overlapping with the 1 st electrode 11 in the 2 nd direction B and protruding from the 5 th surface 11C of the 1 st electrode 11 in the 3 rd direction C; and an 8 th portion 21F arranged in a region not overlapping with the 1 st electrode 11 in the 2 nd direction B and protruding with respect to the 6 th surface 11D of the 1 st electrode 11 in the 3 rd direction C. The 1 st joint part 21 further has: a 9 th portion 21G disposed on the 5 th face 11C in the 3 rd direction C; and a 10 th portion 21H disposed on the 6 th surface 11D in the 3 rd direction C. The 1 st portion 21C, the 7 th portion 21E, the 8 th portion 21F, the 9 th portion 21G, and the 10 th portion 21H are integrally formed. The top portion 21T of the 1 st bonding portion 21 is formed only in a region overlapping with the 1 st electrode 11 in the 2 nd direction B, for example. The top portion 21T of the 1 st bonding portion 21 may be formed to extend from the inside to the outside of the 5 th surface 11C and the 6 th surface 11D of the 1 st electrode 11 in the 3 rd direction C.
The chip component 1 shown in fig. 22 is manufactured using the mold 101 shown in fig. 22. The length of the 1 st recess 201 of the mold 101 in the 3 rd direction C is longer than the length of the 1 st electrode 11 and the 2 nd electrode 12 in the 3 rd direction C, for example.
In the chip component 1 shown in fig. 22, it is arranged that when the 1 st projecting part 21A is arranged on a plane extending along the 1 st direction a and the 3 rd direction C, the 1 st projecting part 21A makes line contact with the plane. Fig. 23 is a cross-sectional view perpendicular to the 1 st direction a of another modification of the chip component 1, and is a cross-sectional view of the 1 st part 21C of the 1 st projecting part 21A passing through the 1 st electrode 11 and the 1 st bonding part 21. As shown in fig. 23, in the chip component 1, when the 1 st projecting portion 21A is arranged on a plane extending along the 1 st direction a and the 3 rd direction C, the 1 st projecting portion 21A may be arranged to make point contact with the plane. In the chip part 1 shown in fig. 23, the number of points of the 1 st projecting part 21A which are in contact with the above-mentioned plane is plural. The 2 nd bonding portion 22 of the chip component 1 shown in fig. 22 and 23 has, for example, a configuration similar to the 1 st bonding portion 21.
As shown in fig. 24, chip component 7 according to embodiment 5 has basically the same configuration as chip component 1 according to embodiment 1, but differs from chip component 1 in the following points: the 1 st joint portion 21 is joined to a region located on the 1 st surface 11A side with respect to the center of the 2 nd surface 11B in the 2 nd direction B and a region located on the opposite side to the 1 st surface 11A with respect to the center. Also, chip component 7 differs from chip component 1 in the following respects: the 2 nd joining part 22 is joined to a region located on the 1 st surface 11A side with respect to the center of the 2 nd surface 11B in the 2 nd direction B and a region located on the opposite side to the 1 st surface 11A with respect to the center.
In other words, the 1 st bonding portion 21 has a portion disposed above the center of the 2 nd surface 11B of the 1 st electrode 11 in the 2 nd direction B. The 2 nd bonding portion 22 has a portion disposed above the center of the 4 th surface 12B of the 2 nd electrode 12 in the 2 nd direction B.
Preferably, the 1 st bonding portion 21 is bonded to the entire surface of the 2 nd surface 11B, and the 2 nd bonding portion 22 is bonded to the entire surface of the 4 th surface 12B.
Further, as shown in fig. 25, chip component 7 is different from chip component 1 in the following points: the 1 st bonding portion 21 and the 2 nd bonding portion 22 protrude from the 1 st electrode 11 or the 2 nd electrode 12 in the 3 rd direction C in addition to the 1 st direction a and the 2 nd direction B, respectively.
In other words, the 1 st bonding portion 21 has a portion protruding in the 3 rd direction C with respect to the 1 st electrode 11. The 1 st protruding portion 21A has a portion protruding in the 3 rd direction C with respect to the 1 st electrode 11. A part of the portion of the 1 st bonding portion 21 located above the center of the 2 nd surface 11B of the 1 st electrode 11 in the 2 nd direction B protrudes from the 1 st electrode 11 in the 3 rd direction C.
The 2 nd bonding part 22 has a portion protruding in the 3 rd direction C with respect to the 2 nd electrode 12. The 2 nd projecting portion 22A has a portion projecting in the 3 rd direction C with respect to the 2 nd electrode 12. A part of the 2 nd bonding portion 22 disposed above the center of the 4 th surface 12B of the 2 nd electrode 12 in the 2 nd direction B protrudes from the 2 nd electrode 12 in the 3 rd direction C.
The 1 st electrode 11 further has: a 5 th surface 11C extending in the 1 st direction a and the 2 nd direction B toward the 3 rd direction C; and a 6 th surface 11D facing the opposite side of the 5 th surface 11C in the 3 rd direction C. The 2 nd electrode 12 further has: a 7 th surface 12C extending in the 1 st direction a and the 2 nd direction B toward the 3 rd direction C; and an 8 th surface 12D facing the opposite side of the 7 th surface 12C in the 3 rd direction C. In chip component 7, first bonding portion 1 and second bonding portion 2 22 are formed on first 5 th surface 11C, second 6 th surface 11D, second 7 th surface 12C, and second 8 th surface 12D. The top portion 21T of the 1 st bonding portion 21 is formed only in a region not overlapping with the 1 st electrode 11 in the 2 nd direction B, for example. The top 22T of the 2 nd bonding portion 22 is formed only in a region not overlapping with the 2 nd electrode 12 in the 2 nd direction B, for example.
First, the mold 101 and the electronic component 10 shown in fig. 26 are prepared. The mold 101 has basically the same configuration as the mold 101 shown in fig. 3.
Next, as shown in fig. 27, the bonding material 23 is supplied to the 1 st recess 201 and the bonding material 24 is supplied to the 2 nd recess 202 by the dispenser 400. The bonding material 23 is also supplied at a position above the center of the 2 nd surface 11B in the 2 nd direction B. The bonding material 24 is also supplied at a position above the center of the 4 th surface 12B in the 2 nd direction B.
Subsequently, the bonding material 23 and the bonding material 24 are heated and melted. The heating may be performed by any method, for example, by charging the material into a reflow furnace and heating the material as in the other embodiments. Thereby, the bonding material 23 flows into the 1 st recess 201 to be filled, and the remaining portion of the bonding material 23 wets and spreads on the 1 st surface 11A and the 2 nd surface 11B of the 1 st electrode 11. Similarly, a part of the bonding material 24 flows into the inside of the 2 nd recess 202 to be filled therein, and the remaining part of the bonding material 24 wets and spreads on the 3 rd surface 12A and the 4 th surface 12B of the 2 nd electrode 12.
Next, the bonding material 23 and the bonding material 24 are melted and then cooled. The cooling may be performed by any method, for example, by taking out the material from a reflow furnace as in the other embodiments. Thus, as shown in fig. 28, chip component 7 including electronic component 10, 1 st bonding part 21 formed of bonding material 23, and 2 nd bonding part 22 formed of bonding material 24 is manufactured. After that, the chip component 7 is removed from the mold 101.
Further, since the chip component 1 is exposed without wetting the respective parts of the 2 nd surface 11B and the 4 th surface 12B with solder, if the storage environment of the chip component 1 is poor and the oxidation of the exposed parts has progressed, the 3 rd bonding portion 41 and the 4 th bonding portion 42 may not be wetted over the 2 nd surface 11B and the 4 th surface 12B when the chip component 1 is mounted on the printed circuit board 2 as shown in fig. 30 and 31. The electronic device shown in fig. 30 and 31 is manufactured from the chip component 1, and the 1 st bonding part 21 and the 2 nd bonding part 22 of the chip component 1 protrude outward from the sides of the electronic component 10 in the 1 st direction a and the 2 nd direction B, respectively, but do not protrude outward from the sides of the electronic component 10 in the 3 rd direction C.
In contrast, in chip component 7, 1 st bonding part 21 has a portion disposed above the center of 2 nd surface 11B in 2 nd direction B, and 2 nd bonding part 22 has a portion disposed above the center of 4 th surface 12B in 2 nd direction B. Therefore, in the electronic apparatus shown in fig. 29 in which the chip component 7 is mounted on the printed circuit board 2, the 3 rd bonding portion 41 and the 4 th bonding portion 42 are more reliably wetted and spread over the entire surfaces of the 2 nd surface 11B and the 4 th surface 12B, respectively, than in the electronic apparatus 3 in which the chip component 1 is mounted on the printed circuit board 2. Therefore, according to chip component 7, oxidation of 2 nd surface 11B and 4 th surface 12B can be suppressed regardless of the storage environment. That is, the chip component 7 is excellent in terms of the storability.
Further, the 1 st bonding portion 21 and the 2 nd bonding portion 22 of the chip component 7 each have a portion protruding outward from each side of the electronic component 10 in the 3 rd direction C in addition to the 1 st direction a and the 2 nd direction B. Therefore, the volumes of the 3 rd joint part 41 and the 4 th joint part 42 of the electronic apparatus shown in fig. 29 can be set to be equal to or more than the volumes of the 3 rd joint part 41 and the 4 th joint part 42 of the electronic apparatus shown in fig. 30 and 31. As a result, the shortest distance d1 between the end of the 2 nd electrode 12 and the 3 rd bonding portion 41 of the chip component 7 shown in fig. 29 is longer than the shortest distance d2 between the end of the 2 nd electrode 12 and the 3 rd bonding portion 41 of the chip components shown in fig. 30 and 31.
Here, when the electronic device is exposed to a temperature cycle in the use environment, there is a possibility that warpage or cracks occur in the solder joint portion due to a mismatch in linear expansion coefficient between the chip component and the base material of the printed circuit board. Such cracks develop as the number of temperature cycles increases, and the solder joint eventually reaches a fracture. The time until the fracture is reached is generally proportional to the shortest distance between the end of the chip and the solder joint (fillet).
Therefore, since the shortest distance d1 in the electronic apparatus shown in fig. 29 is longer than the shortest distance d2 in the electronic apparatus shown in fig. 30 and 31, the time required for the electronic apparatus shown in fig. 29 to reach the fracture is longer than the time required for the electronic apparatus shown in fig. 30 and 31 to reach the fracture. As a result, the life of the solder joint in the electronic apparatus shown in fig. 29 is longer than the life of the solder joint in the electronic apparatuses shown in fig. 30 and 31.
While the embodiments of the present disclosure have been described above, the above embodiments may be variously modified. The scope of the present disclosure is not limited to the above-described embodiments. The scope of the present disclosure is indicated by the claims, and all changes that come within the meaning and range of equivalency of the claims are intended to be embraced therein.
Description of reference numerals
1. 4, 5, 6 chip components, 2 printed circuit board, 2A, 101A, 102B upper surface, 3 electronic device, 10 electronic component, 11 1 st electrode, 11A 1 st surface, 11B 2 nd surface, 12 2 nd electrode, 12A 3 rd surface, 12B 4 th surface, 13 non-electrode portion, 21, 51, 71, 91 st joint portion, 21A 1 st projection portion, 21B 3 rd portion, 21C 1 st portion, 21D 2 nd portion, 21E 7 th portion, 21F 8 th portion, 21G 9 th portion, 21H 10 th portion, 21T, 22T top portion, 22, 52, 72, 92 nd 2 th joint portion, 22A 2 nd projection portion, 22B 6 th portion, 22C 4 th portion, 22D 5 th portion, 23, 24 bonding material, 25, 27, 61, 62, 26, 28, 33, 34, 36, 63, 64, 83, 84 solder, 31 rd electrode, 31A 9 th surface, 32 th electrode, 32A 10 th surface, 41 rd bonding part, 42 th bonding part, 81, 82 solder, 101 die, 102 mask, 102A lower surface, 201 st recess, 202 nd recess, 203 st through hole, 204 nd through hole, 300 nozzle.
Claims (16)
1. A chip component, wherein the chip component comprises:
an electronic component including a 1 st electrode and a 2 nd electrode disposed at a distance from the 1 st electrode in a 1 st direction;
a 1 st bonding portion to which the 1 st electrode is bonded; and
a 2 nd bonding portion bonded to the 2 nd electrode,
the material constituting the 1 st joining part and the 2 nd joining part includes solder,
the 1 st bonding portion has a 1 st protruding portion protruding in a 2 nd direction intersecting the 1 st direction with respect to the 1 st electrode,
the 2 nd bonding portion has a 2 nd projecting portion projecting in the 2 nd direction with respect to the 2 nd electrode.
2. The chip component according to claim 1,
the 1 st projecting portion has a portion projecting in the 1 st direction with respect to the 1 st electrode,
the 2 nd projecting portion has a portion projecting in the 1 st direction with respect to the 2 nd electrode.
3. The chip component according to claim 1 or 2,
the outermost peripheral surfaces of the 1 st protruding portion and the 2 nd protruding portion are curved surfaces when viewed from a 3 rd direction intersecting the 1 st direction and the 2 nd direction.
4. The chip component according to claim 3,
when the 1 st protruding portion and the 2 nd protruding portion are arranged on a plane extending in the 1 st direction and the 3 rd direction, respectively, the 1 st protruding portion and the 2 nd protruding portion are formed to be in point contact or line contact with the plane, respectively.
5. The chip component according to claim 3 or 4,
a height of the 1 st protruding portion in the 2 nd direction with respect to the 1 st electrode is equal to a height of the 2 nd protruding portion in the 2 nd direction with respect to the 2 nd electrode when viewed from the 3 rd direction.
6. The chip component according to claim 5,
the 1 st bonding portion and the 2 nd bonding portion are formed symmetrically with respect to a center line passing through a center between the 1 st electrode and the 2 nd electrode in the 1 st direction and extending in the 2 nd direction when viewed from the 3 rd direction.
7. The chip component according to any one of claims 1 to 6,
the top of the 1 st protruding portion in the 2 nd direction is disposed so as to overlap the 1 st electrode in the 2 nd direction,
the top of the 2 nd projecting portion in the 2 nd direction is disposed so as to overlap the 2 nd electrode in the 2 nd direction.
8. The chip component according to any one of claims 1 to 7,
the 1 st bonding portion has a portion arranged above the center of the 1 st electrode in the 2 nd direction and a portion protruding from the 1 st electrode in the 3 rd direction,
the 2 nd bonding portion has a portion arranged above the center of the 2 nd electrode in the 2 nd direction and a portion protruding from the 2 nd electrode in the 3 rd direction.
9. A method for manufacturing a chip component, comprising:
a 1 st step of preparing a mold having an upper surface and formed with a 1 st recessed portion and a 2 nd recessed portion recessed from the upper surface;
a 2 nd step of disposing a 1 st bonding material in the 1 st recess and disposing a 2 nd bonding material in the 2 nd recess;
a 3 rd step of preparing an electronic component including a 1 st electrode and a 2 nd electrode arranged at a distance from the 1 st electrode in the 1 st direction;
a 4 th step of, after the 2 nd step and the 3 rd step, disposing the electronic component on the upper surface, bringing the 1 st electrode into contact with the 1 st bonding material, and bringing the 2 nd electrode into contact with the 2 nd bonding material; and
and a 5 th step of forming, after the 4 th step, a 1 st bonding portion bonded to the 1 st electrode with the 1 st bonding material and having a 1 st protruding portion protruding relative to the 1 st electrode in a 2 nd direction intersecting the 1 st direction, and forming a 2 nd bonding portion bonded to the 2 nd electrode with the 2 nd bonding material and having a 2 nd protruding portion protruding relative to the 2 nd electrode in the 2 nd direction.
10. The method for manufacturing a chip component according to claim 9,
in the 4 th step, the 1 st protruding portion has a portion protruding in the 1 st direction with respect to the 1 st electrode, and the 2 nd protruding portion has a portion protruding in the 1 st direction with respect to the 2 nd electrode.
11. The method for manufacturing a chip component according to claim 9 or 10,
the 1 st bonding material and the 2 nd bonding material each include a mixture in which a solder ball and a flux are mixed,
in the 5 th step, the solder ball and the flux are melted.
12. The method for manufacturing a chip component according to claim 9 or 10,
the 1 st bonding material and the 2 nd bonding material each include a solder ball,
a 6 th step of disposing a flux on the solder ball and at least one of regions where the 1 st bonding portion and the 2 nd bonding portion are to be formed in the 1 st electrode and the 2 nd electrode in the 6 th step after the 2 nd step and before the 3 rd step,
in the 5 th step, the solder ball and the flux are melted.
13. The method for manufacturing a chip component according to claim 9 or 10,
the 1 st bonding material and the 2 nd bonding material each include a chip solder,
a 6 th step of disposing a flux on the die solder and at least one of the 1 st electrode and the 2 nd electrode in a region where the 1 st bonding portion and the 2 nd bonding portion are to be formed, after the 2 nd step and before the 3 rd step,
in the step 5, the die solder and the flux are melted.
14. The method for manufacturing a chip component according to claim 9 or 10,
the 1 st bonding material and the 2 nd bonding material are formed of solder balls,
in the 5 th step, the solder ball is ultrasonically bonded to the 1 st electrode or the 2 nd electrode.
15. A method for manufacturing an electronic device, comprising:
a 7 th step of preparing a chip component manufactured by the method for manufacturing a chip component according to any one of claims 9 to 14, and a printed circuit board including a 3 rd electrode and a 4 th electrode disposed at a distance from the 3 rd electrode in the 1 st direction;
a 8 th step of disposing the 1 st protruding portion of the 1 st bonding portion on the 3 rd electrode and disposing the 2 nd protruding portion of the 2 nd bonding portion on the 4 th electrode in the 8 th step; and
a 9 th step of forming a 3 rd bonding portion bonded to the 1 st electrode and the 3 rd electrode by the 1 st bonding portion and forming a 4 th bonding portion bonded to the 2 nd electrode and the 4 th electrode by the 2 nd bonding portion after the 8 th step,
in the 9 th step, the 1 st joining portion and the 2 nd joining portion are melted by heating.
16. The method of manufacturing an electronic device according to claim 15,
the 1 st electrode and the 2 nd electrode each have a surface extending along the 2 nd direction,
in the 9 th step, the 1 st joint part and the 2 nd joint part melted by heating are wetted and spread on the surfaces extending in the 2 nd direction, respectively.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2019139451 | 2019-07-30 | ||
| JP2019-139451 | 2019-07-30 | ||
| PCT/JP2020/019343 WO2021019867A1 (en) | 2019-07-30 | 2020-05-14 | Chip component, method for manufacturing chip component, and method for manufacturing electronic device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114145080A true CN114145080A (en) | 2022-03-04 |
| CN114145080B CN114145080B (en) | 2024-05-28 |
Family
ID=74228432
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202080052169.5A Active CN114145080B (en) | 2019-07-30 | 2020-05-14 | Chip component, method for manufacturing chip component, and method for manufacturing electronic device |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP7166464B2 (en) |
| CN (1) | CN114145080B (en) |
| WO (1) | WO2021019867A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20230061076A1 (en) * | 2021-08-30 | 2023-03-02 | International Business Machines Corporation | Soldering of end chip components in series |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003152325A (en) * | 2001-11-13 | 2003-05-23 | Matsushita Electric Ind Co Ltd | Method of soldering chip electronic part and shape of paste solder |
| CN1449029A (en) * | 2002-03-29 | 2003-10-15 | 株式会社日立制作所 | Circuit base plate, electronic machine, and and method of manufacture |
| CN102779813A (en) * | 2011-05-12 | 2012-11-14 | 株式会社东芝 | Semiconductor device and manufacturing method thereof, and semiconductor module using the same |
| US20130320371A1 (en) * | 2012-06-04 | 2013-12-05 | Kabushiki Kaisha Toshiba | Device module |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004296936A (en) * | 2003-03-27 | 2004-10-21 | Kyocera Corp | Ceramic electronic component |
| JP2006221690A (en) * | 2005-02-08 | 2006-08-24 | Alps Electric Co Ltd | Solder ball bonding method for magnetic head assembly |
| JP2010147406A (en) * | 2008-12-22 | 2010-07-01 | Tdk Corp | Production method of electronic component |
| TWI367697B (en) * | 2009-08-17 | 2012-07-01 | Nan Ya Printed Circuit Board | Printed circuit board and fabrication method thereof |
| US9620444B2 (en) * | 2012-09-07 | 2017-04-11 | Mitsubishi Electric Corporation | Power semiconductor device |
| US10283271B2 (en) * | 2014-01-17 | 2019-05-07 | Kyocera Corporation | Laminated electronic component and laminated electronic component mounting structure |
-
2020
- 2020-05-14 WO PCT/JP2020/019343 patent/WO2021019867A1/en active Application Filing
- 2020-05-14 CN CN202080052169.5A patent/CN114145080B/en active Active
- 2020-05-14 JP JP2021536618A patent/JP7166464B2/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003152325A (en) * | 2001-11-13 | 2003-05-23 | Matsushita Electric Ind Co Ltd | Method of soldering chip electronic part and shape of paste solder |
| CN1449029A (en) * | 2002-03-29 | 2003-10-15 | 株式会社日立制作所 | Circuit base plate, electronic machine, and and method of manufacture |
| CN102779813A (en) * | 2011-05-12 | 2012-11-14 | 株式会社东芝 | Semiconductor device and manufacturing method thereof, and semiconductor module using the same |
| US20130320371A1 (en) * | 2012-06-04 | 2013-12-05 | Kabushiki Kaisha Toshiba | Device module |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20230061076A1 (en) * | 2021-08-30 | 2023-03-02 | International Business Machines Corporation | Soldering of end chip components in series |
| US11641717B2 (en) * | 2021-08-30 | 2023-05-02 | International Business Machines Corporation | Soldering of end chip components in series |
Also Published As
| Publication number | Publication date |
|---|---|
| JPWO2021019867A1 (en) | 2021-02-04 |
| CN114145080B (en) | 2024-05-28 |
| JP7166464B2 (en) | 2022-11-07 |
| WO2021019867A1 (en) | 2021-02-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4356581B2 (en) | Electronic component mounting method | |
| US10566139B2 (en) | Ceramic electronic device | |
| CN114145080B (en) | Chip component, method for manufacturing chip component, and method for manufacturing electronic device | |
| JP2010212318A (en) | Printed wiring board and component mounting structure | |
| JPH1050928A (en) | Semiconductor device and manufacture thereof | |
| JP2005116943A (en) | Printed-circuit board, packaging substrate module, manufacturing method for printed-circuit board, and electro-optical devices and electronic apparatuses using same | |
| JP5517433B2 (en) | Leadless electronic component mounting method and mounting structure | |
| JP2002223062A (en) | Pad shape of printed wiring board | |
| JP3913531B2 (en) | Spacer and mounting method using the same | |
| CN111836474A (en) | Electronic device and method for manufacturing the same, and printed circuit board and method for manufacturing the same | |
| JP2010034168A (en) | Electronic component soldering method | |
| US20060049238A1 (en) | Solderable structures and methods for soldering | |
| JP2006216631A (en) | Wiring substrate and its manufacturing method | |
| JP7069404B2 (en) | Printed wiring board and electronic equipment | |
| JP4381657B2 (en) | Circuit board and electronic component mounting method | |
| JPH10215064A (en) | Method for mounting electronic part having weak heat resistance | |
| CN210110744U (en) | Packaged device and electronic apparatus | |
| JP2010087232A (en) | Electronic component and substrate for electronic component, and methods of manufacturing them | |
| JP4026267B2 (en) | Electronic component mounting structure and mounting method | |
| JP2017092270A (en) | Semiconductor device | |
| JP2020141066A (en) | Printed wiring board and electronic apparatus | |
| JP3214009B2 (en) | Semiconductor device mounting substrate and method | |
| JP2022183841A (en) | Semiconductor module, manufacturing method for semiconductor module, printed wiring board, and electronic apparatus | |
| JP2021114495A (en) | Module and manufacturing method of the same | |
| JP2019102480A (en) | Printed wiring board manufacturing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |