JP3214009B2 - Semiconductor device mounting substrate and method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor element mounting board and a method for mounting a semiconductor element such as an IC chip as a bare chip on a substrate.

[0002]

2. Description of the Related Art A conventional method for mounting a semiconductor element such as an IC chip on a substrate in a bare chip state is shown in FIG.
2 to 14 are known. In the method shown in FIG. 12, one end of a gold wire 3 is soldered to a protruding electrode (hereinafter referred to as a bump) 2 formed of gold or the like of a semiconductor element 1 and the other end of the gold wire 3 is formed on a substrate 4. This is a method of connecting by soldering to the formed electrode pattern 5.

[0003] The method shown in FIG. 13 is called a TAB method, in which an inner lead 7 a and an outer lead 7 b protruding from both ends of a plurality of wiring patterns 7 formed on a base film 6 are respectively attached to the semiconductor element 1. In this method, the formed bumps 2 and the electrode patterns 5 on the substrate 4 are collectively soldered and connected.

Further, the method shown in FIG.
In this method, the solder bumps 8 are provided on the substrate 4, the solder bumps 8 are positioned and brought into contact with the electrode patterns 5 on the substrate 4, and the IC chip 1 is soldered and connected to the electrode patterns 5 via the solder bumps 8 by heating under pressure.

[0005]

However, according to the method shown in FIG. 12, both ends of the gold wire 3 must be soldered one by one, and especially in the case of a multi-pin IC, much time is required for mounting. There was a problem.

According to the method shown in FIG. 13, the semiconductor element 1 is placed on the stage 11 as shown in FIG. 15, the base film 6 is mounted on a support (not shown), and the semiconductor element 1 and the base film 6 are attached. The position is recognized by the CCD camera 12. Then, move the stage 11 to X, Y,
In the θ direction, the inner leads 7 a protruding from the base film 6 are aligned with the bumps 2 of the semiconductor element 1. Thereafter, as shown in FIG.
1, the inner leads 7a are pressed onto the bumps 2 and heated, so that the cream solder applied on the bumps 2 is melted and fixed. The solder fixing between the outer leads 7b and the electrode patterns 5 formed on the substrate 4 is performed in the same manner. For this reason, the soldering is performed in two steps, and it is necessary to perform accurate positioning using the CCD camera 12 or the like, and there has been a problem that the mounting operation is complicated.

According to the flip-chip method shown in FIG. 14, soldering is performed in one step, but the bump 8 of the semiconductor element 1 and the electrode pattern 5 on the substrate 4 are aligned by TAB.
As in the case of the method, it must be performed with high precision, and there is a problem that it takes time and effort.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and provides a semiconductor element mounting board and a method capable of mounting a semiconductor element on a board by simply performing simple alignment in a bare chip state. The purpose is to provide.

[0009]

[Means for solving the problems] mounting method of a semiconductor device according to claim 1, the outer semiconductor element on the electrode pattern
Maintain a predetermined spacing with respect to the circumference, and via an insulating layer,
For connection where the parts facing each other are formed in approximately the same size
A first step of providing a land, and
A second step of supplying a predetermined amount of solder solder;
A semiconductor element is inserted between the two,
A third step of bringing the projected electrode into contact with the electrode pattern;
Heat the cream solder to melt it and make contact with the side of the semiconductor element.
And a fourth step of soldering and fixing the connection land .

According to a second aspect of the present invention, in the method of mounting a semiconductor device, the width of the protruding electrode provided on the semiconductor device is smaller than that of the substrate.
It is characterized in that it is larger than the interval between the formed electrode patterns .

A mounting board for a semiconductor device according to claim 3.
Is a semiconductor element mounting method according to claim 1.
The child is implemented .

[0012]

In the mounting method of semiconductor element of the present invention, electrostatic
A predetermined distance from the outer periphery of the semiconductor element
Maintain, and the parts facing each other are almost
Connection lands formed in the same size are provided.
A predetermined amount of cream solder is supplied onto the connection land, and the connection
The semiconductor element is inserted between the
The provided protruding electrode is brought into contact with the electrode pattern,
The ream solder is heated and melted,
The connection lands are fixed by soldering.

The width of the protruding electrode provided on the semiconductor element is
Larger than the distance between electrode patterns formed on the substrate
You can make it.

In the semiconductor device mounting board of the present invention,
Is a semiconductor element mounting method according to claim 1.
The child is implemented .

[0015]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view showing a semiconductor device mounting method according to an embodiment of the present invention. 1 to 6 show the steps of one embodiment of the present invention. In these figures, FIG.
The same reference numerals are given to the parts corresponding to the parts of the conventional example shown in FIG. Step 1 shown in FIG.
In FIG. 1, an Al pad 31 is provided on the bare chip-shaped semiconductor element 1 as an external connection electrode. Next, in step 102, a bump 2 having a height of 20 μm to 30 μm is provided on the Al pad 31 as a protruding electrode. The bump 2 is preferably formed by a method such as gold plating when the semiconductor element 1 is in a wafer state, and is preferably formed by a transfer method or a TAB method when the semiconductor element 1 is in a chip state.

Next, in step 103, connection lands 33 are provided via an insulating layer 32 on the electrode patterns 5 formed on the substrate 4 on which the semiconductor element 1 is mounted. The connection land 33 is formed of copper foil having good wettability with solder, or a copper foil plated with nickel or gold. As shown in FIG. 3 or FIG. 4, the connection lands 33 are disposed at a predetermined distance from the outer periphery of the rectangular or square semiconductor element 1 to be mounted. A pair of lands 33 provided in contact with two opposing sides of the semiconductor element 1 have exactly the same shape.

Next, in step 104, a predetermined amount of cream solder 34 is precisely supplied onto the connection lands 33 on the substrate 4 by a printing method using a metal screen or the like. At this time, the cream solder 34 on the opposing connection land 33 is such that the semiconductor element 1 is between 0.1 mm and 0.2 mm.
Maintain a position that can be mounted while maintaining the distance of mm.

Next, in step 105, the semiconductor element 1 is mounted on the electrode pattern 5 on the substrate 4 using a chip mounter or the like so as not to contact the cream solder 34.
At this time, as shown in FIGS. 5 and 6, the width a of the bump 2 provided on the semiconductor element 1 is set to be larger than the interval b between the electrode patterns 5. This makes it possible to prevent the bumps 2 from dropping between the electrode patterns 5 even when the bumps 2 are located between the electrode patterns 5 when the semiconductor element 1 is roughly aligned with the substrate 4. As a result, complete alignment can be achieved by self-alignment when the cream solder 34 reflows.

Next, in step 106, preheating is performed to activate the flux in the cream solder 34. At this time, the cream solder 34 softens and comes into contact with the connection lands 33 and the solderable surface formed on the side surface of the semiconductor element 1. By adjusting the gap between the connection land 33 and the semiconductor element 1, the viscosity of the cream solder 34, the flux content, and the like, the cream solder 34
Make sure it contacts the side of the After the reflow, the main heat of the cream solder 34 is performed in step 107, and the semiconductor element 1 is soldered and fixed to the connection lands 33. In addition,
The above-mentioned preheat and main heat are put into a reflow furnace in the state of step 105, and are heated according to the profile shown in FIG.
Is performed.

FIG. 1 shows a state in which the semiconductor element 1 is mounted on a substrate 4. After rough alignment of the semiconductor element 1 on the substrate 4 in step 105, steps 106 and 107 are performed.
In order to achieve accurate alignment, as shown in FIG. 3 or FIG. 4, the connecting lands 33 facing each other have the same size, and the amount of the cream solder 34 is adjusted and supplied with high precision by printing using a metal screen or the like. do it. In this way, due to the horizontal component B of the surface tension of the cream solder 34 indicated by the arrow A in FIG. 1, the roughly aligned component 41 causes the tension acting on the electrode 42 as schematically shown in FIG. Is moved to the position shown in FIG. 9 where the balance can be obtained, and accurate alignment can be performed. Accordingly, the multi-pin semiconductor element 1 also moves from the rough-aligned position shown in FIG. 10 to the correct position shown in FIG. 11, and accurate alignment can be performed.

The cream solder 3 indicated by an arrow A in FIG.
The semiconductor component 1 is formed by the vertical component C of the surface tension of the semiconductor device 1.
Bump 2 is pressed against the electrode pattern 5 to enable electrical conduction.

According to this embodiment, even in the case of the bare chip multi-pin semiconductor element 1, the semiconductor element 1 can be easily aligned on the substrate 4 without using a high-precision alignment mechanism such as a CCD camera. By simply mounting the semiconductor device, accurate alignment is possible, and the semiconductor element 1 can be mounted on the substrate 4 with high accuracy.

[0023]

As described above, according to the semiconductor device mounting method of the present invention , the semiconductor device is mounted on the electrode pattern.
Maintain a predetermined distance from the outer periphery and use an insulating layer
The contact parts whose opposing parts are formed to be almost the same size
A connection land is provided, and cream solder is placed on the connection land.
Quantitative supply, insert semiconductor element between connection lands,
The protruding electrode provided on the lower surface of the semiconductor element is used as an electrode pattern
And heat the cream solder to melt it,
Since the side of the child and the connection land are fixed by soldering, self-alignment is possible due to the surface tension of the cream solder.
The semiconductor element can be mounted at an accurate position.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view showing a mounting structure of a semiconductor device mounted according to an embodiment of a semiconductor device mounting method of the present invention.

FIG. 2 is an explanatory view showing steps of one embodiment of a method for mounting a semiconductor device according to the present invention.

FIG. 3 is a plan view showing an example of an arrangement of connection lands with respect to the semiconductor element of FIG. 2;

FIG. 4 is a plan view showing another example of the arrangement of connection lands with respect to the semiconductor element of FIG. 2;

FIG. 5 is an explanatory diagram showing a dimensional relationship between a bump and an electrode pattern in FIG. 2;

FIG. 6 is an enlarged view of a main part of FIG. 5;

FIG. 7 is a thermal profile diagram during reflow of the cream solder of FIG. 2;

FIG. 8 is an explanatory diagram showing a state at the time of rough alignment showing the principle of self-alignment of the present embodiment.

FIG. 9 is an explanatory diagram showing a state at the time of self-alignment of FIG. 8;

FIG. 10 is an explanatory diagram showing a state of the semiconductor element of FIG. 2 during rough alignment.

FIG. 11 is an explanatory diagram showing a state at the time of self-alignment in FIG. 10;

FIG. 12 is an explanatory diagram showing a first example of a conventional method for mounting a semiconductor element.

FIG. 13 is an explanatory view showing a second example of a conventional method for mounting a semiconductor element.

FIG. 14 is an explanatory diagram showing a third example of a conventional method for mounting a semiconductor element.

FIG. 15 is an explanatory view showing a method for aligning a semiconductor element and a base film in the mounting method shown in FIG. 13;

FIG. 16 is an explanatory view showing a bonding method between a semiconductor element and a base film in the mounting method shown in FIG. 13;

[Explanation of symbols]

 Reference Signs List 1 semiconductor element 2 bump (protruding electrode) 4 substrate 5 electrode pattern 32 insulating layer 33 connection land 34 cream solder

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H05K 3/34 507 H05K 1/18 H01L 21/60 311 H01L 23/50

Claims (3)

(57) [Claims] 1. A method of mounting a semiconductor element having a solderable side surface on an electrode pattern formed on a substrate, the method comprising the steps of: Maintain predetermined spacing and face each other via an insulating layer
A first step of providing connection lands having portions having substantially the same size, a second step of supplying a predetermined amount of cream solder on the connection lands, and the semiconductor element between the connection lands. A third step of inserting a protruding electrode provided on the lower surface of the semiconductor element into contact with the electrode pattern; heating and melting the cream solder to form a side surface of the semiconductor element and the connection land. And a fourth step of soldering and fixing the semiconductor device. The width of 2. A protruding electrodes provided on the semiconductor device mounting method of a semiconductor device according to claim 1, wherein a greater than the spacing between the electrode patterns formed on the substrate. 3. A method for mounting a semiconductor device according to claim 1.
Wherein the semiconductor element is mounted in the semiconductor
Device mounting board.