JP2555720B2 - Solder bump component mounting method - Google Patents
Solder bump component mounting methodInfo
- Publication number
- JP2555720B2 JP2555720B2 JP63321300A JP32130088A JP2555720B2 JP 2555720 B2 JP2555720 B2 JP 2555720B2 JP 63321300 A JP63321300 A JP 63321300A JP 32130088 A JP32130088 A JP 32130088A JP 2555720 B2 JP2555720 B2 JP 2555720B2
- Authority
- JP
- Japan
- Prior art keywords
- solder bump
- positioning
- printed board
- pad
- bump component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/1401—Structure
- H01L2224/1403—Bump connectors having different sizes, e.g. different diameters, heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
- H01L2224/1705—Shape
- H01L2224/17051—Bump connectors having different shapes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】 〔概 要〕 LSI,IC等の半田バンプ部品をプリント板等に半田付け
実装する際に適用される半田バンプ部品の実装方法に関
し、 位置決め治具等を使用することなく、しかも高精度に
半田バンプ部品をプリント板に実装し得る実装方法の提
供を目的とし、 前記半田バンプ部品側のパッケージにはその下面から
上面に貫通するスルーホールを設け、またプリント板側
には該スルーホールに対応する位置決め用パッドを設
け、前記半田バンプ部品をプリント板に実装するに際し
ては、前記スルーホールと前記位置決め用パッド間に位
置決めバンプを配置し、前記信号端子用パッドと前記プ
リント板側の配線パッド間には該位置決めバンプよりも
小径の接続用バンプを配置するようにしたことを特徴と
する。DETAILED DESCRIPTION OF THE INVENTION [Overview] A solder bump component mounting method applied when soldering a solder bump component such as an LSI or an IC to a printed board without using a positioning jig or the like. In addition, for the purpose of providing a mounting method capable of mounting the solder bump component on the printed board with high accuracy, a through hole penetrating from the lower surface to the upper surface of the package on the solder bump component side is provided, and on the printed board side. A positioning pad corresponding to the through hole is provided, and when mounting the solder bump component on a printed board, a positioning bump is arranged between the through hole and the positioning pad, and the signal terminal pad and the printed board are arranged. It is characterized in that a connecting bump having a diameter smaller than that of the positioning bump is arranged between the side wiring pads.
本発明は、例えばLSI,IC等のように、パッケージの面
に複数個の信号端子用パッドを有して成る半田バンプ部
品を、プリント板に実装する際に適用される半田バンプ
部品の実装方法に関する。The present invention relates to a solder bump component mounting method applied when a solder bump component having a plurality of signal terminal pads on the surface of a package, such as LSI and IC, is mounted on a printed board. Regarding
第４図（ａ）と（ｂ）と（ｃ）は従来の半田バンプ部
品の一構成例を示す図であって、（ａ）は斜視図、
（ｂ）はこれを下面から見た平面図、（ｃ）は（ｂ）図
のＢ−Ｂ線断面図である。また第５図は従来のプリント
板の一構成例を示す要部斜視図であり、第６図は従来の
半田バンプ部品の実装方法の一例を示す要部側断面図で
ある。FIGS. 4 (a), (b) and (c) are diagrams showing a configuration example of a conventional solder bump component, wherein (a) is a perspective view,
(B) is the top view which looked at this from the lower surface, (c) is the BB sectional drawing of the (b) figure. Further, FIG. 5 is a perspective view of a main part showing an example of the configuration of a conventional printed board, and FIG. 6 is a side sectional view of the main part showing an example of a conventional method of mounting a solder bump component.
第４図（ａ）と（ｂ）と（ｃ）に示すように、従来の
半田バンプ部品25は、その下面側に複数個の信号端子用
パッド１を備えると共に、該信号端子用パッド１上には
それぞれ接続用バンプ３が配置されている。As shown in FIGS. 4 (a), (b) and (c), the conventional solder bump component 25 is provided with a plurality of signal terminal pads 1 on the lower surface side thereof and on the signal terminal pads 1 above. The connection bumps 3 are arranged on each of these.
一方、前記半田バンプ部品25が実装される側のプリン
ト板40には、第５図に示すようなリフローパッド18が前
記接続用バンプ３対応に設けられている。On the other hand, a reflow pad 18 as shown in FIG. 5 is provided corresponding to the connection bump 3 on the printed board 40 on the side where the solder bump component 25 is mounted.
以下、第６図に基づいて従来の半田バンプ部品の実装
方法（以下実装方法と称する）を説明する。Hereinafter, a conventional solder bump component mounting method (hereinafter referred to as a mounting method) will be described with reference to FIG.
．プリント板40上に、半田バンプ部品25の信号端子用
パッド１をリフローパッド18上に位置決めするガイド治
具30を装着する。. A guide jig 30 for positioning the signal terminal pad 1 of the solder bump component 25 on the reflow pad 18 is mounted on the printed board 40.
．半田バンプ部品25のパッケージ10をガイド治具30に
沿って矢印Ｄ方向に挿入する。. The package 10 of the solder bump component 25 is inserted along the guide jig 30 in the direction of arrow D.
．これをベーパーリフロー装置（高温度の蒸気で半田
を溶融して半田付けを行う装置）内にセットする。そし
て高温度蒸気によって接続用バンプ３を溶融させ、信号
端子用パッド１とリフローパッド18とを半田付け接続す
る。. This is set in a vapor reflow device (a device that melts solder with high-temperature steam to perform soldering). Then, the connection bumps 3 are melted by the high temperature steam, and the signal terminal pads 1 and the reflow pads 18 are soldered and connected.
といった方法で実装を行っていた。It was implemented by such a method.
しかしながら、上記従来の実装方法には下記の問題点
がある。即ち、 ．半田バンプ部品25の形状に応じたガイド治具30を準
備する必要がある。However, the above-mentioned conventional mounting method has the following problems. That is ,. It is necessary to prepare a guide jig 30 corresponding to the shape of the solder bump component 25.
．ガイド治具30をプリント板40上に高精度で位置決め
するための二次的な手段が必要である。. A secondary means for positioning the guide jig 30 on the printed board 40 with high accuracy is required.
．ガイド治具30で位置決めするためには、半田バンプ
部品25自体の寸法を高精度化する必要があり、従って半
田バンプ部品25の製造コストがアップする。. In order to position with the guide jig 30, it is necessary to make the dimensions of the solder bump component 25 itself highly accurate, and therefore the manufacturing cost of the solder bump component 25 increases.
．ガイド治具30によって半田溶融時のセルフアライメ
ントが抑制され、リフローパッド18と信号端子用パッド
１間にズレを生じる危険性がある。. The guide jig 30 suppresses self-alignment at the time of melting the solder, and there is a risk of causing a deviation between the reflow pad 18 and the signal terminal pad 1.
本発明は上記従来の実装方法における問題点を解決す
るためになされたものである。The present invention has been made to solve the problems in the above conventional mounting method.
本発明による実装方法は第１図，第２図および第３図
に示すように、半田バンプ部品15側のパッケージ10には
当該パッケージ10の下面から上面に貫通するスルーホー
ル５を設け、前記プリント板20側には該スルーホール５
に対応する位置決め用パッド19を設け、半田バンプ部品
15をプリント板20に実装するに際しては、前記スルーホ
ール５と位置決め用パッド19間に位置決めバンプ２を配
置し、前記信号端子用パッド１と前記プリント板20側の
リフローパッド間18には前記位置決めバンプ２よりも小
径の接続用バンプ３を配置する構成になっている。According to the mounting method of the present invention, as shown in FIGS. 1, 2 and 3, the package 10 on the solder bump component 15 side is provided with a through hole 5 penetrating from the lower surface to the upper surface of the package 10, and The through hole 5 on the plate 20 side
Positioning pad 19 corresponding to
When mounting 15 on the printed board 20, a positioning bump 2 is arranged between the through hole 5 and the positioning pad 19, and the positioning is performed between the signal terminal pad 1 and the reflow pad 18 on the printed board 20 side. Connection bumps 3 having a smaller diameter than the bumps 2 are arranged.
このように、本発明による実装方法は、スルーホール
５と位置決め用パッド19間に配置される位置決めバンプ
２の直径を、信号端子用パッド１とリフローパッド18間
に配置される接続用バンプ３の直径よりも大きくしてあ
るので、加熱によって溶融した位置決めバンプ２がスル
ーホール５内に侵入してそこにガイド構造が構成され
る。そしてこの位置決めバンプ２の誘導によって信号端
子用パッド１がリフローパッド18上に位置決めされるこ
とになるため、半田バンプ部品15とプリント板20間に位
置ズレが発生し難い。As described above, in the mounting method according to the present invention, the diameter of the positioning bump 2 arranged between the through hole 5 and the positioning pad 19 is equal to that of the connecting bump 3 arranged between the signal terminal pad 1 and the reflow pad 18. Since the diameter is larger than the diameter, the positioning bump 2 melted by heating enters the through hole 5 to form a guide structure there. Since the signal terminal pad 1 is positioned on the reflow pad 18 by the guidance of the positioning bump 2, the positional deviation between the solder bump component 15 and the printed board 20 is unlikely to occur.
以下実施例図に基づいて本発明を詳細に説明する。 The present invention will be described in detail below with reference to the accompanying drawings.
第１図（ａ）と（ｂ）は本発明に用いる半田バンプ部
品の一構成例を示す平面図とそのＡ−Ａ線部の断面形状
を示す要部側断面図、第２図は本発明に用いるプリント
板の一構成例を示す要部斜視図、第３図（ａ）と（ｂ）
と（ｃ）は本発明による実装方法を示す要部側断面図で
あるが、前記第４図，第５図及び第６図と同一部分につ
いては同一符号を付している。1 (a) and 1 (b) are a plan view showing an example of the structure of a solder bump component used in the present invention and a side sectional view showing the cross-sectional shape of the line AA, and FIG. FIG. 3 (a) and FIG. 3 (b), which are perspective views of an essential part showing a configuration example of a printed board used for
FIGS. 4 (c) and 4 (c) are side sectional views showing the mounting method according to the present invention, in which the same parts as those in FIGS. 4, 5, and 6 are designated by the same reference numerals.
第１図（ａ）と（ｂ）に示すように、本発明に用いる
半田バンプ部品15は、パッケージ10の下面に設けられた
複数個の信号端子用パッド１の外側に複数個（この例で
は４個）のスルーホール５が形成されている。そして、
該スルーホール５上には位置決めバンプ２が配置され、
一方の信号端子用パッド１上には前記位置決めバンプ２
よりも小径の接続用バンプ３が配置されている。なお、
これら位置決めバンプ２と接続用バンプ３は、例えば半
田付け時に使用する周知のフラックス（図示せず）等を
用いて所定の位置に接着配置されている。As shown in FIGS. 1A and 1B, a plurality of solder bump components 15 used in the present invention are provided outside the plurality of signal terminal pads 1 provided on the lower surface of the package 10 (in this example, 4) through holes 5 are formed. And
Positioning bumps 2 are arranged on the through holes 5,
The positioning bumps 2 are provided on one of the signal terminal pads 1.
The connecting bumps 3 having a smaller diameter than the above are arranged. In addition,
The positioning bumps 2 and the connection bumps 3 are bonded and arranged at predetermined positions by using, for example, a well-known flux (not shown) used for soldering.
一方、本発明に用いるプリント板20は、第２図に示す
ように、前記信号端子用パッド１対応に設けられたリフ
ローパッド18と、前記スルーホール５対応に設けられた
位置決め用パッド19を備えている。On the other hand, as shown in FIG. 2, the printed board 20 used in the present invention comprises a reflow pad 18 provided corresponding to the signal terminal pad 1 and a positioning pad 19 provided corresponding to the through hole 5. ing.
以下第３図（ａ）と（ｂ）と（ｃ）に基づいて本発明
による実装方法を説明する。The mounting method according to the present invention will be described below with reference to FIGS. 3 (a), 3 (b) and 3 (c).
．第３図（ａ）に示すように、プリント板20の位置決
め用パッド19上に、半田バンプ部品15側のスルーホール
５上に配置された位置決めバンプ２を位置決めする。. As shown in FIG. 3A, the positioning bumps 2 arranged on the through holes 5 on the solder bump component 15 side are positioned on the positioning pads 19 of the printed board 20.
．次に位置決めバンプ２にベーパーを吹き付けてこれ
を第３図（ｂ）に示すように溶融させる。これによって
溶けた位置決めバンプ２の一部はスルーホール５内に侵
入する。. Next, a vapor is sprayed onto the positioning bumps 2 to melt them as shown in FIG. 3 (b). As a result, part of the melted positioning bump 2 penetrates into the through hole 5.
．位置決めバンプ２がスルーホール５内に侵入したこ
とによって、半田バンプ部品15とプリント板20は互いに
位置決めされる。この時、信号端子用パッド１上に配置
されている小径の接続用バンプ３はプリント板20のリフ
ローパッド18と漸く接触状態になる。. Since the positioning bump 2 has entered the through hole 5, the solder bump component 15 and the printed board 20 are positioned with respect to each other. At this time, the small-diameter connecting bumps 3 arranged on the signal terminal pads 1 are gradually brought into contact with the reflow pads 18 of the printed board 20.
．全体をベーパー加熱する。これによって接続用バン
プ３が溶融し、信号端子用パッド１とリフローパッド18
とを第３図（ｃ）に示すように接合する。なお、接続用
バンプ３がこの状態になった時には位置決めバンプ２は
スルーホール５内を完全に満たす位置まで上昇してい
る。. The whole is vapor-heated. This melts the connection bumps 3, and the signal terminal pads 1 and the reflow pads 18
And are joined as shown in FIG. 3 (c). When the connection bumps 3 are in this state, the positioning bumps 2 are raised to a position where the through holes 5 are completely filled.
．この時点でベーパー加熱を停止し、冷却後にこれを
取り出す。. At this point, the vapor heating is stopped, and after cooling, it is taken out.
以上の実施例は、位置決めバンプ２と接続用バンプ３
の両方をパッケージ10側に配置した形にしているが、こ
れらをプリント板20側に配置するようにしてもかまわな
い。In the above-described embodiment, the positioning bumps 2 and the connecting bumps 3 are used.
Both of them are arranged on the package 10 side, but they may be arranged on the printed board 20 side.
以上の説明から明らかなように本発明によれば、ガイ
ド治具等の位置決め治具を用いることなしに半田バンプ
部品をプリント板に正確に位置決めできる上、半田付け
中に半田バンプ部品が治具等に影響されてズレルような
ことが無いため、作業効率と品質の向上に資するところ
が頗る大である。As is clear from the above description, according to the present invention, the solder bump component can be accurately positioned on the printed board without using a positioning jig such as a guide jig, and the solder bump component is fixed by the jig during soldering. Since it is not affected by such factors as slur, it greatly contributes to the improvement of work efficiency and quality.
第１図（ａ）と（ｂ）は本発明に用いる半田バンプ部品
の一構成例を示す平面図とそのＡ−Ａ線部の断面形状を
示す要部側断面図、 第２図は本発明に用いるプリント板の一構成例を示す要
部斜視図、 第３図（ａ）と（ｂ）と（ｃ）は本発明による実装方法
を示す要部側断面図、 第４図（ａ）と（ｂ）と（ｃ）は従来の半田バンプ部品
の構成例を示す斜視図と平面図とそのＢ−Ｂ線部の断面
形状を示す要部側断面図、 第５図従来のプリント板の一構成例を示す要部斜視図、 第６図は従来の半田バンプ部品の実装方法の一例を示す
要部側断面図である。 図において、１は信号端子用パッド、 ２は位置決めバンプ、 ３は接続用バンプ、 ５はスルーホール、 10はパッケージ、 15と25は半田バンプ部品、 18はリフローパッド、 19は位置決め用パッド、 20と40はプリント板、 30はガイド治具、 をそれぞれ示す。FIGS. 1 (a) and 1 (b) are a plan view showing one structural example of a solder bump component used in the present invention and a side sectional view showing the sectional shape of an AA line part thereof, and FIG. FIG. 3 (a), FIG. 3 (b), and FIG. 3 (c) are side cross-sectional views showing the mounting method according to the present invention, and FIG. 4 (a). (B) and (c) are a perspective view and a plan view showing a configuration example of a conventional solder bump component, and a side sectional view of an essential part showing a sectional shape of a BB line part thereof. FIG. 6 is a side sectional view of an essential part showing an example of a conventional method of mounting a solder bump component. In the figure, 1 is a signal terminal pad, 2 is a positioning bump, 3 is a connecting bump, 5 is a through hole, 10 is a package, 15 and 25 are solder bump parts, 18 is a reflow pad, 19 is a positioning pad, 20 And 40 are printed boards, 30 is a guide jig, respectively.
Claims (1)
用パッド（１）を有して成る半田バンプ部品（15）をプ
リント板（20）等に実装する際に適用される方法であっ
て、 前記半田バンプ部品（15）側のパッケージ（10）には当
該パッケージ（10）の下面から上面に貫通するスルーホ
ール（５）を設け、前記プリント板（20）側には該スル
ーホール（５）に対応する位置決め用パッド（19）を設
け、 前記半田バンプ部品（15）をプリント板（20）に実装す
るに際しては、前記スルーホール（５）と位置決め用パ
ッド（19）間に位置決めバンプ（２）を配置し、前記信
号端子用パッド（１）と前記プリント板（20）のリフロ
ーパッド（18）間には該位置決めバンプ（２）よりも小
径の接続用バンプ（３）を配置するようにしたことを特
徴とする半田バンプ部品の実装方法。1. A method applied when mounting a solder bump component (15) having a plurality of signal terminal pads (1) on a surface of a package (10) on a printed board (20) or the like. Then, the package (10) on the solder bump component (15) side is provided with a through hole (5) penetrating from the lower surface to the upper surface of the package (10), and the through hole (5) is provided on the printed board (20) side. A positioning pad (19) corresponding to (5) is provided, and when mounting the solder bump component (15) on the printed board (20), positioning is performed between the through hole (5) and the positioning pad (19). A bump (2) is arranged, and a connecting bump (3) having a diameter smaller than that of the positioning bump (2) is arranged between the signal terminal pad (1) and the reflow pad (18) of the printed board (20). Solder van characterized in that How to mount components.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63321300A JP2555720B2 (en) | 1988-12-19 | 1988-12-19 | Solder bump component mounting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63321300A JP2555720B2 (en) | 1988-12-19 | 1988-12-19 | Solder bump component mounting method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02164045A JPH02164045A (en) | 1990-06-25 |
| JP2555720B2 true JP2555720B2 (en) | 1996-11-20 |
Family
ID=18131036
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63321300A Expired - Fee Related JP2555720B2 (en) | 1988-12-19 | 1988-12-19 | Solder bump component mounting method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2555720B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2004075282A1 (en) | 2003-02-24 | 2004-09-02 | Hamamatsu Photonics K.K. | Semiconductor device and radiation detector employing it |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04314355A (en) * | 1991-04-12 | 1992-11-05 | Nec Corp | Chip carrier and soldering method thereof |
| CA2138032A1 (en) * | 1992-06-19 | 1994-01-06 | Allen D. Hertz | Self-aligning electrical contact array |
| JP3935091B2 (en) | 2003-02-27 | 2007-06-20 | 浜松ホトニクス株式会社 | Semiconductor device and radiation detector using the same |
| JP4138529B2 (en) | 2003-02-24 | 2008-08-27 | 浜松ホトニクス株式会社 | Semiconductor device and radiation detector using the same |
| JP2009054611A (en) | 2007-08-23 | 2009-03-12 | Fujitsu Ltd | Mounting structure, manufacturing method therefor, semiconductor device, and manufacturing method therefor |
-
1988
- 1988-12-19 JP JP63321300A patent/JP2555720B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2004075282A1 (en) | 2003-02-24 | 2004-09-02 | Hamamatsu Photonics K.K. | Semiconductor device and radiation detector employing it |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02164045A (en) | 1990-06-25 |
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