CN114145080B - Chip component, method for manufacturing chip component, and method for manufacturing electronic device - Google Patents
Chip component, method for manufacturing chip component, and method for manufacturing electronic device Download PDFInfo
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- CN114145080B CN114145080B CN202080052169.5A CN202080052169A CN114145080B CN 114145080 B CN114145080 B CN 114145080B CN 202080052169 A CN202080052169 A CN 202080052169A CN 114145080 B CN114145080 B CN 114145080B
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- electrode
- bonding
- chip component
- joint
- protruding
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- 238000004519 manufacturing process Methods 0.000 title claims description 78
- 238000000034 method Methods 0.000 title claims description 77
- 229910000679 solder Inorganic materials 0.000 claims abstract description 134
- 239000000463 material Substances 0.000 claims abstract description 114
- 230000004907 flux Effects 0.000 claims description 88
- 238000010438 heat treatment Methods 0.000 claims description 20
- 239000000203 mixture Substances 0.000 claims description 11
- 230000002093 peripheral effect Effects 0.000 claims description 4
- 238000002844 melting Methods 0.000 description 20
- 230000008018 melting Effects 0.000 description 20
- 230000000052 comparative effect Effects 0.000 description 15
- 238000005476 soldering Methods 0.000 description 13
- 239000010949 copper Substances 0.000 description 12
- 229910052802 copper Inorganic materials 0.000 description 9
- 230000000694 effects Effects 0.000 description 9
- 230000004048 modification Effects 0.000 description 8
- 238000012986 modification Methods 0.000 description 8
- 230000008569 process Effects 0.000 description 8
- 238000005304 joining Methods 0.000 description 7
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 6
- 238000001816 cooling Methods 0.000 description 6
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 239000000155 melt Substances 0.000 description 4
- 239000012768 molten material Substances 0.000 description 4
- 230000002950 deficient Effects 0.000 description 3
- 229910052742 iron Inorganic materials 0.000 description 3
- 238000007650 screen-printing Methods 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- DJOYTAUERRJRAT-UHFFFAOYSA-N 2-(n-methyl-4-nitroanilino)acetonitrile Chemical compound N#CCN(C)C1=CC=C([N+]([O-])=O)C=C1 DJOYTAUERRJRAT-UHFFFAOYSA-N 0.000 description 1
- RSWGJHLUYNHPMX-UHFFFAOYSA-N Abietic-Saeure Natural products C12CCC(C(C)C)=CC2=CCC2C1(C)CCCC2(C)C(O)=O RSWGJHLUYNHPMX-UHFFFAOYSA-N 0.000 description 1
- KHPCPRHQVVSZAH-HUOMCSJISA-N Rosin Natural products O(C/C=C/c1ccccc1)[C@H]1[C@H](O)[C@@H](O)[C@@H](O)[C@@H](CO)O1 KHPCPRHQVVSZAH-HUOMCSJISA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 229910002113 barium titanate Inorganic materials 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 238000007664 blowing Methods 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- WEUCVIBPSSMHJG-UHFFFAOYSA-N calcium titanate Chemical compound [O-2].[O-2].[O-2].[Ca+2].[Ti+4] WEUCVIBPSSMHJG-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003985 ceramic capacitor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- VEALVRVVWBQVSL-UHFFFAOYSA-N strontium titanate Chemical compound [Sr+2].[O-][Ti]([O-])=O VEALVRVVWBQVSL-UHFFFAOYSA-N 0.000 description 1
- KHPCPRHQVVSZAH-UHFFFAOYSA-N trans-cinnamyl beta-D-glucopyranoside Natural products OC1C(O)C(O)C(CO)OC1OCC=CC1=CC=CC=C1 KHPCPRHQVVSZAH-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/142—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals or tapping points being coated on the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/148—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals embracing or surrounding the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
- H01G2/02—Mountings
- H01G2/06—Mountings specially adapted for mounting on a printed-circuit support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
- H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/328—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The chip component (1) is provided with: an electronic component (10) including a1 st electrode (11) and a2 nd electrode (12) arranged at an interval from the 1 st electrode in the 1 st direction (A); a1 st bonding portion (21) bonded to the 1 st electrode; and a2 nd bonding portion (22) bonded to the 2 nd electrode. The material constituting the 1 st joint portion and the 2 nd joint portion includes solder. The 1 st bonding portion has a1 st protruding portion (21A) protruding with respect to the 1 st electrode in a2 nd direction (B) intersecting the 1 st direction. The 2 nd bonding portion has a2 nd protruding portion (22A) protruding in the 2 nd direction with respect to the 2 nd electrode.
Description
Technical Field
The present disclosure relates to a chip (chip) component, a method of manufacturing the chip component, and a method of manufacturing an electronic device.
Background
Miniaturization and high functionality are sought for electronic devices. Along with this, miniaturization of electronic components mounted on printed circuit boards by soldering in electronic devices is also demanded. Miniaturized electronic components are mounted at a higher density.
In Japanese unexamined patent publication No. 62-058030, as a method for mounting a miniaturized electronic component on a printed circuit board, the following method is disclosed: the soldering portions are formed by soldering the electrode portions of the electronic component in advance, the soldering portions are arranged on the electrode portions of the printed circuit board, and the soldering portions are melted in a far infrared ray furnace.
Prior art literature
Patent literature
Patent document 1: japanese laid-open patent publication No. 62-058030
Disclosure of Invention
Problems to be solved by the invention
However, in the case of mounting a miniaturized electronic component on a printed circuit board by the above-described conventional mounting method, it is difficult to suppress occurrence of a joining failure of a solder joint portion between the electronic component and the printed circuit board.
Specifically, in the above-described conventional mounting method, since each soldered portion is formed by soldering each electrode portion, it is difficult to make the shape of each soldered portion formed on 1 electronic component uniform. Therefore, in a state where each soldered portion is arranged on each electrode portion of the printed circuit board, the contact state between each soldered portion and each electrode portion of the printed circuit board becomes uneven, and the timing at which each soldered portion melts becomes uneven. In this case, a joint failure such as a so-called tombstoning phenomenon (CHIP STANDING) is likely to occur in a solder joint portion between the electronic component and the printed circuit board, due to positional displacement of the electronic component with respect to the printed circuit board.
The main object of the present disclosure is to provide a chip component capable of suppressing occurrence of a defective joint between an electronic component and a solder joint of a printed circuit board, as compared with a chip component used in a conventional mounting method, and a method for manufacturing the same.
Another object of the present disclosure is to provide a method for manufacturing an electronic device, which can suppress occurrence of a joining failure at a solder joint portion between an electronic component and a printed circuit board, as compared with a conventional mounting method.
Means for solving the problems
The chip component according to the present disclosure includes: an electronic component including a 1 st electrode and a2 nd electrode arranged at an interval from the 1 st electrode in the 1 st direction; a 1 st bonding portion bonded to the 1 st electrode; and a2 nd bonding portion bonded to the 2 nd electrode. The material constituting the 1 st joint portion and the 2 nd joint portion includes solder. The 1 st bonding portion has a 1 st protruding portion protruding with respect to the 1 st electrode in a2 nd direction intersecting the 1 st direction. The 2 nd bonding portion has a2 nd protruding portion protruding in the 2 nd direction with respect to the 2 nd electrode.
ADVANTAGEOUS EFFECTS OF INVENTION
According to the present disclosure, a chip component and a method for manufacturing the same, which can suppress occurrence of a joint failure in a solder joint portion between an electronic component and a printed circuit board as compared with a chip component used in a conventional mounting method, and a method for manufacturing an electronic device, which can suppress occurrence of a joint failure in a solder joint portion between an electronic component and a printed circuit board as compared with a conventional mounting method, can be provided.
Drawings
Fig. 1 is a perspective view showing a chip component according to embodiment 1.
Fig. 2 is a cross-sectional view of the chip component shown in fig. 1.
Fig. 3 is a cross-sectional view showing one process of the method for manufacturing a chip component shown in fig. 1.
Fig. 4 is a cross-sectional view of one process after the process shown in fig. 3, illustrating the method for manufacturing the chip component shown in fig. 1.
Fig. 5 is a cross-sectional view of one step after the step shown in fig. 4, illustrating the method for manufacturing the chip component shown in fig. 1.
Fig. 6 is a cross-sectional view of one step after the step shown in fig. 5, illustrating the method for manufacturing the chip component shown in fig. 1.
Fig. 7 is a cross-sectional view of one step after the step shown in fig. 6, illustrating the method for manufacturing the chip component shown in fig. 1.
Fig. 8 is a cross-sectional view showing an electronic device according to embodiment 1.
Fig. 9 is a cross-sectional view showing one process of the method for manufacturing the electronic device shown in fig. 8.
Fig. 10 is a cross-sectional view of one process after the process shown in fig. 9, illustrating the method of manufacturing the electronic device shown in fig. 8.
Fig. 11 is a cross-sectional view of one process after the process shown in fig. 10, illustrating the method of manufacturing the electronic device shown in fig. 8.
Fig. 12 is a cross-sectional view showing a chip component according to embodiment 2.
Fig. 13 is a cross-sectional view showing one step of the method for manufacturing the chip component shown in fig. 12.
Fig. 14 is a cross-sectional view of one step after the step shown in fig. 13, illustrating the method of manufacturing the chip component shown in fig. 12.
Fig. 15 is a cross-sectional view of one step after the step shown in fig. 14, illustrating the method of manufacturing the chip component shown in fig. 12.
Fig. 16 is a cross-sectional view showing a modification of the method for manufacturing the chip component shown in fig. 12.
Fig. 17 is a cross-sectional view showing a chip component according to embodiment 3.
Fig. 18 is a cross-sectional view showing one step of the method for manufacturing the chip component shown in fig. 17.
Fig. 19 is a cross-sectional view of one step after the step shown in fig. 19, illustrating the method of manufacturing the chip component shown in fig. 17.
Fig. 20 is a cross-sectional view of one step after the step shown in fig. 20, illustrating the method of manufacturing the chip component shown in fig. 18.
Fig. 21 is a cross-sectional view showing a chip component according to embodiment 4.
Fig. 22 is a cross-sectional view showing a modification of the chip component according to embodiment 1.
Fig. 23 is a cross-sectional view showing another modification of the chip component according to embodiment 1.
Fig. 24 is a cross-sectional view showing a chip component according to embodiment 5.
Fig. 25 is a plan view showing the chip part shown in fig. 24.
Fig. 26 is a cross-sectional view showing one step of the method for manufacturing the chip component shown in fig. 24.
Fig. 27 is a cross-sectional view of one step after the step shown in fig. 26, illustrating the method of manufacturing the chip component shown in fig. 24.
Fig. 28 is a cross-sectional view of one step after the step shown in fig. 27, illustrating the method of manufacturing the chip component shown in fig. 24.
Fig. 29 is a cross-sectional view showing an electronic device according to embodiment 5.
Fig. 30 is a cross-sectional view showing a comparative example of the electronic device according to embodiment 5.
Fig. 31 is a cross-sectional view showing another comparative example of the electronic device according to embodiment 5.
Detailed Description
Embodiments of the present disclosure will be described below with reference to the drawings. In addition, the same or corresponding portions in the following drawings are denoted by the same reference numerals, and the description thereof is not repeated.
Embodiment 1.
< Construction of chip component >
As shown in fig. 1 and 2, the chip component 1 according to embodiment 1 includes an electronic component 10, and a1 st joint portion 21 and a 2 nd joint portion 22, and is a component in which these portions are integrally formed.
The electronic component 10 includes a1 st electrode 11, a 2 nd electrode 12, and a non-electrode portion 13. The 1 st electrode 11 and the 2 nd electrode 12 are arranged at a distance from each other in the 1 st direction a. The 1 st electrode 11 and the 2 nd electrode 12 constitute, for example, both end portions of the electronic component 10 in the 1 st direction a. The material constituting the 1 st electrode 11 and the 2 nd electrode 12 is a conductive material, and includes copper (Cu), for example. The material constituting the non-electrode portion 13 is, for example, a material having lower conductivity than the material constituting the 1 st electrode 11 and the 2 nd electrode 12.
The 1 st electrode 11 has: a 1 st surface 11A extending in the 1 st direction a and the 3 rd direction C toward the 2 nd direction B; and a2 nd face 11B that extends toward the 1 st direction a and along the 2 nd direction B and the 3 rd direction C. The 2 nd direction B is a direction intersecting the 1 st direction a, and the 3 rd direction C is a direction intersecting the 1 st direction a and the 2 nd direction B. The 1 st direction a, the 2 nd direction B, and the 3 rd direction C are, for example, orthogonal to each other. The 2 nd direction B is, for example, the up-down direction.
The 2 nd electrode 12 has: a3 rd surface 12A extending in the 1 st direction a and the 3 rd direction C toward the 2 nd direction B; and a 4 th face 12B that extends toward the 1 st direction a and along the 2 nd direction B and the 3 rd direction C. The 3 rd surface 12A is disposed on the same plane as the 1 st surface 11A, for example. The 4 th surface 12B faces the opposite side of the 2 nd surface 11B in the 1 st direction a.
The electronic component 10 may have any configuration, for example, a ceramic capacitor, as long as it includes the surface-mount electronic component having the above-described configuration. In this case, the material constituting the non-electrode portion 13 is a ceramic dielectric, for example, at least one of barium titanate (BaTiO 3), calcium titanate (CaTiO 3), strontium titanate (SrTiO 3), and calcium zirconate (CaZrO 3). The electronic component 10 may be configured as a resistor.
The 1 st bonding portion 21 is bonded to the 1 st electrode 11. The 1 st engagement portion 21 engages with at least a part of the 1 st surface 11A and the 2 nd surface 11B. The 1 st joint 21 is joined to, for example, the entire 1 st surface 11A and a part of the 2 nd surface 11B. The material constituting the 1 st joint portion 21 includes solder.
The 1 st bonding portion 21 has a 1 st protruding portion 21A protruding in the 2 nd direction B with respect to the 1 st surface 11A of the 1 st electrode 11. The 1 st protruding portion 21A has: a 1 st portion 21C arranged in a region overlapping with the 1 st electrode 11 in the 2 nd direction B; and a 2 nd portion 21D disposed in a region not overlapping with the 1 st electrode 11 in the 2 nd direction B and protruding in the 1 st direction a with respect to the 2 nd surface 11B of the 1 st electrode 11. The 1 st portion 21C and the 2 nd portion 21D are connected to each other to form a single body.
The 1 st bonding portion 21 further has, for example, a portion that does not protrude in the 2 nd direction B with respect to the 1 st electrode 11, in other words, a 3 rd portion 21B that is disposed so as to overlap with the 1 st electrode 11 in the 1 st direction a. The 3 rd portion 21B protrudes in the 1 st direction a with respect to the 2 nd face 11B of the 1 st electrode 11. The 1 st projecting portion 21A and the 3 rd projecting portion 21B are connected to each other to constitute a single body. The 3 rd portion 21B is joined to, for example, a region on the 1 st surface 11A side of the center of the 2 nd surface 11B in the 2 nd direction B.
The top 21T of the 1 st joint 21, which is the longest distance from the 1 st surface 11A in the 2 nd direction B, is included in the 1 st protruding portion 21A. For example, the top 21T is included in the 1 st portion 21C of the 1 st protruding portion 21A.
The outermost peripheral surface of the 1 st protruding portion 21A is a curved surface when viewed from the 3 rd direction C. When the 1 st protruding portion 21A is arranged on a plane extending along the 1 st direction a and the 3 rd direction C, the top portion 21T of the 1 st protruding portion 21A is formed in line contact with the above-described plane. In the 1 st projection 21A, line contact is made with the plane. The 1 st protruding portion 21A is constituted as a part of a cylinder extending in the 3 rd direction C.
The 2 nd bonding portion 22 is bonded to the 2 nd electrode 12. The 2 nd engaging portion 22 engages with at least a portion of the 3 rd surface 12A and the 4 th surface 12B. The 2 nd joint 22 is joined to, for example, the entire 3 rd surface 12A and a part of the 4 th surface 12B. The material constituting the 2 nd joint 22 includes solder.
The 2 nd bonding portion 22 has a 2 nd protruding portion 22A protruding in the 2 nd direction B with respect to the 3 rd face 12A of the 2 nd electrode 12. The 2 nd projection 22A has: a 4 th portion 22C arranged in a region overlapping the 2 nd electrode 12 in the 2 nd direction B; and a 5 th portion 22D disposed in a region that does not overlap the 2 nd electrode 12 in the 2 nd direction B and protruding in the 1 st direction a with respect to the 4 th surface 12B of the 2 nd electrode 12. The 4 th portion 22C and the 5 th portion 22D are connected to each other to constitute a single body.
The 2 nd bonding portion 22 also has, for example, a portion that does not protrude in the 2 nd direction B with respect to the 2 nd electrode 12, in other words, a 6 th portion 22B that is arranged so as to overlap with the 2 nd electrode 12 in the 1 st direction a. The 6 th portion 22B protrudes in the 1 st direction a with respect to the 4 th face 12B of the 2 nd electrode 12. The 2 nd projection 22A and the 6 th projection 22B are connected to each other to constitute a single body. The 6 th portion 22B is joined to, for example, a region on the 3 rd surface 12A side of the center of the 4 th surface 12B in the 2 nd direction B.
The top 22T of the 2 nd engaging portion 22, which is the longest distance from the 3 rd face 12A in the 2 nd direction B, is included in the 2 nd protruding portion 22A. For example, the top 22T is included in the 4 th portion 22C of the 2 nd protruding portion 22A.
The outermost peripheral surface of the 2 nd projecting portion 22A is a curved surface when viewed from the 3 rd direction C. When the 2 nd protruding portion 22A is arranged on a plane extending along the 1 st and 3 rd directions a and C, the top 22T of the 2 nd protruding portion 22A is formed in line contact with the above-described plane. The 2 nd projection 22A is constituted as a part of a cylinder extending in the 3 rd direction C.
As shown in fig. 2, when viewed from the 3 rd direction C, the height h1 of the 1 st protruding portion 21A in the 2 nd direction B with respect to the 1 st surface 11A of the 1 st electrode 11 is equal to the height h2 of the 2 nd protruding portion 22A in the 2 nd direction B with respect to the 3 rd surface 12A of the 2 nd electrode 12.
As shown in fig. 2, a distance L1 in the 1 st direction a between the top 21T of the 1 st protruding portion 21A and the top 22T of the 2 nd protruding portion 22A is equal to or greater than a shortest distance L2 in the 1 st direction a between the 1 st electrode 11 and the 2 nd electrode 12 (in other words, a width of the 1 st direction a of the non-electrode portion 13). The distance L1 is equal to or less than the longest distance L3 in the 1 st direction a between the 1 st electrode 11 and the 2 nd electrode 12 (in other words, the shortest distance in the 1 st direction a between the 2 nd surface 11B of the 1 st electrode 11 and the 4 th surface 12B of the 2 nd electrode 12). From another point of view, the top portion 21T overlaps the 1 st surface 11A of the 1 st electrode 11 in the 2 nd direction B, and the top portion 22T overlaps the 3 rd surface 12A of the 2 nd electrode 12 in the 2 nd direction B.
As shown in fig. 2, when viewed from the 3 rd direction C, the 1 st joint portion 21 and the 2 nd joint portion 22 are formed symmetrically with respect to a center line CL passing through the center between the 1 st electrode 11 and the 2 nd electrode 12 in the 1 st direction a and extending along the 2 nd direction B. The outer shape lines of the 1 st joint portion 21 and the 2 nd joint portion 22 are formed in, for example, a substantially circular arc shape when viewed from the 3 rd direction C.
The cross-sectional shape of the chip component 1 perpendicular to the 3 rd direction C is constant, for example, regardless of the position of the cross-section in the 3 rd direction C.
The material constituting the 1 st joint 21 and the 2 nd joint 22 is, for example, lead-free solder. The material constituting the 1 st bonding portion 21 and the 2 nd bonding portion 22 contains, for example, tin (Sn), silver (Ag), and copper (Cu), and an alloy composition thereof is, for example, sn-3.0% Ag-0.5% Cu. The material constituting the 1 st bonding portion 21 and the 2 nd bonding portion 22 may be any solder material, and may be, for example, a solder material obtained by adding at least one of Ag, cu, bismuth (Bi), indium (In), antimony (Sb), and lead (Pb) to Sn. The 1 st joint 21 and the 2 nd joint 22 are formed by, for example, cooling a mixture of the solder material and the flux after the mixture is melted (details will be described later).
The size of the electronic component 10 is not particularly limited, and is, for example, 0603 (the length of the 1 st direction a (the distance L3 described above) is 0.6mm and the length of the 3 rd direction C is 0.3 mm), 0201 (the length of the 1 st direction a is 0.2mm and the length of the 3 rd direction C is 0.1 mm), 1005 (the length of the 1 st direction a is 1.0mm and the length of the 3 rd direction C is 0.5 mm), or 1608 (the length of the 1 st direction a is 1.6mm and the length of the 3 rd direction C is 0.8 mm).
Method for manufacturing chip component
The chip component 1 shown in fig. 1 and 2 is manufactured by the method for manufacturing the chip component shown in fig. 3 to 7. In the method of manufacturing the chip component shown in fig. 3 to 7, the 1 st bonding portion 21 and the 2 nd bonding portion 22 are formed by screen printing using the mold 101 and the mask 102. In the present manufacturing method, the 2 nd direction B of the electronic component 10 is set to be the up-down direction, and the 1 st direction a and the 3 rd direction C of the electronic component 10 are set to be directions intersecting the up-down direction.
First, a mold 101 and a mask 102 shown in fig. 3 are prepared (step 1). The mold 101 has an upper surface 101A. The upper surface 101A is a plane extending in a direction intersecting the up-down direction. Hereinafter, the configuration of the mold 101 will be described also with reference to the 1 st, 2 nd, and 3 rd directions a, B, and C of the electronic component 10 in the 4 th and 5 th steps (details will be described later) of disposing the electronic component 10 on the mold 101.
The mold 101 has a 1 st recess 201 and a 2 nd recess 202 recessed with respect to the upper surface 101A. The 1 st recess 201 and the 2 nd recess 202 of the die 101 are used to form bonding materials described later into the 1 st bonding portion 21 and the 2 nd bonding portion 22 of the chip component 1. The 1 st recess 201 and the 2 nd recess 202 are arranged at intervals in the 1 st direction a. The depth of the 1 st recess 201 is equal to the height h1 of the 1 st bonding portion 21 of the chip component 1. The depth of the 2 nd recess 202 is equal to the height h2 of the 2 nd bonding portion 22 of the chip component 1. The length of the 1 st recess 201 and the 2 nd recess 202 in the 3 rd direction C is equal to the length of the 1 st electrode 11 and the 2 nd electrode 12 in the 3 rd direction C, for example. The depth of the 1 st concave portion 201 is equal to the depth of the 2 nd concave portion 202. The 1 st concave portion 201 and the 2 nd concave portion 202 are formed symmetrically with respect to a center line CL2 passing through the center between the 1 st concave portion 201 and the 2 nd concave portion 202 in the 1 st direction a and extending along the 2 nd direction B. The length of the 1 st direction a between the center of the 1 st recess 201 and the center of the 2 nd recess 202 in the 1 st direction a is equal to the above-described distance L1 in the chip component 1.
The mask 102 has: a lower surface 102A in contact with the upper surface 101A of the mold 101; and an upper surface 102B located on the opposite side from the lower surface 102A. The lower surface 102A and the upper surface 102B are planes extending along the 1 st direction a and the 3 rd direction C. A1 st through hole 203 and a 2 nd through hole 204 extending from the lower surface 102A to the upper surface 102B are formed in the mask 102. The 1 st through hole 203 is formed so as to be connected to the 1 st recess 201 in the 2 nd direction B. The 2 nd through hole 204 is formed so as to be connected to the 2 nd recess 202 in the 2 nd direction B. In the 1 st direction a, the width of the 1 st through hole 203 is equal to the width of the 1 st recess 201, for example. In the 1 st direction a, the width of the 2 nd through hole 204 is equal to the width of the 2 nd recess 202, for example. The width of the 1 st through hole 203 and the 2 nd through hole 204 in the 3 rd direction C is equal to the length of the 1 st electrode 11 and the 2 nd electrode 12 in the 3 rd direction C, for example. The 1 st through hole 203 and the 2 nd through hole 204 are formed symmetrically with respect to the center line CL 2.
The material constituting the mask 102 includes, for example, stainless steel (SUS). In other words, the mask 102 is, for example, a metal mask. The thickness of the mask 102, in other words, the length of each of the 1 st through-hole 203 and the 2 nd through-hole 204 in the 2 nd direction B is, for example, 100 μm.
Next, as shown in fig. 4, the joining material 23 (1 st joining material) to be the 1 st joining portion 21 is supplied into the 1 st recess 201 and the 1 st through hole 203 by screen printing. Further, the bonding material 24 (the 2 nd bonding material) to be the 2 nd bonding portion 22 is supplied into the 2 nd concave portion 202 and the 2 nd through hole 204 by screen printing (the 2 nd step). The joining material 23 fills the 1 st recess 201 and the 1 st through hole 203 without any gap. The bonding material 24 fills the inside of the 2 nd recess 202 and the 2 nd through hole 204 without any gap. The upper surfaces of the bonding materials 23 and 24 are, for example, formed on the same plane as the upper surface 102B of the mask 102.
The bonding material 23 is, for example, a mixture of a plurality of solder balls 25 and flux 26. The bonding material 24 is, for example, a mixture of a plurality of solder balls 27 and flux 28. The material constituting the solder balls 25, 27 is, for example, lead-free solder. The material constituting the solder balls 25, 27 contains, for example, sn, ag, and Cu, and their alloy composition is, for example, sn-3.0% Ag-0.5% Cu. The outer diameter of each solder ball 25, 27 is, for example, 30 μm. The sum of the volumes of the solder balls 25 is larger than the volume of the 1 st recess 201. The sum of the volumes of the solder balls 27 is larger than the volume of the 2 nd recess 202. The material comprising the fluxes 26, 28 comprises rosin. The fluxes 36, 28 fill gaps between the plurality of solder balls 25, 27.
Next, as shown in fig. 5, the mask 102 is separated from the mold 101. The joining materials 23, 24 protrude in the 2 nd direction B with respect to the mold 101. The height of the joining material 23 in the 2 nd direction B with respect to the mold 101 is equal to the height of the joining material 24 in the 2 nd direction B with respect to the mold 101.
Next, as shown in fig. 6, the electronic component 10 is prepared (step 3). Next, as shown in fig. 6, the electronic component 10 is arranged on the upper surface 101A of the mold 101 (step 4). The electronic component 10 is positioned with respect to the mold 101 and the bonding materials 23, 24 such that the center line CL of the electronic component 10 overlaps the center line CL2 of the mold 101 when viewed from the 3 rd direction C.
The 1 st electrode 11 of the electronic component 10 is disposed on a part of the 1 st recess 201 located on the 2 nd recess 202 side in the 1 st direction a. In other words, in the state shown in fig. 6, the joining material 23 has: a portion that is disposed inside the electronic component 10 in the 1 st direction a with respect to the 2 nd surface 11B and that is disposed so as to overlap the 1 st electrode 11 in the 2 nd direction B; and a portion that is disposed outside the electronic component 10 in the 1 st direction a than the 2 nd surface 11B and is disposed so as not to overlap the 1 st electrode 11 in the 2 nd direction B.
The 2 nd electrode 12 of the electronic component 10 is disposed on a part of the 2 nd recess 202 located on the 1 st recess 201 side in the 1 st direction a. In other words, in the state shown in fig. 6, the joining material 24 has: a portion that is disposed inside the electronic component 10 in the 1 st direction a than the 4 th surface 12B and that is disposed so as to overlap the 2 nd electrode 12 in the 2 nd direction B; and a portion that is disposed outside the electronic component 10 in the 1 st direction a than the 4 th surface 12B and is disposed so as not to overlap the 2 nd electrode 12 in the 2 nd direction B.
The 1 st surface 11A of the 1 st electrode 11 is in contact with the upper surface of a part of the bonding material 23 located on the bonding material 24 side in the 1 st direction a. Meanwhile, the 3 rd surface 12A of the 2 nd electrode 12 is in contact with the above-described upper surface of a part of the bonding material 24 located on the bonding material 23 side in the 1 st direction a. The lower surface of the non-electrode portion 13 of the electronic component 10, that is, the surface connected to the 1 st surface 11A of the 1 st electrode 11 and the 3 rd surface 12A of the 2 nd electrode 12, is in contact with the upper surface 102B of the mask 102. The non-electrode portion 13 of the electronic component 10 is disposed between the bonding material 23 and the bonding material 24 in the 1 st direction a and is disposed at a distance from the upper surface 101A of the mold 101 in the 2 nd direction B.
Next, the 1 st joint 21 and the 2 nd joint 22 are formed from the joint materials 23 and 24 (step 5). First, the joining materials 23, 24 are heated and melted. The heating may be performed by any method, for example, by charging the mold 101, the electronic component 10, and the entire bonding materials 23 and 24 shown in fig. 6 into a reflow oven and heating them. The heating temperature is a temperature higher than the melting point of the materials constituting the bonding materials 23, 24 and which the electronic component 10 can withstand, for example, 250 ℃. By the above-described heating, the solder balls 25, 27 and the fluxes 26, 28 are melted as a whole. Thereby, the electronic component 10 receives the action of gravity, and the non-electrode portion 13 descends until it contacts the upper surface 101A of the mold 101. A part of the melted bonding material 23 wets and spreads (wet-spreads) on the 2 nd surface 11B of the 1 st electrode 11. A part of the molten bonding material 24 wets and spreads on the 4 th surface 12B of the 2 nd electrode 12.
Here, the joining material 23 before melting has: a portion that is disposed inside the electronic component 10 in the 1 st direction a with respect to the 2 nd surface 11B and that is disposed so as to overlap the 1 st electrode 11 in the 2 nd direction B; and a portion that is disposed outside the electronic component 10 in the 1 st direction a than the 2 nd surface 11B and is disposed so as not to overlap the 1 st electrode 11 in the 2 nd direction B, the melted bonding material 23 is likely to wet and spread on the 2 nd surface 11B of the 1 st electrode 11. Also, since the joining material 24 before melting has: a portion that is disposed inside the electronic component 10 in the 1 st direction a than the 4 th surface 12B and that is disposed so as to overlap the 2 nd electrode 12 in the 2 nd direction B; and a portion that is disposed outside the electronic component 10 in the 1 st direction a than the 4 th surface 12B and is disposed so as not to overlap the 2 nd electrode 12 in the 2 nd direction B, the melted bonding material 24 is likely to wet and spread on the 4 th surface 12B of the 2 nd electrode 12.
The joining materials 23, 24 are cooled after melting. The cooling may be performed by any method, for example, by taking out the entirety of the mold 101, the electronic component 10, and the bonding materials 23 and 24 from the reflow oven. As a result, as shown in fig. 7, the chip component 1 including the electronic component 10, the 1 st bonding portion 21 formed of the bonding material 23, and the 2 nd bonding portion 22 formed of the bonding material 24 is manufactured. After the 5 th step, the chip component 1 is removed from the die 101.
< Composition of electronic device >)
The electronic device 3 according to embodiment 1 is manufactured by mounting the chip component 1 according to embodiment 1 on the printed circuit board 2. As shown in fig. 8, the electronic device 3 includes the electronic component 10, the printed circuit board 2, the 3 rd joint 41, and the 4 th joint 42.
The printed circuit board 2 includes a dielectric substrate and wiring patterns formed on the surface and inside of the dielectric substrate. The dielectric substrate has an upper surface 2A. The upper surface 2A is a plane extending along the 1 st direction a and the 3 rd direction C. The printed circuit board 2 includes a3 rd electrode 31 and a 4 th electrode 32 which are formed on the upper surface 2A and constitute a part of the wiring pattern. The 3 rd electrode 31 and the 4 th electrode 32 are arranged at a distance from each other in the 1 st direction a. The material constituting the 3 rd electrode 31 and the 4 th electrode 32 is a conductive material, and contains Cu, for example. The 3 rd electrode 31 has a face contacting the upper surface 2A and a 9 th face 31A located on the opposite side from the face. The 4 th electrode 32 has a surface in contact with the upper surface 2A and a 10 th surface 32A located on the opposite side from the surface. The height of the 3 rd electrode 31 with respect to the upper surface 2A in the 2 nd direction B is, for example, equal to the height of the 4 th electrode 32 with respect to the upper surface 2A in the 2 nd direction B.
The 1 st electrode 11 of the electronic component 10 is arranged so as to overlap the 3 rd electrode 31 in the 2 nd direction B. The 2 nd electrode 12 of the electronic component 10 is arranged so as to overlap the 4 th electrode 32 in the 2 nd direction B. When viewed from the 3 rd direction C, the electronic component 10 is arranged such that the center line CL overlaps with a center line CL3 extending along the 2 nd direction B passing through the center between the 3 rd electrode 31 and the 4 th electrode 32 in the 1 st direction a.
The 3 rd bonding portion 41 is bonded to the 1 st electrode 11 and the 3 rd electrode 31. The 3 rd joint 41 is joined to, for example, the entirety of the 1 st surface 11A, the entirety of the 2 nd surface 11B, and the entirety of the 9 th surface 31A. The 4 th bonding portion 42 is bonded to the 2 nd electrode 12 and the 4 th electrode 32. The 4 th joint 42 is joined to, for example, the entirety of the 3 rd surface 12A, the entirety of the 4 th surface 12B, and the entirety of the 10 th surface 32A. The 3 rd joint portion 41 and the 4 th joint portion 42 are formed symmetrically with respect to the center line CL3 when viewed from the 3 rd direction C.
The material constituting the 3 rd joint 41 and the 4 th joint 42 contains solder. The 3 rd bonding portion 41 is formed of the 1 st bonding portion 21 of the chip component 1 and the flux 33 described later. The 4 th bonding portion 42 is formed of the 2 nd bonding portion 22 of the chip component 1 and the solder 34 described later.
Method for manufacturing electronic device
The electronic device 3 shown in fig. 8 is manufactured by the manufacturing method of the electronic device 3 shown in fig. 9 and 10.
First, the chip component 1 and the printed circuit board 2 shown in fig. 9 are prepared (step 7). On the printed circuit board 2, the 3 rd electrode 31 and the 4 th electrode 32 are formed.
Next, as shown in fig. 10, flux 33 is formed on the 3 rd electrode 31 of the printed circuit board 2, and flux 34 is formed on the 4 th electrode 32. The flux 33 is formed so as to cover the 3 rd electrode 31, for example. The flux 34 is formed so as to cover the 4 th electrode 32, for example.
Next, as shown in fig. 11, the chip component 1 is arranged on the printed circuit board 2 shown in fig. 10 (step 8). The chip component 1 is positioned relative to the printed circuit board 2 in such a manner that the center line CL overlaps the center line CL3 when viewed from the 3 rd direction C. The 1 st bonding portion 21 is disposed on the 3 rd electrode 31 and the flux 33. Meanwhile, the 2 nd bonding portion 22 is disposed on the 4 th electrode 32 and the flux 34.
Next, the 3 rd joint 41 is formed by the 1 st joint 21, and the 4 th joint 42 is formed by the 2 nd joint 22 (step 9). First, as shown in fig. 11, the 1 st joint 21, the 2 nd joint 22, the flux 33, and the flux 34 are heated and melted. The heating may be performed by any method, for example, as shown in fig. 11, by blowing hot air through the nozzle 300 to the 1 st joint 21, the 2 nd joint 22, the flux 33, and the flux 34. The nozzle 300 is disposed on the opposite side of the printed circuit board 2 with respect to the electronic component 10, for example. The heating temperature is a temperature higher than the melting point of the materials constituting the 1 st bonding portion 21, the 2 nd bonding portion 22, the flux 33, and the flux 34 and which the electronic component 10 can withstand, for example, 250 ℃. By the above heating, the 1 st joint 21, the 2 nd joint 22, the flux 33, and the flux 34 are melted as a whole. Thus, a part of the molten 1 st joint 21 wets and spreads on the 2 nd surface 11B of the 1 st electrode 11. A part of the molten 2 nd bonding portion 22 wets and spreads on the 4 th surface 12B of the 2 nd electrode 12.
The 1 st joint 21 and the 2 nd joint 22 are cooled after melting. The cooling may be performed by any method, for example, by stopping the heating by the nozzle 300. As a result, as shown in fig. 8, the electronic device 3 having the electronic component 10, the printed circuit board 2, the 3 rd bonding portion 41 formed of the 1 st bonding portion 21 and the solder 33, and the 4 th bonding portion 42 formed of the 2 nd bonding portion 22 and the solder 34 is manufactured.
< Effect >
The operational effects of the chip component 1 will be described below in comparison with comparative examples. First, as a comparative example, the above-described conventional chip component is considered. In the comparative example, each soldered portion for bonding with each electrode of the printed circuit board was bonded by soldering with respect to each electrode of the electronic component. Thus, each of the soldered portions of the comparative example does not protrude toward the printed circuit board side with respect to each electrode of the electronic component, and it is difficult to improve uniformity of the shape of the soldered portion joined to the 1 st electrode and the shape of the soldered portion joined to the 2 nd electrode. Therefore, in the comparative example, variations are likely to occur in a state where each soldered portion is in contact with each electrode of the printed circuit board, and for example, the following states may occur: the solder portion bonded to the 1 st electrode is in contact with the 3 rd electrode of the printed circuit board, but the solder portion bonded to the 2 nd electrode is not in contact with the 4 th electrode of the printed circuit board. If the soldered portions are heated in such a state, there is a deviation in the timing of melting each soldered portion, and there is a problem that the electronic component is deviated from a position where it should be arranged, or the electronic component is lifted up, and one electrode is not bonded to the printed circuit board, or the like (bonding failure). Such a bonding failure is particularly likely to occur in miniaturized electronic components. This is because, in a miniaturized electronic component, the above-described poor bonding is likely to occur even if the degree of the deviation is small. In addition, the above-mentioned bonding failure is a problem particularly in miniaturized electronic components. In addition, when a bonding failure occurs, repair work is also generally performed by so-called manual soldering using a soldering iron, but it is difficult to appropriately bring the soldering iron into contact with a miniaturized electronic component.
In contrast, the chip component 1 includes the electronic component 10, the 1 st bonding portion 21, and the 2 nd bonding portion 22. The material constituting the 1 st joint portion 21 and the 2 nd joint portion 22 contains solder. The 1 st bonding portion 21 has a1 st protruding portion 21A protruding with respect to the 1 st electrode 11 in the 2 nd direction B intersecting the 1 st direction a. The 2 nd bonding portion 22 has a 2 nd protruding portion 22A protruding in the 2 nd direction B with respect to the 2 nd electrode 12. Therefore, the 1 st joint portion 21 and the 2 nd joint portion 22 of the chip component 1 can reliably be in contact with the 3 rd electrode 31 and the 4 th electrode 32 as compared with the soldered portion of the comparative example. For example, when warpage or the like occurs on the printed circuit board 2, the 1 st and 2 nd bonding portions 21 and 22 of the chip component 1 can be brought into contact with the 3 rd and 4 th electrodes 31 and 32. Therefore, when the 1 st joint 21 and the 2 nd joint 22 are melted in the manufacturing method of the electronic device 3, the variation in timing of melting the 1 st joint 21 and the 2 nd joint 22 is suppressed as compared with the above-described comparative example. That is, according to the chip component 1, occurrence of a defective joint such as a shift of the electronic component 10 and a warpage of the electronic component in the electronic device 3 can be suppressed.
Further, the 1 st joint 21 including the 1 st protruding portion 21A and the 2 nd joint 22 including the 2 nd protruding portion 22A can be easily manufactured using the mold 101. Thus, the chip component 1 can be manufactured relatively easily. The uniformity of the shape of the 1 st joint 21 and the shape of the 2 nd joint 22 is improved as compared with the uniformity of each soldered portion of the comparative example formed by soldering without using the die 101. Further, the uniformity of the shapes of the 1 st joint portion 21 and the 2 nd joint portion 22 between the plurality of chip components 1 manufactured using the same mold 101 is improved as compared with the uniformity of the brazing portions between the plurality of comparative examples.
In the chip component 1, the height h1 of the 1 st protruding portion 21A in the 2 nd direction B with respect to the 1 st electrode 11 and the height h2 of the 2 nd protruding portion 22A in the 2 nd direction B with respect to the 2 nd electrode 12 are equal when viewed from the 3 rd direction C.
The 1 st joint 21 and the 2 nd joint 22 are equally in contact with each other with respect to 1 plane. Thus, the chip component 1 is suitable for a chip component bonded to the printed circuit board 2 in which the upper surfaces of the 3 rd electrode 31 and the 4 th electrode 32 are disposed on the same plane.
In the chip component 1, the 1 st bonding portion 21 and the 2 nd bonding portion 22 are formed symmetrically with respect to a center line CL passing through the center between the 1 st electrode 11 and the 2 nd electrode 12 in the 1 st direction a and extending along the 2 nd direction B when viewed from the 3 rd direction C.
The 3 rd bonding portion 41 and the 4 th bonding portion 42 of the electronic device 3 manufactured using such a chip component 1 may be symmetrically formed with respect to the center line CL. Accordingly, the joining reliability of the 3 rd joining portion 41 and the 4 th joining portion 42 in the electronic device 3 is improved as compared with the joining reliability of the conventional electronic device manufactured by using the above comparative example.
In the chip component 1, the outermost peripheral surfaces of the 1 st protruding portion 21A and the 2 nd protruding portion 22A are curved when viewed from the 3 rd direction C. More specifically, when the 1 st protruding portion 21A and the 2 nd protruding portion 22A are arranged on planes extending in the 1 st direction a and the 3 rd direction C, respectively, the 1 st protruding portion 21A and the 2 nd protruding portion 22A are formed in such a manner as to make point contact or line contact with the above-described planes, respectively.
If the planar region of the 1 st projecting portion 21A and the planar region of the 2 nd projecting portion 22A that are in contact with the plane are formed to be the same plane, the uniformity is improved when the 1 st projecting portion 21A and the 2 nd projecting portion 22A are in surface contact with the plane. In contrast, when the 1 st projecting portion 21A and the 2 nd projecting portion 22A are in line contact with the plane, the uniformity is improved if the linear region of the 1 st projecting portion 21A in contact with the plane and the linear region of the 2 nd projecting portion 22A in contact with the plane are parallel.
In the case where the 1 st projecting portion 21A and the 2 nd projecting portion 22A are in point contact with the plane, the relative positional relationship between the point-like region of the 1 st projecting portion 21A in contact with the plane and the point-like region of the 2 nd projecting portion 22A in contact with the plane is not particularly limited, and the uniformity is improved.
In the chip component 1, the top 21T of the 1 st protruding portion 21A in the 2 nd direction B is arranged so as to overlap the 1 st electrode 11 in the 2 nd direction B. Further, the top 22T of the 2 nd protruding portion 22A in the 2 nd direction B is arranged so as to overlap the 2 nd electrode 12 in the 2 nd direction B. In other words, the top portion 21T is disposed inside the electronic component 10 with respect to the 2 nd surface 11B, and the top portion 22T is disposed inside the electronic component 10 with respect to the 4 th surface 12B when viewed from the 3 rd direction C.
In the method of manufacturing the electronic device 3, the surface tension of each of the melted 1 st bonding portion 21 and 2 nd bonding portion 22 acts on the electronic component 10. When the 1 st joint 21 and the 2 nd joint 22 are formed symmetrically with respect to the center line CL as viewed from the 3 rd direction C, and when the timing of melting the 1 st joint 21 and the timing of melting the 2 nd joint 22 are completely matched, the surface tension of the melted 1 st joint 21 counteracts the surface tension of the melted 2 nd joint 22. However, even when the 1 st joint portion 21 and the 2 nd joint portion 22 are formed symmetrically with respect to the center line CL when viewed from the 3 rd direction C, it is difficult to completely match the timing at which the 1 st joint portion 21 melts with the timing at which the 2 nd joint portion 22 melts, and the respective timings are often slightly deviated. If the 1 st bonding portion 21 melts earlier than the 2 nd bonding portion 22, the surface tension of the melted 1 st bonding portion 21 acts on the electronic component 10. In addition, the surface tension (hereinafter referred to as "surface tension 2") acting on the bonding material that wets and spreads on the 2 nd surface 11B in the melted 1 st bonding portion 21 acts to reduce the angle formed by the 2 nd surface 11B of the electronic component 10 with respect to the upper surface 2A of the printed circuit board 2. That is, the 2 nd surface tension acts, resulting in a so-called tombstoning phenomenon. On the other hand, the surface tension (hereinafter referred to as "1 st surface tension") of the molten 1 st joint portion 21, which acts on the joining material that wets and spreads on the 1 st surface 11A, acts to suppress the tombstoning phenomenon.
That is, even when the timing of melting the 1 st joint portion 21 does not exactly coincide with the timing of melting the 2 nd joint portion 22 and the 2 nd surface tension is greater than the 1 st surface tension, the tombstoning phenomenon can be suppressed when the difference between the 2 nd surface tension and the 1 st surface tension is smaller than the force required to cause the tombstoning phenomenon. In order to achieve such a configuration, in the chip component 1, the top 21T of the 1 st protruding portion 21A in the 2 nd direction B is arranged so as to overlap the 1 st electrode 11 in the 2 nd direction B, and the top 22T of the 2 nd protruding portion 22A in the 2 nd direction B is arranged so as to overlap the 2 nd electrode 12 in the 2 nd direction B.
When the top portion 21T is disposed inside the electronic component 10 with respect to the 2 nd surface 11B, the amount of the bonding material that wets and spreads on the 1 st surface 11A increases, and thus the 1 st surface tension increases, as compared with when the top portion 21T is disposed outside the electronic component 10 with respect to the 2 nd surface 11B. Therefore, the difference between the 2 nd surface tension and the 1 st surface tension in the former case is smaller than the difference between the 2 nd surface tension and the 1 st surface tension in the latter case. As a result, the chip component 1 can suppress the occurrence of warpage of the electronic component 10 in the electronic device 3. The same effect as described above is also exhibited when the top 22T is arranged so as to overlap the 2 nd electrode 12 in the 2 nd direction B.
In the method of manufacturing the chip component 1, the 1 st bonding portion 21 including the 1 st protruding portion 21A and the 2 nd bonding portion 22 including the 2 nd protruding portion 22A are easily formed from the bonding materials 23, 24 arranged inside the 1 st concave portion 201 and the 2 nd concave portion 202, respectively, by using the mold 101. The shape deviation of the 1 st joint portion 21 and the 2 nd joint portion 22 between the plurality of chip components 1 manufactured by the manufacturing method of the chip components 1 is reduced compared with the shape deviation of the comparative example manufactured by soldering using a soldering iron.
In the manufacturing method of the chip component 1, the bonding materials 23, 24 respectively include a mixture of solder balls and flux. Accordingly, when the natural oxide film is formed on the surfaces of the 1 st electrode 11 and the 2 nd electrode 12 of the electronic component 10, the 1 st bonding portion 21 is reliably formed in a predetermined region in the 1 st electrode 11.
In the manufacturing method of the electronic device 3, by using the chip component 1, the 1 st protruding portion 21A of the 1 st bonding portion 21 is connected to the 3 rd electrode 31, and the 2 nd protruding portion 22A of the 2 nd bonding portion 22 is connected to the 4 th electrode 32, and thereafter, the 1 st bonding portion 21 and the 2 nd bonding portion 22 are melted. Accordingly, the variation in the timing of melting the 1 st joint 21 and the 2 nd joint 22 is suppressed as compared with the variation in the timing of melting in the comparative example, and the timing of melting the 1 st joint 21 can be the same as the timing of melting the 2 nd joint 22. Therefore, in the method for manufacturing the electronic device 3, compared with the method for manufacturing the electronic device using the conventional comparative example, the occurrence of the poor bonding such as the failure to bond one electrode to the printed circuit board due to the misalignment of the electronic component 10 from the position where the electronic component should be arranged or the tilting of the electronic component can be suppressed.
Embodiment 2.
As shown in fig. 12, the chip component 4 according to embodiment 2 has basically the same configuration as the chip component 1 according to embodiment 1, but differs from the chip component 1 in that the 1 st bonding portion 51 and the 2 nd bonding portion 52 are provided instead of the 1 st bonding portion 21 and the 2 nd bonding portion 22.
The 1 st bonding portion 51 has substantially the same configuration as the 1 st bonding portion 21, but differs from the 1 st bonding portion 21 in terms of the formation of the solder balls 61 and the flux 63. The 2 nd bonding portion 52 has substantially the same configuration as the 2 nd bonding portion 22, but differs from the 2 nd bonding portion 22 in terms of the formation of the solder ball 62 and the flux 64.
The chip component 4 is manufactured by the method for manufacturing the chip component 4 shown in fig. 13 to 15. In the method for manufacturing the chip component 4 shown in fig. 13 to 15, the 1 st bonding portion 51 and the 2 nd bonding portion 52 are formed using the mold 101. In the method of manufacturing the chip component 4, the solder ball 61 and the flux 63 constitute the 1 st bonding material, and the solder ball 62 and the flux 64 constitute the 2 nd bonding material.
First, a mold 101 shown in fig. 13 is prepared (step 1). The mold 101 has the same structure as the mold 101 shown in fig. 3. Next, the solder ball 61 is supplied into the 1 st concave portion 201 of the die 101, and the solder ball 62 is supplied into the 2 nd concave portion 202 of the die 101 (step 2). The outer diameters of the solder balls 61 and 62 are, for example, 0.2mm, and the width of the 1 st electrode 11 and the 2 nd electrode 12 in the 1 st direction a is equal to or greater than the width of the 1 st recess 201 and the 2 nd recess 202 in the 1 st direction a. The volume of each solder ball 61 is larger than the volume of the 1 st concave portion 201. The volume of the solder ball 62 is greater than the volume of the 2 nd recess 202. The material constituting the solder balls 61, 62 is, for example, lead-free solder. The material constituting the solder balls 61, 62 contains, for example, sn, ag, and Cu, and their alloy composition is, for example, sn-3.0% Ag-0.5% Cu.
Further, the 1 st concave portion 201 and the 2 nd concave portion 202 may be supplied with a plurality of solder balls 61 and 62, respectively. In this case, the plurality of solder balls 61 are arranged not in the 1 st direction a but in the 3 rd direction C, for example. The plurality of solder balls 62 are arranged, for example, not in the 1 st direction a but only in the 3 rd direction C.
Next, the electronic component 10 is prepared (step 3). Next, the flux 63 is applied to the 1 st electrode 11 of the electronic component 10, and the flux 64 is applied to the 2 nd electrode 12 of the electronic component 10 (step 6). The region of the 1 st electrode 11 to which the flux 63 is applied includes a region of the 1 st electrode 11 of the chip component 4 to which the 1 st bonding portion 51 is bonded. The region of the 2 nd electrode 12 to which the flux 64 is applied includes the region of the 2 nd electrode 12 of the chip component 4 to which the 2 nd bonding portion 52 is bonded. The region to which the flux 63 is applied includes, for example, the entire 1 st surface 11A of the 1 st electrode 11 and a part of the 2 nd surface 11B located on the 1 st surface 11A side in the 2 nd direction B. The region to which the flux 64 is applied includes, for example, the entirety of the 3 rd surface 12A of the 2 nd electrode 12 and a portion of the 4 th surface 12B located on the 3 rd surface 12A side in the 2 nd direction B. The method of applying the fluxes 63, 64 is not particularly limited, and is, for example, transfer using a transfer device. A part of each of the fluxes 63, 64 may be coated on the non-electrode portion 13. Thus, the electronic component 10 shown in fig. 14 is formed.
Next, as shown in fig. 14, the electronic component 10 to which the 6 th step is applied is placed on the solder balls 61 and 62 (4 th step). By disposing the electronic component 10 on the solder balls 61, 62, the flux 63 contacts the solder balls 61, and the flux 64 contacts the solder balls 62.
Next, the 1 st bonding portion 21 and the 2 nd bonding portion 22 are formed from the solder balls 61, 62 and the fluxes 63, 64 (step 5). First, the solder balls 61, 62 and the fluxes 63, 64 are heated and melted. The heating may be performed by any method, for example, by putting the mold 101, the electronic component 10, the solder balls 61 and 62, and the whole of the fluxes 63 and 64 shown in fig. 14 into a reflow oven and heating them. The heating temperature is a temperature higher than the melting point of the material constituting the solder balls 61, 62 and which the electronic component 10 can withstand, for example, 250 ℃. By the above-described heating, the solder balls 61, 62 and the fluxes 63, 64 are melted as a whole. Thereby, the electronic component 10 is lowered until the non-electrode portion 13 is in contact with the upper surface 101A of the mold 101. The molten solder ball 61 and a part of the flux 63 wet and spread on the 2 nd surface 11B of the 1 st electrode 11. The molten solder ball 62 and a part of the flux 64 wet and spread on the 4 th surface 12B of the 2 nd electrode 12.
The solder balls 61, 62 and the fluxes 63, 64 are cooled after melting. The cooling is performed by any method, for example, by taking out the entirety of the mold 101, the electronic component 10, the solder balls 61 and 62, and the fluxes 63 and 64 from the reflow oven. As a result, as shown in fig. 15, the chip component 4 including the electronic component 10, the 1 st bonding portion 51 formed by the solder ball 61 and the flux 63, and the 2 nd bonding portion 52 formed by the solder ball 62 and the flux 64 is manufactured. After that, the chip part 4 is taken out of the mold 101.
In the method of manufacturing the chip component 4, the fluxes 63 and 64 may be applied to the solder balls 61 and 62 disposed in the 1 st recess 201 and the 2 nd recess 202 of the mold 101. As shown in fig. 16, for example, the fluxes 63 and 64 may be applied so as to entirely cover the surfaces of the solder balls 61 and 62 exposed from the mold 101.
Since the chip component 4 has substantially the same structure as the chip component 1, the same effects as the chip component 1 can be exhibited.
In the method for manufacturing the chip component 4, in the 6 th step performed after the 2 nd step and before the 3 rd step, the flux is formed in the 1 st electrode 11 and the 2 nd electrode 12 in the region where the 1 st bonding portion 21 and the 2 nd bonding portion 22 should be formed. Alternatively, in the above-mentioned step 6, a flux is formed on the solder balls 61, 62. Thus, the mask 102 used in the method for manufacturing the chip component 1 is not required in the method for manufacturing the chip component 4.
Embodiment 3.
As shown in fig. 17, the chip component 5 according to embodiment 3 has basically the same configuration as the chip component 1 according to embodiment 1, but differs from the chip component 1 in that the 1 st bonding portion 71 and the 2 nd bonding portion 72 are provided instead of the 1 st bonding portion 21 and the 2 nd bonding portion 22.
The 1 st bonding portion 71 has substantially the same configuration as the 1 st bonding portion 21, but is different from the 1 st bonding portion 21 in terms of being formed of the chip solder 81 and the flux 83. The 2 nd bonding portion 72 has substantially the same configuration as the 2 nd bonding portion 22, but differs from the 2 nd bonding portion 22 in terms of being formed of the chip solder 82 and the flux 84.
The chip component 5 is manufactured by the method for manufacturing the chip component 5 shown in fig. 18 to 20. In the method of manufacturing the chip component 5 shown in fig. 18 to 20, the 1 st bonding portion 71 and the 2 nd bonding portion 72 are formed using the mold 101. In the method of manufacturing the chip component 5, the chip solder 81 and the flux 83 constitute the 1 st bonding material, and the chip solder 82 and the flux 84 constitute the 2 nd bonding material.
First, a mold 101 and chip solders 81, 82 shown in fig. 18 are prepared. The mold 101 has the same structure as the mold 101 shown in fig. 3. The chip solder 81 is disposed on the 1 st recess 201 of the mold 101, and the chip solder 82 is disposed on the 2 nd recess 202 of the mold 101. The volume of the chip solder 81 is larger than the volume of the 1 st recess 201. The volume of the chip solder 82 is greater than the volume of the 2 nd recess 202. The chip solder 81 is disposed so as to close the 1 st recess 201, for example. The width of the chip solder 81 in the 1 st direction a is, for example, larger than the width of the 1 st recess 201 in the 1 st direction a. The width of the chip solder 81 in the 3 rd direction C is, for example, larger than the width of the 1 st recess 201 in the 3 rd direction C. The chip solder 82 is disposed so as to close the 2 nd recess 202. The width of the chip solder 82 in the 1 st direction a is larger than the width of the 2 nd recess 202 in the 1 st direction. The width of the chip solder 82 in the 3 rd direction C is larger than the width of the 2 nd recess 202 in the 3 rd direction.
The material constituting the chip solders 81, 82 is, for example, lead-free solder. The material constituting the solder balls 61, 62 contains, for example, sn, ag, and Cu, and their alloy composition is, for example, sn-3.0% Ag-0.5% Cu.
In addition, at least 1 chip solder 81 may be disposed on 1 st recess 201, and for example, a plurality of chip solders 81 may be disposed. In this case, the plurality of chip solders 81 are arranged in the 3 rd direction C, for example. In the same manner, at least 1 chip solder 82 may be disposed on 12 nd recess 202, and for example, a plurality of chip solders 82 may be disposed. In this case, the plurality of chip solders 82 are arranged in the 3 rd direction C, for example.
Next, as shown in fig. 19, the electronic component 10 is prepared, and the electronic component 10 is further arranged on the chip solders 81, 82. The electronic component 10 has, for example, the same configuration as the electronic component 10 prepared in the method for manufacturing the chip component 4. The flux 83 is applied to the 1 st electrode 11 of the prepared electronic component 10. Also, flux 84 is applied to the 2 nd electrode 12 of the prepared electronic component 10. By disposing the electronic component 10 on the chip solders 81, 82, the flux 83 is in contact with the chip solder 81, and the flux 84 is in contact with the chip solder 82.
The area of the prepared 1 st electrode 11 of the electronic component 10 coated with the flux 83 includes the area of the 1 st electrode 11 of the chip component 5 bonded to the 1 st bonding portion 71. The area of the prepared 2 nd electrode 12 of the electronic component 10 coated with the flux 84 includes the area of the 2 nd electrode 12 of the chip component 5 bonded to the 2 nd bonding portion 72.
The region coated with the flux 83 includes, for example, the entire 1 st surface 11A of the 1 st electrode 11 and a part of the 2 nd surface 11B located on the 1 st surface 11A side in the 2 nd direction B. The region coated with the flux 84 includes, for example, the entirety of the 3 rd surface 12A of the 2 nd electrode 12 and a portion of the 4 th surface 12B located on the 3 rd surface 12A side in the 2 nd direction B. The method of applying the fluxes 83, 84 is not particularly limited, and is, for example, transfer using a transfer device. A part of each of the fluxes 63, 64 may be coated on the non-electrode portion 13.
Then, the chip solders 81, 82 and the fluxes 83, 84 are heated and melted. The heating may be performed by any method, for example, by charging the mold 101, the electronic component 10, the chip solders 81 and 82, and the whole of the solders 83 and 84 shown in fig. 19 into a reflow oven and heating them. The heating temperature is a temperature higher than the melting point of the material constituting the chip solders 81, 82 and the electronic component 10 can withstand, for example, 250 ℃. By the above heating, the chip solders 81, 82 and the fluxes 83, 84 are melted as a whole. Thus, a part of the molten material of the chip solder 81 and the flux 83 flows into the 1 st concave portion 201 and fills the same, and the remaining part of the molten material of the chip solder 81 and the flux 83 wets and spreads on the 1 st surface 11A and the 2 nd surface 11B of the 1 st electrode 11. Similarly, a part of the molten material of the chip solder 82 and the flux 84 flows into the 2 nd recess 202 and fills the recess, and the remaining part of the molten material of the chip solder 82 and the flux 84 wets and spreads on the 3 rd surface 12A and the 4 th surface 12B of the 2 nd electrode 12.
The electronic component 10 descends until the non-electrode portion 13 contacts the upper surface 101A of the mold 101. A part of the molten die solder 81 and flux 83 wets and spreads on the 2 nd surface 11B of the 1 st electrode 11. A part of the molten die solder 82 and flux 84 wets and spreads on the 4 th surface 12B of the 2 nd electrode 12.
The chip solders 81, 82 and the fluxes 83, 84 are cooled after melting. The cooling may be performed by any method, for example, by taking out the entirety of the mold 101, the electronic component 10, the chip solders 81 and 82, and the fluxes 83 and 84 from the reflow oven. As a result, as shown in fig. 20, the chip component 5 including the electronic component 10, the 1 st bonding portion 71 formed of the chip solder 81 and the flux 83, and the 2 nd bonding portion 72 formed of the chip solder 82 and the flux 84 is manufactured. After that, the chip component 5 is removed from the mold 101.
In the method of manufacturing the chip component 5, the fluxes 83 and 84 may be applied to the chip solders 81 and 82 disposed on the 1 st concave portion 201 and the 2 nd concave portion 202 of the mold 101.
Since the chip component 5 has substantially the same structure as the chip component 1, the same effects as the chip component 1 can be exhibited.
In the method for manufacturing the chip component 5, in the 6 th step performed after the 2 nd step and before the 3 rd step, the flux is formed in the 1 st electrode 11 and the 2 nd electrode 12 in the region where the 1 st bonding portion 21 and the 2 nd bonding portion 22 should be formed. Alternatively, in the above-mentioned step 6, the flux is formed on the chip solders 81, 82. Thus, the mask 102 used in the method for manufacturing the chip component 1 is not required in the method for manufacturing the chip component 5.
Embodiment 4.
As shown in fig. 21, the chip component 6 according to embodiment 4 has basically the same configuration as the chip component 1 according to embodiment 1, but differs from the chip component 1 in that the 1 st bonding portion 91 and the 2 nd bonding portion 92 are provided instead of the 1 st bonding portion 21 and the 2 nd bonding portion 22.
The 1 st bonding portion 91 is different from the 1 st bonding portion 21 in that it is not bonded to the 2 nd surface 11B of the 1 st electrode 11. The 1 st engagement portion 91 is engaged with only the 1 st surface 11A, for example. The 2 nd bonding portion 92 is different from the 1 st bonding portion 21 in that it is not bonded to the 4 th surface 12B of the 2 nd electrode 12. The 2 nd engaging portion 92 is engaged with only the 3 rd surface 12A, for example.
In the method of manufacturing the chip component 6, the bonding of the 1 st bonding portion 91 to the 1 st electrode 11 and the bonding of the 2 nd bonding portion 92 to the 2 nd electrode 12 are performed by an ultrasonic bonding method. In other words, in the method of manufacturing the chip component 6, the bonding of the 1 st bonding portion 91 to the 1 st electrode 11 and the bonding of the 2 nd bonding portion 92 to the 2 nd electrode 12 are performed without using flux. In the method of manufacturing the chip component 6, the 1 st bonding material or the 2 nd bonding material is constituted only by solder balls.
For example, the electronic component 10 and the solder balls 61, 62 described above are prepared. Next, ultrasonic vibration is applied to the 1 st electrode 11 and the solder ball 61 of the electronic component 10 while pressing them in the 2 nd direction B. Similarly, ultrasonic vibration is applied to the 2 nd electrode 12 and the solder ball 62 of the electronic component 10 while pressing them in the 2 nd direction B. Thus, the chip component 6 is manufactured without using flux.
Since the chip component 6 has substantially the same structure as the chip component 1, the same effects as the chip component 1 can be exhibited.
In the method for manufacturing the chip component 6, the 1 st bonding material and the 2 nd bonding material are each composed of solder balls, and in the 4 th step, the solder balls are ultrasonically bonded to the 1 st electrode 11 or the 2 nd electrode 12. Therefore, the flux used in the respective manufacturing methods of the chip components 1,4, 5 is not required in the manufacturing method of the chip component 6.
< Modification >
In the chip components 1, 4 to 6, when the 1 st protruding portion 21A is arranged on a plane extending in the 1 st direction a and the 3 rd direction C, the 1 st protruding portion 21A may be in point contact with the plane. Similarly, when the 2 nd protruding portion 22A is arranged on a plane extending in the 1 st and 3 rd directions a and C, the 2 nd protruding portion 22A may be provided so as to make point contact with the plane. In this case, the number of points in contact with the plane in the 1 st protruding portion 21A and the number of points in contact with the plane in the 2 nd protruding portion 22A may be any number of 1 or more. In other words, the 1 st protruding portion 21A and the 2 nd protruding portion 22A may also have a portion of at least 1 spheroid or a portion of at least 1 ellipsoid. The 1 st protruding portion 21A and the 2 nd protruding portion 22A may have a part of each of a plurality of spheroids arranged in the 3 rd direction C or a part of each of a plurality of ellipsoids arranged in the 3 rd direction C. The 1 st recess 201 and the 2 nd recess 202 of the mold 101 are provided to form the 1 st joint 21 and the 2 nd joint 22 including the 1 st protruding portion 21A and the 2 nd protruding portion 22A described above.
The chip components 1, 4 to 6, provided with the above-described respective configurations, can suppress occurrence of defective bonding of the solder bonding portion between the electronic component and the printed circuit board, as compared with the chip components used in the conventional mounting method. Therefore, the other configurations of the chip components 1, 4 to 6, for example, the configurations of the chip components 1, 4 to 6 in the cross section perpendicular to the 1 st direction a, and the like are not particularly limited as long as they can be simultaneously established with the above-described respective configurations.
The 1 st electrode 11 shown in fig. 1 further has: a5 th surface 11C extending in the 1 st direction a and the 2 nd direction B toward the 3rd direction C; and a 6 th surface 11D facing the opposite side of the 5 th surface 11C in the 3rd direction C. The 2 nd electrode 12 further has: a 7 th surface 12C extending in the 1 st direction a and the 2 nd direction B toward the 3rd direction C; and an 8 th surface 12D facing the opposite side of the 7 th surface 12C in the 3rd direction C. In the chip component 1 shown in fig. 1, the 1 st bonding portion 21 and the 2 nd bonding portion 22 are not formed on the 5 th surface 11C, the 6 th surface 11D, the 7 th surface 12C, and the 8 th surface 12D, but are not limited thereto. The 1 st joint 21 and the 2 nd joint 22 may be formed on the 5 th surface 11C, the 6 th surface 11D, the 7 th surface 12C, and the 8 th surface 12D.
Fig. 22 is a cross-sectional view perpendicular to the 1 st direction a of a modification of the chip component 1, and is a cross-sectional view of the 1 st portion 21C through the 1 st electrode 11 and the 1 st protruding portion 21A of the 1 st bonding portion 21. As shown in fig. 22, the 1 st joint portion 21 is joined to, for example, a part of each of the 5 th surface 11C and the 6 th surface 11D in addition to the 1 st surface 11A and the 2 nd surface 11B.
As shown in fig. 22, the 1 st projecting portion 21A further has: a 7 th portion 21E disposed in a region not overlapping the 1 st electrode 11 in the 2 nd direction B and protruding in the 3 rd direction C with respect to the 5 th surface 11C of the 1 st electrode 11; and an 8 th portion 21F disposed in a region that does not overlap the 1 st electrode 11 in the 2 nd direction B and protruding in the 3 rd direction C with respect to the 6 th surface 11D of the 1 st electrode 11. The 1 st engagement portion 21 further has: a 9 th portion 21G disposed on the 5 th surface 11C in the 3 rd direction C; and a10 th portion 21H arranged on the 6 th surface 11D in the 3 rd direction C. The 1 st portion 21C, the 7 th portion 21E, the 8 th portion 21F, the 9 th portion 21G, and the 10 th portion 21H are integrally formed. The top 21T of the 1 st bonding portion 21 is formed, for example, only in a region overlapping the 1 st electrode 11 in the 2 nd direction B. The top 21T of the 1 st bonding portion 21 may be formed to extend from the inside to the outside of the 5 th surface 11C and the 6 th surface 11D of the 1 st electrode 11 in the 3 rd direction C.
The chip component 1 shown in fig. 22 is manufactured using the mold 101 shown in fig. 22. The length of the 1 st recess 201 in the mold 101 in the 3 rd direction C is longer than the lengths of the 1 st electrode 11 and the 2 nd electrode 12 in the 3 rd direction C, for example.
Since the chip component 1 shown in fig. 22 has substantially the same configuration as the chip component 1 shown in fig. 1 and 2, the same effects as those of the chip component 1 shown in fig. 1 and 2 can be exhibited. Further, according to the chip component 1 shown in fig. 22, when the 1 st bonding portion 21 and the 2 nd bonding portion 22 are melted in the manufacturing method of the electronic device 3, a part of the melted 1 st bonding portion 21 spreads in a wet manner on the 5 th surface 11C of the 1 st electrode 11, and the other part spreads in a wet manner on the 6 th surface 11D of the 1 st electrode 11. Thus, the bonding strength of the electronic component 10 of the electronic device 3 manufactured using the chip component 1 shown in fig. 22 and the printed circuit board 2 is higher than the bonding strength of the electronic component 10 of the electronic device 3 manufactured using the chip component 1 shown in fig. 2 and the printed circuit board 2.
In the chip component 1 shown in fig. 22, it is provided that when the 1 st protruding portion 21A is arranged on a plane extending in the 1 st direction a and the 3 rd direction C, the 1 st protruding portion 21A makes line contact with the plane. Fig. 23 is a cross-sectional view perpendicular to the 1 st direction a of another modification of the chip component 1, and is a cross-sectional view of the 1 st portion 21C through the 1 st electrode 11 and the 1 st protruding portion 21A of the 1 st bonding portion 21. As shown in fig. 23, in the chip component 1, when the 1 st protruding portion 21A is arranged on a plane extending in the 1 st direction a and the 3 rd direction C, the 1 st protruding portion 21A may be provided so as to be in point contact with the plane. In the chip component 1 shown in fig. 23, the number of points of contact with the above-described plane in the 1 st projecting portion 21A is plural. The 2 nd bonding portion 22 of the chip component 1 shown in fig. 22 and 23 has a structure equivalent to that of the 1 st bonding portion 21, for example.
Embodiment 5.
As shown in fig. 24, the chip component 7 according to embodiment 5 has substantially the same configuration as the chip component 1 according to embodiment 1, but differs from the chip component 1 in the following points: the 1 st joint 21 is joined to a region located on the 1 st surface 11A side with respect to the center of the 2 nd surface 11B in the 2 nd direction B and a region located on the opposite side of the 1 st surface 11A with respect to the center. Also, the chip part 7 is different from the chip part 1 in the following points: the 2 nd joint 22 is joined to a region located on the 1 st surface 11A side with respect to the center of the 2 nd surface 11B in the 2 nd direction B and a region located on the opposite side of the 1 st surface 11A with respect to the center.
In other words, the 1 st bonding portion 21 has a portion disposed above the center of the 2 nd surface 11B of the 1 st electrode 11 in the 2 nd direction B. The 2 nd bonding portion 22 has a portion disposed above the center of the 4 th surface 12B of the 2 nd electrode 12 in the 2 nd direction B.
Preferably, the 1 st joint portion 21 is joined to the entire surface of the 2 nd surface 11B, and the 2 nd joint portion 22 is joined to the entire surface of the 4 th surface 12B.
Further, as shown in fig. 25, the chip component 7 is different from the chip component 1 in the following points: the 1 st bonding portion 21 and the 2 nd bonding portion 22 protrude in the 3 rd direction C with respect to the 1 st electrode 11 or the 2 nd electrode 12 in addition to the 1 st direction a and the 2 nd direction B, respectively.
In other words, the 1 st bonding portion 21 has a portion protruding in the 3 rd direction C with respect to the 1 st electrode 11. The 1 st protruding portion 21A has a portion protruding in the 3 rd direction C with respect to the 1 st electrode 11. A part of the portion of the 1 st joint 21 disposed above the center of the 2 nd surface 11B of the 1 st electrode 11 in the 2 nd direction B protrudes in the 3 rd direction C with respect to the 1 st electrode 11.
The 2 nd bonding portion 22 has a portion protruding in the 3 rd direction C with respect to the 2 nd electrode 12. The 2 nd protruding portion 22A has a portion protruding in the 3 rd direction C with respect to the 2 nd electrode 12. A part of the portion of the 2 nd bonding portion 22 disposed above the center of the 4 th surface 12B of the 2 nd electrode 12 in the 2 nd direction B protrudes in the 3 rd direction C with respect to the 2 nd electrode 12.
The 1 st electrode 11 further has: a 5 th surface 11C extending in the 1 st direction a and the 2 nd direction B toward the 3 rd direction C; and a 6 th surface 11D facing the opposite side of the 5 th surface 11C in the 3 rd direction C. The 2 nd electrode 12 further has: a 7 th surface 12C extending in the 1 st direction a and the 2 nd direction B toward the 3 rd direction C; and an 8 th surface 12D facing the opposite side of the 7 th surface 12C in the 3 rd direction C. In the chip component 7, the 1 st bonding portion 21 and the 2 nd bonding portion 22 are formed on the 5 th surface 11C, the 6 th surface 11D, the 7 th surface 12C, and the 8 th surface 12D. The top 21T of the 1 st bonding portion 21 is formed only in a region that does not overlap with the 1 st electrode 11 in the 2 nd direction B, for example. The top 22T of the 2 nd bonding portion 22 is formed only in a region that does not overlap the 2 nd electrode 12 in the 2 nd direction B, for example.
The chip component 7 is manufactured by the method for manufacturing the chip component 7 shown in fig. 26 to 28. In the method of manufacturing the chip component 7 shown in fig. 26 to 28, the 1 st bonding portion 21 and the 2 nd bonding portion 22 are formed using the mold 101. In the method of manufacturing the chip component 7, the bonding material 23 constitutes the 1 st bonding material, and the bonding material 24 constitutes the 2 nd bonding material.
First, a mold 101 and an electronic component 10 shown in fig. 26 are prepared. The mold 101 has substantially the same structure as the mold 101 shown in fig. 3.
Next, as shown in fig. 27, the joining material 23 is supplied to the 1 st recess 201 and the joining material 24 is supplied to the 2 nd recess 202 by the dispenser 400. The bonding material 23 is also supplied at a position above the center of the 2 nd surface 11B in the 2 nd direction B. The bonding material 24 is also supplied at a position above the center of the 4 th surface 12B in the 2 nd direction B.
Then, the bonding material 23 and the bonding material 24 are heated and melted. The heating may be performed by any method, for example, by charging into a reflow oven and heating the same as in the other embodiments. Thus, the bonding material 23 flows into the 1 st concave portion 201 and fills it, and the remaining portion of the bonding material 23 wets and spreads on the 1 st surface 11A and the 2 nd surface 11B of the 1 st electrode 11. Similarly, a part of the bonding material 24 flows into the 2 nd recess 202 and fills it, and the remaining part of the bonding material 24 wets and spreads on the 3 rd surface 12A and 4 th surface 12B of the 2 nd electrode 12.
Next, the joining material 23 and the joining material 24 are cooled after being melted. The cooling may be performed by any method, for example, by taking out from the reflow oven in the same manner as in the other embodiments. As a result, as shown in fig. 28, the chip component 7 including the electronic component 10, the 1 st bonding portion 21 formed of the bonding material 23, and the 2 nd bonding portion 22 formed of the bonding material 24 was manufactured. After that, the chip part 7 is removed from the mold 101.
The chip component 7 is mounted on the printed circuit board 2 by the same method as the chip component 1, whereby the electronic device according to embodiment 5 shown in fig. 29 is manufactured.
Since the chip component 7 has substantially the same structure as the chip component 1, the same effects as the chip component 1 can be exhibited.
Further, in the chip component 1, since the 2 nd surface 11B and the 4 th surface 12B are not exposed by being wetted with the solder, if the storage environment of the chip component 1 is poor and oxidation of the exposed portion has been advanced, there is a possibility that the 3 rd joint 41 and the 4 th joint 42 will not be wetted further above the 2 nd surface 11B and the 4 th surface 12B as shown in fig. 30 and 31 when the chip component 1 is mounted on the printed circuit board 2. The electronic device shown in fig. 30 and 31 is manufactured from the chip component 1, and the 1 st joint portion 21 and the 2 nd joint portion 22 of the chip component 1 protrude outward from the respective sides of the electronic component 10 in the 1 st direction a and the 2 nd direction B, respectively, but do not protrude outward from the respective sides of the electronic component 10 in the 3 rd direction C.
In contrast, in the chip component 7, the 1 st bonding portion 21 has a portion disposed above the center of the 2 nd surface 11B in the 2 nd direction B, and the 2 nd bonding portion 22 has a portion disposed above the center of the 4 th surface 12B in the 2 nd direction B. Therefore, in the electronic device shown in fig. 29 in which the chip component 7 is mounted on the printed circuit board 2, the 3 rd joint 41 and the 4 th joint 42 are more reliably wetted and spread over the entire surfaces of the 2 nd surface 11B and the 4 th surface 12B, respectively, than in the electronic device 3 in which the chip component 1 is mounted on the printed circuit board 2. Therefore, the oxidation of the 2 nd surface 11B and the 4 th surface 12B can be suppressed regardless of the storage environment of the chip component 7. That is, the chip component 7 is excellent in storage property.
Further, the 1 st bonding portion 21 and the 2 nd bonding portion 22 of the chip component 7 have portions protruding outward in the 3 rd direction C than the respective sides of the electronic component 10 in addition to the 1 st direction a and the 2 nd direction B, respectively. Accordingly, the volumes of the 3 rd joint 41 and the 4 th joint 42 of the electronic device shown in fig. 29 may be equal to or larger than the volumes of the 3 rd joint 41 and the 4 th joint 42 of the electronic device shown in fig. 30 and 31. As a result, the shortest distance d1 between the end of the 2 nd electrode 12 of the chip component 7 and the 3 rd joint 41 shown in fig. 29 is longer than the shortest distance d2 between the end of the 2 nd electrode 12 of the chip component 12 and the 3 rd joint 41 shown in fig. 30 and 31.
Here, when the electronic device is exposed to a temperature cycle in its use environment, warpage and cracking may occur in the solder joint due to a mismatch in linear expansion coefficient between the chip component and the base material of the printed circuit board. Such cracks develop with an increase in the number of temperature cycles, and the solder joint eventually breaks. The time until this break is reached is generally proportional to the shortest distance between the end of the chip and the solder joint (fillet).
Therefore, since the shortest distance d1 in the electronic device shown in fig. 29 is larger than the shortest distance d2 in the electronic devices shown in fig. 30 and 31, the time until the break is reached in the electronic device shown in fig. 29 is longer than the time until the break is reached in the electronic devices shown in fig. 30 and 31. As a result, the lifetime of the solder joint in the electronic device shown in fig. 29 is longer than that in the electronic devices shown in fig. 30 and 31.
As described above, the embodiments of the present disclosure have been described, but various modifications can be made to the above-described embodiments. The scope of the present disclosure is not limited to the above-described embodiments. The scope of the present disclosure is shown by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.
Description of the reference numerals
1. 4,5, 6 Chip components, 2 printed circuit boards, 2A, 101A, 102B upper surfaces, 3 electronic devices, 10 electronic components, 11 st electrode, 11A 1 st surface, 11B 2 nd surface, 12 nd electrode, 12A 3 rd surface, 12B 4 th surface, 13 non-electrode portions, 21, 51, 71, 91 st 1 st bonding portions, 21A 1 st protruding portions, 21B 3 rd portions, 21C 1 st portions, 21D 2 nd portions, 21E 7 th portions, 21F 8 th portions, 21G 9 th portions, 21H 10 th portions, 21T, 22T top portions, 22, 52, 72, 92 nd bonding portions, 22A 2 nd protruding portions, 22B 6 th portions, 22C 4 th portions, 22D 5 th portions, 23, 24 bonding materials, 25, 27, 61, 62 solder balls, 26, 28, 33, 34, 36, 63, 64, 83, 84, 31 st electrode portions, 31A 9 th surfaces, 32 nd electrodes, 32 nd electrode portions, 32A 10 th surface, 4 th portions, 2 nd recesses, 2 nd portions, 2 nd recesses, 2, 102,1 st through-holes, 2A, 2 nd recesses, 2D, 2 nd recesses, 102.
Claims (18)
1. A chip component is provided with:
An electronic component including a1 st electrode and a2 nd electrode arranged at a distance from the 1 st electrode in the 1 st direction;
A1 st bonding portion bonded to the 1 st electrode; and
A2 nd bonding portion bonded to the 2 nd electrode,
The material constituting the 1st joint and the 2 nd joint includes solder,
The 1 st bonding part has a1 st protruding part protruding relative to the 1 st electrode in a2 nd direction crossing the 1 st direction,
The 2 nd bonding portion has a2 nd protruding portion protruding in the 2 nd direction with respect to the 2 nd electrode,
The outermost peripheral surfaces of the 1 st projecting portion and the 2 nd projecting portion are curved surfaces when viewed from the 3 rd direction intersecting the 1 st direction and the 2 nd direction,
The 1 st protruding portion has a top portion which is a portion of the 1 st bonding portion having the longest distance from the 1 st electrode in the 2 nd direction,
The 2 nd protruding portion has a top portion which is a portion of the 2 nd bonding portion having the longest distance from the 2 nd electrode in the 2 nd direction.
2. The chip assembly of claim 1 wherein,
The 1st protruding portion has a portion protruding in the 1st direction with respect to the 1st electrode,
The 2nd projection has a portion projecting in the 1st direction with respect to the 2nd electrode.
3. The chip component according to claim 1 or 2, wherein,
When the 1 st protruding portion and the 2 nd protruding portion are disposed on a plane extending along the 1 st and 3 rd directions, respectively, the 1 st protruding portion and the 2 nd protruding portion are formed so as to be in point contact or line contact with the plane, respectively.
4. The chip component according to claim 1 or 2, wherein,
The height of the 1 st protruding portion with respect to the 1 st electrode in the 2 nd direction is equal to the height of the 2 nd protruding portion with respect to the 2 nd electrode in the 2 nd direction when viewed from the 3 rd direction.
5. The chip assembly of claim 4 wherein,
The 1 st joint portion and the 2 nd joint portion are formed symmetrically with respect to a center line passing through a center between the 1 st electrode and the 2 nd electrode in the 1 st direction and extending along the 2 nd direction when viewed from the 3 rd direction.
6. The chip component according to claim 1 or 2, wherein,
The 1 st bonding part has a portion arranged above the center of the 1 st electrode in the 2 nd direction and a portion protruding from the 1 st electrode in the 3 rd direction,
The 2 nd bonding portion has a portion disposed above the center of the 2 nd electrode in the 2 nd direction and a portion protruding from the 2 nd electrode in the 3 rd direction.
7. The chip component according to claim 1 or 2, wherein,
The top of the 1 st protruding portion in the 2 nd direction is arranged so as to overlap the 1 st electrode in the 2 nd direction,
The top of the 2 nd protruding portion in the 2 nd direction is arranged so as to overlap the 2 nd electrode in the 2 nd direction.
8. The chip component according to claim 1 or 2, wherein,
The 1st joint portion and the 2nd joint portion are respectively arranged to cover the end portions of the chip component.
9. The chip component according to claim 1 or 2, wherein,
The 1 st electrode has a1 st surface facing the 2 nd direction,
The 1 st joint portion is integrally joined to the 1 st surface.
10. The chip component according to claim 1 or 2, wherein,
The outer shape of the 1 st joint portion and the 2 nd joint portion is formed in an arc shape when viewed from the 3 rd direction.
11. A method for manufacturing a chip component, wherein the method for manufacturing the chip component comprises the following steps:
A1 st step of preparing a mold having an upper surface and formed with a1 st recess and a 2 nd recess recessed with respect to the upper surface;
a step2 of disposing a1 st bonding material in the 1 st recess and disposing a2 nd bonding material in the 2 nd recess in the step 2;
A step 3 of preparing an electronic component including a1 st electrode and a2 nd electrode arranged at a distance from the 1 st electrode in the 1 st direction;
A 4 th step of disposing the electronic component on the upper surface, bringing the 1 st electrode into contact with the 1 st bonding material, and bringing the 2 nd electrode into contact with the 2 nd bonding material after the 2 nd and 3 rd steps; and
And a 5 th step of forming, after the 4 th step, a1 st bonding portion bonded to the 1 st electrode and having a1 st protruding portion protruding from the 1 st electrode in a2 nd direction intersecting the 1 st direction from the 1 st bonding material, and forming, from the 2 nd bonding material, a2 nd bonding portion bonded to the 2 nd electrode and having a2 nd protruding portion protruding from the 2 nd electrode in the 2 nd direction from the 2 nd electrode.
12. The method for manufacturing a chip component according to claim 11, wherein,
In the 4 th step, the 1 st protruding portion has a portion protruding in the 1 st direction with respect to the 1 st electrode, and the 2 nd protruding portion has a portion protruding in the 1 st direction with respect to the 2 nd electrode.
13. The method for manufacturing a chip component as claimed in claim 11 or 12, wherein,
The 1 st bonding material and the 2 nd bonding material each include a mixture in which a solder ball and a flux are mixed,
In the step 5, the solder ball and the flux are melted.
14. The method for manufacturing a chip component as claimed in claim 11 or 12, wherein,
The 1st bonding material and the 2 nd bonding material each include a solder ball,
A step 6 of disposing flux on the solder ball and at least one of the 1 st electrode and the 2 nd electrode in a region where the 1 st bonding portion and the 2 nd bonding portion should be formed after the step 2 and before the step 3,
In the step 5, the solder ball and the flux are melted.
15. The method for manufacturing a chip component as claimed in claim 11 or 12, wherein,
The 1 st bonding material and the 2 nd bonding material each include a chip solder,
A step 6 of disposing flux on the chip solder and at least one of the 1 st electrode and the 2 nd electrode in a region where the 1 st bonding portion and the 2 nd bonding portion should be formed in the step 6 and before the step 3,
In the step5, the chip solder and the flux are melted.
16. The method for manufacturing a chip component as claimed in claim 11 or 12, wherein,
The 1 st bonding material and the 2 nd bonding material are each formed of a solder ball,
In the step 5, the solder ball is ultrasonically bonded to the 1 st electrode or the 2 nd electrode.
17. A method for manufacturing an electronic device, wherein the method for manufacturing an electronic device comprises:
a step 7 of preparing a chip component manufactured by the method for manufacturing a chip component according to any one of claims 11 to 16, and a printed circuit board including a3 rd electrode and a 4 th electrode arranged at a distance from the 3 rd electrode in the 1 st direction;
an 8 th step of disposing the 1 st protruding portion of the 1 st bonding portion on the 3 rd electrode and disposing the 2 nd protruding portion of the 2 nd bonding portion on the 4 th electrode in the 8 th step; and
A 9 th step of forming a 3 rd joint portion joined to the 1 st electrode and the 3 rd electrode by the 1 st joint portion and forming a 4 th joint portion joined to the 2 nd electrode and the 4 th electrode by the 2 nd joint portion after the 8 th step,
In the 9 th step, the 1st joint and the 2nd joint are melted by heating.
18. The method for manufacturing an electronic device according to claim 17, wherein,
The 1 st electrode and the 2 nd electrode have surfaces extending along the 2 nd direction,
In the 9 th step, the 1 st joint and the 2 nd joint melted by heating are respectively wetted and spread on the surface extending in the 2 nd direction.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2019139451 | 2019-07-30 | ||
| JP2019-139451 | 2019-07-30 | ||
| PCT/JP2020/019343 WO2021019867A1 (en) | 2019-07-30 | 2020-05-14 | Chip component, method for manufacturing chip component, and method for manufacturing electronic device |
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| Publication Number | Publication Date |
|---|---|
| CN114145080A CN114145080A (en) | 2022-03-04 |
| CN114145080B true CN114145080B (en) | 2024-05-28 |
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| CN202080052169.5A Active CN114145080B (en) | 2019-07-30 | 2020-05-14 | Chip component, method for manufacturing chip component, and method for manufacturing electronic device |
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| JP (1) | JP7166464B2 (en) |
| CN (1) | CN114145080B (en) |
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| US11641717B2 (en) * | 2021-08-30 | 2023-05-02 | International Business Machines Corporation | Soldering of end chip components in series |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2003152325A (en) * | 2001-11-13 | 2003-05-23 | Matsushita Electric Ind Co Ltd | Method of soldering chip electronic part and shape of paste solder |
| CN1449029A (en) * | 2002-03-29 | 2003-10-15 | 株式会社日立制作所 | Circuit base plate, electronic machine, and and method of manufacture |
| CN102779813A (en) * | 2011-05-12 | 2012-11-14 | 株式会社东芝 | Semiconductor device and manufacturing method thereof, and semiconductor module using the same |
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| JP2004296936A (en) * | 2003-03-27 | 2004-10-21 | Kyocera Corp | Ceramic electronic component |
| JP2006221690A (en) * | 2005-02-08 | 2006-08-24 | Alps Electric Co Ltd | Solder ball bonding method for magnetic head assembly |
| JP2010147406A (en) * | 2008-12-22 | 2010-07-01 | Tdk Corp | Production method of electronic component |
| TWI367697B (en) * | 2009-08-17 | 2012-07-01 | Nan Ya Printed Circuit Board | Printed circuit board and fabrication method thereof |
| JP2013251493A (en) * | 2012-06-04 | 2013-12-12 | Toshiba Corp | Element module |
| WO2014038066A1 (en) * | 2012-09-07 | 2014-03-13 | 三菱電機株式会社 | Power semiconductor device |
| WO2015108151A1 (en) * | 2014-01-17 | 2015-07-23 | 京セラ株式会社 | Laminated electronic component and mounting structure thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003152325A (en) * | 2001-11-13 | 2003-05-23 | Matsushita Electric Ind Co Ltd | Method of soldering chip electronic part and shape of paste solder |
| CN1449029A (en) * | 2002-03-29 | 2003-10-15 | 株式会社日立制作所 | Circuit base plate, electronic machine, and and method of manufacture |
| CN102779813A (en) * | 2011-05-12 | 2012-11-14 | 株式会社东芝 | Semiconductor device and manufacturing method thereof, and semiconductor module using the same |
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| JPWO2021019867A1 (en) | 2021-02-04 |
| CN114145080A (en) | 2022-03-04 |
| JP7166464B2 (en) | 2022-11-07 |
| WO2021019867A1 (en) | 2021-02-04 |
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