CN113972263A - 一种增强型AlGaN/GaN HEMT器件及其制备方法 - Google Patents

一种增强型AlGaN/GaN HEMT器件及其制备方法 Download PDF

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CN113972263A
CN113972263A CN202111229966.9A CN202111229966A CN113972263A CN 113972263 A CN113972263 A CN 113972263A CN 202111229966 A CN202111229966 A CN 202111229966A CN 113972263 A CN113972263 A CN 113972263A
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陆海
曾昶琨
徐尉宗
任芳芳
周东
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Nanjing University
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    • HELECTRICITY
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    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
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    • HELECTRICITY
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    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • HELECTRICITY
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface

Abstract

本发明公开了一种增强型AlGaN/GaN HEMT器件及制备方法。该器件包括自下而上依次设置的衬底、成核层、缓冲层、GaN沟道层、势垒层、组分渐变InGaN帽层和钝化层;组分渐变InGaN帽层厚度小于等于300nm,帽层内不进行掺杂,帽层中的In组分沿材料生长方向自下而上由0渐变增长至x,其中0<x≤1。本发明采用极化掺杂技术,将传统的p型GaN帽层替换为渐变组分InGaN帽层,在无需杂质掺杂的情况下实现了p型掺杂,避免了杂质掺杂引入的栅区域可靠性问题,显著提升了器件的正向栅极耐压,可应用于高频功率开关电路中。

Description

一种增强型AlGaN/GaN HEMT器件及其制备方法
技术领域
本发明涉及一种基于极化掺杂p型栅帽层的增强型AlGaN/GaN HEMT器件及其制备方法,属于宽禁带半导体晶体管领域。
背景技术
氮化镓(GaN)材料具有禁带宽度大、击穿电场高、饱和电子漂移速度大、热导率高、抗辐照能力强等优异特性,自身的极化特性在AlGaN/GaN异质结构中诱导产生高浓度、高迁移率的二维电子气(2DEG),在电力电子领域受到了广泛关注。但同时由于2DEG的存在,常规的AlGaN/GaN HEMT器件工作在耗尽型模式下,在实际应用中需要负压电源将器件关闭,导致栅极驱动电路复杂化且存在误开关的危险,器件应用受到限制。为了简化驱动,降低功耗与保障电路失效安全,增强型GaN HEMT器件成为了目前的主要研究方向。
现阶段实现增强型GaN HEMT器件的技术手段中,p型栅帽层结构由于工艺简单、寄生电导小、品质因数高等优势脱颖而出,成为了商业增强型GaN HEMT器件的主流技术路线。GaN材料中常用的受主杂质Mg激活能高达150meV,激活率低,因而需要高浓度的Mg杂质掺杂来耗尽沟道中的2DEG。在业界普遍采用肖特基栅金属接触以提升阈值电压、抑制栅漏电的这一趋势下,如果栅极施加正向高偏压时肖特基结处于反偏状态,导致大量未激活的间隙式Mg杂质的存在会构成潜在的漏电通道,加速肖特基结的退化,影响器件栅区域对漏电的阻断能力,进而降低器件栅极的正向耐压。受限于此,目前商用p型帽层GaN HEMT器件正向耐压普遍不高于10V,限制了器件在高频电力转换领域的发挥。因此如何在确保对栅漏电的抑制作用的同时提升器件的正向耐压区间是一个亟待解决的问题。
极化掺杂技术通过在三元及多元材料(如AlGaN或InGaN)内部调控组分的逐渐变化,利用材料自身的极化特性形成空间连续分布的二维束缚负电荷(或正电荷),从而诱导出三维分布的自由空穴(或电子)以满足材料电中性,不需要杂质掺杂即可实现p型(或n型)掺杂,这在光电器件领域已经获得应用验证。
发明内容
本发明提供一种基于极化掺杂p型InGaN栅帽层的增强型AlGaN/GaN HEMT器件及其制备方法,通过调控InGaN帽层的组分渐变在不需要杂质掺杂的情况下实现了p型掺杂,避免了杂质掺杂引入的对栅区域的负面效果,改善了器件的正向栅极可靠性。
本发明所采用的技术方案如下:
一种增强型AlGaN/GaN HEMT器件,包括自下而上依次设置的衬底、成核层、缓冲层、GaN沟道层、AlN插入层、势垒层、组分渐变InGaN帽层和钝化层;所述组分渐变InGaN帽层厚度小于等于300nm,帽层内不进行掺杂,帽层中的In组分沿材料生长方向自下而上由0渐变增长至x,其中0<x≤1。
进一步地,所述衬底所用材料为Si、SiC、蓝宝石、金刚石或GaN。
进一步地,所述缓冲层所用材料为AlGaN、GaN或AlGaN/GaN复合结构。
进一步地,所述AlN插入层的厚度小于等于3nm。
进一步地,所述势垒层所用材料为AlN、AlGaN、InAlN、InAlGaN中的至少一种,厚度为1~50nm。
进一步地,所述器件还包括p型接触层,p型接触层位于组分渐变InGaN帽层和钝化层之间。所述p型接触层所用材料为GaN或InGaN,厚度小于等于100nm,p型掺杂浓度为5×1015~5×1020cm-3
进一步地,所述钝化层所用材料为氧化硅、氮化硅、氮化铝、氮氧化铝、氮氧化硅中的至少一种。
本发明一种增强型AlGaN/GaN HEMT器件的制备方法,包括以下步骤:
1)在衬底上采用金属有机化合物化学气相沉积的方式依次生长成核层、缓冲层、GaN沟道层、AlN插入层、势垒层、渐变组分InGaN帽层以及p型接触层;
2)利用刻蚀或离子注入的方式形成器件隔离区域,实现有源区的电学隔离;
3)光刻出源极、漏极的窗口区域,用电感耦合等离子体刻蚀的方法去除窗口区域的组分渐变InGaN帽层与p型接触层;
4)光刻出源极、漏极的电极接触区域,用电子束蒸发或磁控溅射生长电极金属,通过剥离工艺形成电极,并在氮气氛围中对整个晶圆进行快速热退火处理,在源漏区域形成欧姆接触;
5)在源极和漏极区域之间光刻出栅极电极接触区域,用电子束蒸发或磁控溅射生长电极金属,通过剥离工艺形成栅极电极;
6)在器件上表面淀积钝化层,在钝化层上光刻出栅极、源极与漏极电极的窗口区域。
进一步地,所述步骤2)中,隔离区域采用局部离子注入平面隔离,注入的元素为Ar、F、N、B中的至少一种。
进一步地,所述步骤4)中,快速热退火处理的温度为500℃~950℃,退火时间为0~120s。
本发明的器件采用极化掺杂技术,将传统的p型GaN帽层替换为渐变组分InGaN帽层,在无需杂质掺杂的条件下实现了帽层的p型掺杂,避免了杂质掺杂引入的高栅压下栅区域可靠性问题,在实现增强型GaN HEMT器件的基础上显著提高了器件的正向栅极耐压,可应用于高频功率开关电路中。
附图说明
图1为本发明器件的横截面结构示意图。
图2为本发明器件的制备工艺流程示意图。
图3为本发明器件的转移特性曲线。
图4为本发明器件的输出特性曲线。
图5为本发明器件的正向栅极耐压测试曲线。
具体实施方式
下面将对本发明的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
如图1所示,本实施例的增强型AlGaN/GaN HEMT器件,包括自下而上依次设置的衬底1、AlN成核层2、GaN缓冲层3、GaN沟道层4、AlN插入层5、AlGaN势垒层6、组分渐变InGaN帽层7、p型GaN接触层8和SiNx钝化层12。其中,衬底1的材料可以为Si、SiC、蓝宝石、金刚石或GaN;组分渐变InGaN帽层7的厚度小于等于300nm,帽层内不进行掺杂,In组分沿材料生长方向自下而上由0线性增长至x,其中0<x≤1,In组分由0增长至x的渐变方式包括线性变化与非线性变化。器件中设置的p型接触层作为组分渐变InGaN帽层的空穴来源,厚度小于等于100nm,或者也可以不设置p型接触层,也能实现器件制备。
如图2所示,本实施例制备上述增强型AlGaN/GaN HEMT器件的方法,包括如下步骤:
1)如图(a)所示,通过金属有机化合物气相沉积在Si衬底1上依次淀积生长一层AlN成核层2,一层GaN缓冲层3,一层300nm厚的GaN沟道层4,一层1nm厚的AlN插入5,一层13nm厚的AlGaN势垒层6,一层130nm厚的组分渐变InGaN帽层7和一层10nm厚的Mg掺杂p型GaN接触层8,其中组分渐变InGaN帽层7的In组分沿材料生长方向自下而上从0线性增长至0.16,不进行掺杂;p-GaN接触层8的Mg掺杂浓度为5×1019cm-3
2)如图(b)所示,通过离子注入的方式定义有源区,形成器件之间的电学隔离,其中离子注入采用双次氮注入平面隔离,注入能量分别为45keV和135keV。
3)如图(c)所示,光刻定义出源极、漏极的窗口区域,通过电感耦合等离子体刻蚀去除接触窗口区域的组分渐变InGaN帽层7与p-GaN接触层8。
4)如图(d)所示,光刻定义出源极9、漏极10的电极接触区域,用电子束蒸发淀积Ti/Al/Ni/Au金属叠层,各层厚度依次为Ti层30nm、Al层150nm、Ni层40nm、Au层100nm,通过剥离工艺形成电极,并对整个晶圆进行快速热退火处理,形成欧姆接触,其中退火条件为氮气氛围,温度为850℃,时间为30s。
5)如图(e)所示,在源极9和漏极10区域之间光刻定义出栅极电极11接触区域,用电子束蒸发淀积Ni/Au金属叠层,各层厚度依次为Ni层30nm、Au层120nm,通过剥离工艺形成栅极电极11。
6)如图(f)所示,在器件上表面通过等离子体增强化学气相沉积淀积50nm的SiNx钝化层12,在钝化层上定义源极9、漏极10与栅极11的电极窗口区域并用反应离子刻蚀去掉其上的SiNx钝化层12。
上述基于极化掺杂p型InGaN栅帽层的增强型AlGaN/GaN HEMT器件,通过调控InGaN帽层的组分渐变在无需杂质掺杂的情况下实现了p型掺杂。如图3-5所示,制备的器件阈值电压为1.3V,亚阈值摆幅为90mV/dec,最大漏源饱和电流密度达到140mA/mm,开启电阻为28Ω·mm,正向栅极耐压达到15.2V(定义为栅漏电达到1mA/mm),相较于正向栅极耐压普遍为6~8V的商业增强型GaN功率器件(例如GaN Systems、GaNPower、Infineon等功率器件公司的产品)有明显提高。上述结果表明,本发明将极化掺杂p型InGaN帽层引入增强型AlGaN/GaN HEMT器件,避免了杂质掺杂引入的栅区域可靠性问题,在维持低栅漏电的前提下提升了器件在高栅压下的工作可靠性。

Claims (10)

1.一种增强型AlGaN/GaN HEMT器件,其特征在于,包括自下而上依次设置的衬底、成核层、缓冲层、GaN沟道层、AlN插入层、势垒层、组分渐变InGaN帽层和钝化层;所述组分渐变InGaN帽层厚度小于等于300nm,帽层内不进行掺杂,帽层中的In组分沿材料生长方向自下而上由0渐变增长至x,其中0<x≤1。
2.根据权利要求1所述一种增强型AlGaN/GaN HEMT器件,其特征在于,所述衬底所用材料为Si、SiC、蓝宝石、金刚石或GaN。
3.根据权利要求1所述一种增强型AlGaN/GaN HEMT器件,其特征在于,所述缓冲层所用材料为AlGaN、GaN或AlGaN/GaN复合结构。
4.根据权利要求1所述一种增强型AlGaN/GaN HEMT器件,其特征在于,所述AlN插入层的厚度小于等于3nm。
5.根据权利要求1所述一种增强型AlGaN/GaN HEMT器件,其特征在于,所述势垒层所用材料为AlN、AlGaN、InAlN、InAlGaN中的至少一种,厚度为1~50nm。
6.根据权利要求1所述一种增强型AlGaN/GaN HEMT器件,其特征在于,所述器件还包括p型接触层,p型接触层位于组分渐变InGaN帽层和钝化层之间。
7.根据权利要求6所述一种增强型AlGaN/GaN HEMT器件,其特征在于,所述p型接触层所用材料为GaN或InGaN,厚度小于等于100nm,p型掺杂浓度为5×1015~5×1020cm-3
8.如权利要求1所述一种增强型AlGaN/GaN HEMT器件的制备方法,其特征在于,该方法包括以下步骤:
1)在衬底上采用金属有机化合物化学气相沉积的方式依次生长成核层、缓冲层、GaN沟道层、AlN插入层、势垒层、渐变组分InGaN帽层以及p型接触层;
2)利用刻蚀或离子注入的方式形成器件隔离区域,实现有源区的电学隔离;
3)光刻出源极、漏极的窗口区域,用电感耦合等离子体刻蚀的方法去除窗口区域的组分渐变InGaN帽层与p型接触层;
4)光刻出源极、漏极的电极接触区域,用电子束蒸发或磁控溅射生长电极金属,通过剥离工艺形成电极,并在氮气氛围中对整个晶圆进行快速热退火处理,在源漏区域形成欧姆接触;
5)在源极和漏极区域之间光刻出栅极电极接触区域,用电子束蒸发或磁控溅射生长电极金属,通过剥离工艺形成栅极电极;
6)在器件上表面淀积钝化层,在钝化层上光刻出栅极、源极与漏极电极的窗口区域。
9.根据权利要求8所述的制备方法,其特征在于,所述步骤2)中,隔离区域采用局部离子注入平面隔离,注入的元素为Ar、F、N、B中的至少一种。
10.根据权利要求8所述的制备方法,其特征在于,所述步骤4)中,快速热退火处理的温度为500℃~950℃,退火时间为0~120s。
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