CN113169116A - 图案化金属层的方法 - Google Patents

图案化金属层的方法 Download PDF

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Publication number
CN113169116A
CN113169116A CN201980078544.0A CN201980078544A CN113169116A CN 113169116 A CN113169116 A CN 113169116A CN 201980078544 A CN201980078544 A CN 201980078544A CN 113169116 A CN113169116 A CN 113169116A
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CN
China
Prior art keywords
layer
molybdenum
substrate
molybdenum layer
semiconductor device
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Pending
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CN201980078544.0A
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English (en)
Chinese (zh)
Inventor
奥姆卡尔姆·纳兰姆苏
卢多维克·戈代
王诣斐
傅晋欣
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Applied Materials Inc
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Applied Materials Inc
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Publication of CN113169116A publication Critical patent/CN113169116A/zh
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/089Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H10P14/6512Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a gas or vapour
    • H10P14/6514Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a gas or vapour by exposure to a plasma
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/262Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by physical means only
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/60Wet etching
    • H10P50/64Wet etching of semiconductor materials
    • H10P50/642Chemical etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/60Wet etching
    • H10P50/66Wet etching of conductive or resistive materials
    • H10P50/663Wet etching of conductive or resistive materials by chemical means only
    • H10P50/667Wet etching of conductive or resistive materials by chemical means only by liquid etching only
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/054Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by selectively removing parts thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • H10W20/0633Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material using subtractive patterning of the conductive members
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/087Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving multiple stacked pre-patterned masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/093Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/095Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/093Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44Conductive materials thereof
    • H10W20/4403Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4437Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being a transition metal
    • H10W20/4441Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being a transition metal the principal metal being a refractory metal
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6304Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6314Formation by oxidation, e.g. oxidation of the substrate of a metallic layer

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
CN201980078544.0A 2018-11-30 2019-09-30 图案化金属层的方法 Pending CN113169116A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201862773999P 2018-11-30 2018-11-30
US62/773,999 2018-11-30
PCT/US2019/053778 WO2020112237A1 (en) 2018-11-30 2019-09-30 Methods of patterning metal layers

Publications (1)

Publication Number Publication Date
CN113169116A true CN113169116A (zh) 2021-07-23

Family

ID=70853119

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201980078544.0A Pending CN113169116A (zh) 2018-11-30 2019-09-30 图案化金属层的方法

Country Status (6)

Country Link
EP (1) EP3888120A4 (https=)
JP (1) JP7507761B2 (https=)
KR (1) KR102779927B1 (https=)
CN (1) CN113169116A (https=)
TW (1) TWI725619B (https=)
WO (1) WO2020112237A1 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022179680A1 (en) * 2021-02-24 2022-09-01 Imec Vzw A method for etching molybdenum
US12243769B2 (en) 2022-05-03 2025-03-04 Nanya Technology Corporation Method for preparing semiconductor device structure using nitrogen-containing pattern
US20240038541A1 (en) * 2022-07-27 2024-02-01 Applied Materials, Inc. Methods for removing molybdenum oxides from substrates
JP7821059B2 (ja) * 2022-07-29 2026-02-26 株式会社Screenホールディングス 基板処理方法および基板処理装置
JP7812758B2 (ja) 2022-07-29 2026-02-10 株式会社Screenホールディングス 基板処理方法および基板処理装置
JP7837241B2 (ja) * 2022-07-29 2026-03-30 株式会社Screenホールディングス 基板処理方法および基板処理装置
JPWO2024048382A1 (https=) 2022-08-31 2024-03-07
US12543523B2 (en) 2023-10-20 2026-02-03 Applied Materials, Inc. Chlorine-free removal of molybdenum oxides from substrates

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5350484A (en) * 1992-09-08 1994-09-27 Intel Corporation Method for the anisotropic etching of metal films in the fabrication of interconnects
US20060166108A1 (en) * 2005-01-27 2006-07-27 Applied Materials, Inc. Method for etching a molybdenum layer suitable for photomask fabrication
US20100320457A1 (en) * 2007-11-22 2010-12-23 Masahito Matsubara Etching solution composition
US20130059444A1 (en) * 2011-09-01 2013-03-07 Tel Epion, Inc. Gas cluster ion beam etching process for metal-containing materials

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04111312A (ja) * 1990-08-31 1992-04-13 Mitsubishi Electric Corp 微細加工装置及び方法
JPH0897214A (ja) * 1994-09-29 1996-04-12 Nec Corp 半導体装置の製造方法
JPH08232083A (ja) * 1995-02-24 1996-09-10 Fuji Electric Co Ltd 表面弾性波デバイスの製造方法
US5972235A (en) * 1997-02-28 1999-10-26 Candescent Technologies Corporation Plasma etching using polycarbonate mask and low pressure-high density plasma
KR20070017762A (ko) * 2005-08-08 2007-02-13 엘지.필립스 엘시디 주식회사 식각액 조성물, 이를 이용한 도전막의 패터닝 방법 및평판표시장치의 제조 방법
TWM286071U (en) * 2005-10-26 2006-01-21 Yun-Huei Wang Improved structure for distillation wine making machine
TWI358467B (en) * 2007-12-07 2012-02-21 Nanya Technology Corp Etchant for metal alloy having hafnium and molybde
JP2010056541A (ja) * 2008-07-31 2010-03-11 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2010165732A (ja) * 2009-01-13 2010-07-29 Hitachi Displays Ltd エッチング液及びこれを用いたパターン形成方法並びに液晶表示装置の製造方法
WO2016145337A1 (en) * 2015-03-11 2016-09-15 Exogenesis Corporation Method for neutral beam processing based on gas cluster ion beam technology and articles produced thereby
US20130335383A1 (en) * 2012-06-19 2013-12-19 Qualcomm Mems Technologies, Inc. Removal of molybdenum
US9425062B2 (en) * 2013-03-14 2016-08-23 Applied Materials, Inc. Method for improving CD micro-loading in photomask plasma etching
CN105522684B (zh) * 2014-12-25 2018-11-09 比亚迪股份有限公司 一种金属-树脂复合体及其制备方法和一种电子产品外壳
US9449843B1 (en) * 2015-06-09 2016-09-20 Applied Materials, Inc. Selectively etching metals and metal nitrides conformally
JP7073710B2 (ja) * 2017-01-20 2022-05-24 東京エレクトロン株式会社 プラズマ処理装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5350484A (en) * 1992-09-08 1994-09-27 Intel Corporation Method for the anisotropic etching of metal films in the fabrication of interconnects
US20060166108A1 (en) * 2005-01-27 2006-07-27 Applied Materials, Inc. Method for etching a molybdenum layer suitable for photomask fabrication
US20100320457A1 (en) * 2007-11-22 2010-12-23 Masahito Matsubara Etching solution composition
US20130059444A1 (en) * 2011-09-01 2013-03-07 Tel Epion, Inc. Gas cluster ion beam etching process for metal-containing materials

Also Published As

Publication number Publication date
EP3888120A1 (en) 2021-10-06
JP2022509816A (ja) 2022-01-24
WO2020112237A1 (en) 2020-06-04
KR102779927B1 (ko) 2025-03-10
KR20210087101A (ko) 2021-07-09
TWI725619B (zh) 2021-04-21
JP7507761B2 (ja) 2024-06-28
EP3888120A4 (en) 2022-11-02
TW202025302A (zh) 2020-07-01

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