EP3888120A4 - METHOD OF STRUCTURING METAL LAYERS - Google Patents
METHOD OF STRUCTURING METAL LAYERS Download PDFInfo
- Publication number
- EP3888120A4 EP3888120A4 EP19890099.5A EP19890099A EP3888120A4 EP 3888120 A4 EP3888120 A4 EP 3888120A4 EP 19890099 A EP19890099 A EP 19890099A EP 3888120 A4 EP3888120 A4 EP 3888120A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- methods
- metallic layers
- patterning metallic
- patterning
- layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/089—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
- H10P14/6512—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a gas or vapour
- H10P14/6514—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a gas or vapour by exposure to a plasma
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
- H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
- H10P50/262—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by physical means only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
- H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
- H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
- H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
- H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
- H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/60—Wet etching
- H10P50/64—Wet etching of semiconductor materials
- H10P50/642—Chemical etching
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/60—Wet etching
- H10P50/66—Wet etching of conductive or resistive materials
- H10P50/663—Wet etching of conductive or resistive materials by chemical means only
- H10P50/667—Wet etching of conductive or resistive materials by chemical means only by liquid etching only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
- H10W20/035—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/054—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by selectively removing parts thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
- H10W20/0633—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material using subtractive patterning of the conductive members
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
- H10W20/087—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving multiple stacked pre-patterned masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
- H10W20/095—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
- H10W20/097—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/44—Conductive materials thereof
- H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
- H10W20/4437—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being a transition metal
- H10W20/4441—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being a transition metal the principal metal being a refractory metal
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6302—Non-deposition formation processes
- H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
- H10P14/6314—Formation by oxidation, e.g. oxidation of the substrate of a metallic layer
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201862773999P | 2018-11-30 | 2018-11-30 | |
| PCT/US2019/053778 WO2020112237A1 (en) | 2018-11-30 | 2019-09-30 | Methods of patterning metal layers |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP3888120A1 EP3888120A1 (en) | 2021-10-06 |
| EP3888120A4 true EP3888120A4 (en) | 2022-11-02 |
Family
ID=70853119
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP19890099.5A Pending EP3888120A4 (en) | 2018-11-30 | 2019-09-30 | METHOD OF STRUCTURING METAL LAYERS |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP3888120A4 (https=) |
| JP (1) | JP7507761B2 (https=) |
| KR (1) | KR102779927B1 (https=) |
| CN (1) | CN113169116A (https=) |
| TW (1) | TWI725619B (https=) |
| WO (1) | WO2020112237A1 (https=) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022179680A1 (en) * | 2021-02-24 | 2022-09-01 | Imec Vzw | A method for etching molybdenum |
| US12243769B2 (en) | 2022-05-03 | 2025-03-04 | Nanya Technology Corporation | Method for preparing semiconductor device structure using nitrogen-containing pattern |
| US20240038541A1 (en) * | 2022-07-27 | 2024-02-01 | Applied Materials, Inc. | Methods for removing molybdenum oxides from substrates |
| JP7821059B2 (ja) * | 2022-07-29 | 2026-02-26 | 株式会社Screenホールディングス | 基板処理方法および基板処理装置 |
| JP7812758B2 (ja) | 2022-07-29 | 2026-02-10 | 株式会社Screenホールディングス | 基板処理方法および基板処理装置 |
| JP7837241B2 (ja) * | 2022-07-29 | 2026-03-30 | 株式会社Screenホールディングス | 基板処理方法および基板処理装置 |
| JPWO2024048382A1 (https=) | 2022-08-31 | 2024-03-07 | ||
| US12543523B2 (en) | 2023-10-20 | 2026-02-03 | Applied Materials, Inc. | Chlorine-free removal of molybdenum oxides from substrates |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4128780A1 (de) * | 1990-08-31 | 1992-03-05 | Mitsubishi Electric Corp | Vorrichtung und verfahren zum bilden einer feinstruktur |
| US5350484A (en) * | 1992-09-08 | 1994-09-27 | Intel Corporation | Method for the anisotropic etching of metal films in the fabrication of interconnects |
| US20100320457A1 (en) * | 2007-11-22 | 2010-12-23 | Masahito Matsubara | Etching solution composition |
| US20130059444A1 (en) * | 2011-09-01 | 2013-03-07 | Tel Epion, Inc. | Gas cluster ion beam etching process for metal-containing materials |
| US9449843B1 (en) * | 2015-06-09 | 2016-09-20 | Applied Materials, Inc. | Selectively etching metals and metal nitrides conformally |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0897214A (ja) * | 1994-09-29 | 1996-04-12 | Nec Corp | 半導体装置の製造方法 |
| JPH08232083A (ja) * | 1995-02-24 | 1996-09-10 | Fuji Electric Co Ltd | 表面弾性波デバイスの製造方法 |
| US5972235A (en) * | 1997-02-28 | 1999-10-26 | Candescent Technologies Corporation | Plasma etching using polycarbonate mask and low pressure-high density plasma |
| US8293430B2 (en) * | 2005-01-27 | 2012-10-23 | Applied Materials, Inc. | Method for etching a molybdenum layer suitable for photomask fabrication |
| KR20070017762A (ko) * | 2005-08-08 | 2007-02-13 | 엘지.필립스 엘시디 주식회사 | 식각액 조성물, 이를 이용한 도전막의 패터닝 방법 및평판표시장치의 제조 방법 |
| TWM286071U (en) * | 2005-10-26 | 2006-01-21 | Yun-Huei Wang | Improved structure for distillation wine making machine |
| TWI358467B (en) * | 2007-12-07 | 2012-02-21 | Nanya Technology Corp | Etchant for metal alloy having hafnium and molybde |
| JP2010056541A (ja) * | 2008-07-31 | 2010-03-11 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| JP2010165732A (ja) * | 2009-01-13 | 2010-07-29 | Hitachi Displays Ltd | エッチング液及びこれを用いたパターン形成方法並びに液晶表示装置の製造方法 |
| WO2016145337A1 (en) * | 2015-03-11 | 2016-09-15 | Exogenesis Corporation | Method for neutral beam processing based on gas cluster ion beam technology and articles produced thereby |
| US20130335383A1 (en) * | 2012-06-19 | 2013-12-19 | Qualcomm Mems Technologies, Inc. | Removal of molybdenum |
| US9425062B2 (en) * | 2013-03-14 | 2016-08-23 | Applied Materials, Inc. | Method for improving CD micro-loading in photomask plasma etching |
| CN105522684B (zh) * | 2014-12-25 | 2018-11-09 | 比亚迪股份有限公司 | 一种金属-树脂复合体及其制备方法和一种电子产品外壳 |
| JP7073710B2 (ja) * | 2017-01-20 | 2022-05-24 | 東京エレクトロン株式会社 | プラズマ処理装置 |
-
2019
- 2019-09-30 JP JP2021529724A patent/JP7507761B2/ja active Active
- 2019-09-30 KR KR1020217019714A patent/KR102779927B1/ko active Active
- 2019-09-30 EP EP19890099.5A patent/EP3888120A4/en active Pending
- 2019-09-30 WO PCT/US2019/053778 patent/WO2020112237A1/en not_active Ceased
- 2019-09-30 CN CN201980078544.0A patent/CN113169116A/zh active Pending
- 2019-11-14 TW TW108141301A patent/TWI725619B/zh not_active IP Right Cessation
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4128780A1 (de) * | 1990-08-31 | 1992-03-05 | Mitsubishi Electric Corp | Vorrichtung und verfahren zum bilden einer feinstruktur |
| US5350484A (en) * | 1992-09-08 | 1994-09-27 | Intel Corporation | Method for the anisotropic etching of metal films in the fabrication of interconnects |
| US20100320457A1 (en) * | 2007-11-22 | 2010-12-23 | Masahito Matsubara | Etching solution composition |
| US20130059444A1 (en) * | 2011-09-01 | 2013-03-07 | Tel Epion, Inc. | Gas cluster ion beam etching process for metal-containing materials |
| US9449843B1 (en) * | 2015-06-09 | 2016-09-20 | Applied Materials, Inc. | Selectively etching metals and metal nitrides conformally |
Non-Patent Citations (2)
| Title |
|---|
| GU XUN ET AL: "A novel metallic complex reaction etching for transition metal and magnetic material by low-temperature and damage-free neutral beam process for non-volatile MRAM device applications", 2015 SYMPOSIUM ON VLSI TECHNOLOGY, IEEE, 9 June 2014 (2014-06-09), pages 1 - 2, XP032640237, ISSN: 0743-1562, [retrieved on 20140908], DOI: 10.1109/VLSIT.2014.6894362 * |
| See also references of WO2020112237A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| EP3888120A1 (en) | 2021-10-06 |
| JP2022509816A (ja) | 2022-01-24 |
| WO2020112237A1 (en) | 2020-06-04 |
| KR102779927B1 (ko) | 2025-03-10 |
| KR20210087101A (ko) | 2021-07-09 |
| TWI725619B (zh) | 2021-04-21 |
| JP7507761B2 (ja) | 2024-06-28 |
| TW202025302A (zh) | 2020-07-01 |
| CN113169116A (zh) | 2021-07-23 |
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| DAV | Request for validation of the european patent (deleted) | ||
| DAX | Request for extension of the european patent (deleted) | ||
| RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 23/532 20060101ALI20220624BHEP Ipc: H01L 21/768 20060101ALI20220624BHEP Ipc: H01L 21/3213 20060101AFI20220624BHEP |
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| A4 | Supplementary search report drawn up and despatched |
Effective date: 20221004 |
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| RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 23/532 20060101ALI20220927BHEP Ipc: H01L 21/768 20060101ALI20220927BHEP Ipc: H01L 21/3213 20060101AFI20220927BHEP |