CN112912243A - 改善嵌入在主体结构中的集成组件的连接性的方法和系统 - Google Patents
改善嵌入在主体结构中的集成组件的连接性的方法和系统 Download PDFInfo
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Abstract
本公开涉及用于改善嵌入式组件的连接性的系统和方法。具体地,本公开涉及用于使用增材制造通过以下改善嵌入式组件与主体结构和/或其它嵌入式组件的连接性的系统和方法:可选择地桥接由于制造偏差和内在公差而在所述嵌入式组件或装置与所述主体结构之间以及在一个嵌入式组件与多个其它嵌入式组件之间自然形成的间隙。
Description
背景技术
本公开涉及用于改善嵌入式组件的连接性的系统和方法。具体地,本公开涉及用于使用增材制造通过以下改善嵌入式组件与主体结构和/或其它嵌入式组件的连接性的系统和方法:可选择地桥接在一个或多个嵌入式装置与主体结构之间以及在一个嵌入式装置与多个其它嵌入式装置之间形成的间隙。
增材制造为生产包含复合材料的机械组件提供了机会,此外,随着增材制造行业中导电材料的普及,需要将第三方制造的组件嵌入正在制造的结构中。这些导电材料可以是电气、热学、声学和/或光学的。
例如,最先进的芯片嵌入技术已成为制作复杂电子器件的必要条件。由于对传感器的不同需求,变得迫切需要由微型化和优化封装驱动的具有嵌入式传感器的新应用;因为嵌入具有大量互连及更多互连的芯片会增加复杂性。
考虑到批量生产制造方法以及最终产品(嵌入式组件(例如,IC 200)以及用于其嵌入的插槽或位点)的最终大小变化,在嵌入位点的壁与被嵌入的组件之间将始终存在间隙。此间隙需要密封,以便防止嵌入式组件变得松动,或者如果需要特殊结构(如电气互连线、散热线、光纤或机械换能线)从包封嵌入式组件的盒行进到嵌入式组件,则需要位于间隙中的支撑件,否则通过增材制造沉积的线可能会断裂或非常细,从而导致缺少期望的功能,例如在集成电路或电子传感器的情况下,这可能会导致电导率损失或由于减小的金属厚度而具有非常高的电阻(参见例如图3C、3D)。
本公开旨在克服上述问题中的一个或多个问题。
发明内容
在各个实施例中,公开了用于使用增材制造通过桥接在嵌入式组件与主体结构之间形成的间隙改善所述嵌入式组件与所述主体结构和/或其它集成电路的热学、电气、光学、声学和机械连接性的系统和方法。所述嵌入式组件可以是例如在某种程度上需要电气、声学、光学、热学、机械等连接性的微型开关、传感器、压电材料、透镜、集成电路、发光二极管等或其组合。
在一个实施例中,本文提供了一种用于增加主体结构中的嵌入式组件的连接性的方法,所述方法可在增材制造系统中实施,所述方法包括:提供具有顶部表面的所述主体结构,所述主体结构包括具有孔壁和孔底的孔,所述孔被配置成收纳并容纳第一嵌入式组件(例如,IC);将具有顶表面、底表面和周界的要嵌入的第一组件定位在所述孔内,由此嵌入所述第一组件;检查所述第一嵌入式组件;确定所述孔壁与所述第一嵌入式组件的所述周界之间的间隙;以及如果所述孔壁与所述嵌入式组件的所述周界之间的所述间隙大于预定间隙阈值但小于桥接阈值,则使用所述增材制造系统,在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件。
在另一个实施例中,所述增材制造系统进一步包括:处理腔室;光学模块、机械模块和声学模块中的至少一个;其中光学模块、机械模块和所述声学模块中的所述至少一个包括与非易失性存储器通信的处理器,所述非易失性存储器包含处理器可读介质,所述处理器可读介质上具有可执行指令集,所述可执行指令集被配置成在被执行时使所述处理器:捕获具有所述第一嵌入式组件的所述主体结构的图像;测量所述孔壁与所述第一嵌入式组件的所述周界之间的间隙;将测得的间隙与所述预定间隙阈值进行比较;将所述测得的间隙与所述桥接阈值进行比较;如果所述测得的间隙大于所述间隙阈值但小于所述桥接阈值,则指示操作者和所述增材制造系统中的至少一个在所述第一嵌入式组件的周界壁与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件;否则如果所述测得的间隙小于所述间隙阈值,则防止所述增材制造系统在所述第一嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件;否则如果所述测得的间隙大于所述间隙阈值且大于所述桥接阈值,则致动警报。
在又一个实施例中,本文提供了一种处理器可读介质,所述处理器可读介质上具有可执行指令集,所述可执行指令集被配置成在被执行时使处理器:捕获具有顶部表面的主体结构的图像,所述主体结构包括具有孔壁和孔底的孔,所述孔被配置成收纳并容纳要嵌入的第一组件,其中所述要嵌入的第一组件具有顶表面、底表面和周界;使用光学模块和声学模块以及机械模块中的至少一个,测量所述主体结构的所述孔壁与所述第一嵌入式组件的所述周界之间的间隙;将测得的间隙与预定间隙阈值进行比较;将所述测得的间隙与桥接阈值进行比较;如果所述测得的间隙大于所述间隙阈值且小于所述桥接阈值,则指示操作者和所述增材制造系统中的至少一个在所述第一嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件;否则如果所述测得的间隙小于所述间隙阈值,则防止所述增材制造系统在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加所述桥接构件;否则如果所述测得的间隙大于所述间隙阈值且大于所述桥接阈值,则致动警报。
根据以下详细描述,当结合示例性而非限制性的附图和实例阅读时,用于使用增材制造系统通过桥接嵌入式组件与主体结构之间形成的间隙改善嵌入式组件与所述主体结构和/或其它嵌入式组件的连接性的系统和方法的这些和其它特征将变得显而易见。
附图说明
为了更好地理解用于改善嵌入式集成电路的连接性的系统和方法,关于其实施例,请参考所附实例和附图,其中:
图1A是主体结构的孔中的嵌入式集成电路的等距视图,其中图1B展示了俯视平面图并且图1C展示了沿图1A的A-A线的X-Z横截面;
图2是展示了包括多个不同的嵌入式组件的主体结构的实施例的示意图;
图3A展示了图1B的放大俯视平面图,其中具有当前生产的接触焊盘,图3B展示了沿图3A的线B-B的X-Z横截面,图3C展示了图3A的在具有与接触焊盘的电流电连接的情况下的俯视平面图,并且图3D展示了沿图3C的线C-C的X-Z横截面中的所产生的断裂;
图4从左到右是各种测得的间隙对桥接沉积的影响的示意图;
图5是使用本文公开和要求保护的方法和系统在四侧面孔中的四边形IC的潜在产生的间隙和桥接沉积的示意图;
图6A是所描述的用于在使用所述系统添加的一个或多个桥接构件之上沉积接触层(绝缘或导电)的方法的实施方案的顶平面(X-Y)示意图,其中其侧(X-Z)立面图在图6B中展示;并且
图7是描述本文所述方法的实施例的流程图。
具体实施方式
本文提供了用于使用增材制造通过桥接在嵌入式组件与主体结构和/或其它嵌入式组件和其它组件之间形成的间隙改善嵌入式组件和集成电路与主体结构和/或其它嵌入式组件的连接性的系统和方法的实施例。
用于将有源和无源组件嵌入主体结构中的技术已成为开发复杂电子器件的必要条件。由于对电气性能、芯片尺寸和一个或多个互连的不同要求,已经开发了不同的嵌入技术。
同样,将组件放置在其它主体内以将组件与环境隔离和/或绝缘的需要,例如,组装独特的结构的微型LED等,可以使用用于嵌入此类装置的增材制造来实现。大多数(如果不是全部)嵌入式装置需要在嵌入式组件200外部的某种连接性,因此为此目的需要沉积另外的材料。由于要嵌入的装置(可与“组件”、“电路”、“芯片”、“集成电路”互换)以及主体结构(可与印刷电路板(PCB)、柔性印刷电路(FPC)和高密度互连印刷电路(HDIPC)互换)的制造公差,它们之间的间隙可能会限制连接性材料的机械、电气和光学性质(如果有的话)。因此,本文提供的方法和系统改善了嵌入式组件与其主体结构的机械、电气、热学、声学和光学连接性。如所公开的,嵌入式组件可以是在某种程度上需要电气、声学、光学、热学、机械、其组合等连接性的微型开关、传感器、压电材料、钻石、集成电路、发光二极管、激光器等。如本文所使用的,在所公开技术的上下文中,术语“连接性”是指主体的布线图案与嵌入式组件之间的电气和物理连接的确定性。在另一个实施例中,所述术语是指对电子、声音、光子、热、应变等的流动的抵抗力的倒数,当与没有实施所公开的方法和系统的相同配置相比时,其连接性被寻求提高。
本公开提供了用于在必要时桥接间隙(例如,在嵌入式组件与主体之间)从而使得使用增材制造制造的结构中的嵌入式装置保持在适当位置的方法,和/或在没有任何机械和电气缺陷的情况下添加从嵌入式装置延伸到所述结构的其它材料的能力。
作为增材制造的实施例,三维(3D)打印已用于创建静态对象和其它稳定结构,如原型、产品和模具。三维打印机可以通过逐层添加材料将通常使用计算机辅助设计(CAD)软件创建的3D图像转换为3D对象。因此,3D打印已成为术语“增材制造”的相对同义词。相比之下,“减材制造”是指通过蚀刻、切割、铣削或机械加工掉材料以创建期望形状来创建对象,并包含等离子体腔室、湿式化学工作台、车床、铣床、磨床和刨机等CNC机械加工机器。
所使用的系统可以通常包括若干子系统和模块。这些子系统和模块可以是例如:机械子系统,所述机械子系统用于控制如激光器或打印头等增材制造元件的移动;基板(或卡盘),其加热和传送器运动;油墨组合物注射系统,材料细丝来源或材料的液体来源;固化/烧结子系统;基于计算机的子系统,所述基于计算机的子系统用于控制过程并生成适当的增材制造指令;组件放置系统(例如,用于“拾取和放置”的机器人臂);机器视觉系统;坐标和尺寸测量系统以及用于控制增材制造过程的命令和控制系统。
因此并且在一个实施例中,本文提供了一种用于增加主体结构中的嵌入式组件的连接性的方法,所述方法可在增材制造系统中实施,所述方法包括:提供具有顶部表面的所述主体结构,所述主体结构包括具有孔壁和孔底的孔,所述孔被配置成收纳并容纳第一嵌入式组件;将具有顶表面、底表面和周界的所述第一嵌入式组件定位在所述孔内,由此嵌入所述第一组件;检查所述第一嵌入式组件;确定所述孔壁与所述第一嵌入式组件的所述周界之间的间隙;以及如果所述孔壁与所述嵌入式组件的所述周界之间的所述间隙大于预定间隙阈值但小于桥接阈值,则使用所述增材制造系统,在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件。
术语组件可以是指例如“集成电路”或“芯片”,如封装或未封装的单个IC装置。术语“芯片封装”可以具体地表示芯片进入的壳体,所述壳体用于插入(插座安装)或焊接(表面安装)到如印刷电路板(PCB)等主体结构,从而创建用于芯片的安装。在电子器件中,术语芯片封装或芯片载体可以表示在组件或集成电路周围添加以使其在不损坏的情况下被处置且并入到电路中的材料。
此外,与本文描述的系统和方法结合使用的IC或芯片封装可以是四方扁平封装(QFP)封装、薄型小外形封装(TSOP)、小外形集成电路(SOIC)封装、小外形J引线(SOJ)封装、塑料引线芯片载体(PLCC)封装、晶圆级芯片规模封装(WLCSP)、模具阵列工艺-球栅阵列(MAPBGA)封装、球栅阵列(BGA)、四方扁平无引线(QFN)封装、平面栅格阵列(LGA)封装、无源组件或包括上述组件中的两个或更多个的组合。
在另一个实施例中,嵌入式组件可以是要添加到主体结构中的其它元件,并且可以在很大范围内变化,例如权重元件如Led结构、成品元件如隔振器、风扇、复杂的散热器、透镜、电源、容纳液体的容器等。术语“组件”不旨在限制所嵌入的组件或装置的类型,而是旨在涵盖要并入主体结构中预制作的位点中的任何组件或装置,所述预制作的位点位于主体结构内、经大小设计并配置成容纳所述组件/装置。
如所指出的,用于实施用于制作包含具有改善的连接性的嵌入式组件的主体结构的方法的系统可以在其上沉积或以其它方式添加的另外的导电材料,所述导电材料可以含有不同的金属。例如,银(Ag)、铜或金。同样,还可以使用其它金属(例如,Al、Ni、Pt)或金属前体,并且所提供的实例不应被认为是限制性的。
在某些实施例中,本文提供的增材制造系统进一步包括与CAM模块通信并且在CAM模块的控制下的机器人臂,所述机器人臂被配置成将多个芯片中的每个芯片放置在其预定孔中。机器人臂可以进一步被配置成将芯片操作性地耦合并且连接到接触焊盘(参见例如图3A的250)。
此外,用于形成具有改善的连接性的主体结构的系统进一步包括:处理腔室;光学模块、机械模块和声学模块中的至少一个;其中光学模块、机械模块和所述声学模块中的所述至少一个包括与非易失性存储器(或非易失性存储装置)通信的处理器,所述非易失性存储器包含处理器可读介质,所述处理器可读介质上具有可执行指令集,所述可执行指令集被配置成在被执行时使至少一个处理器:捕获具有所述第一嵌入式组件的所述主体结构的图像;测量所述孔壁与所述第一嵌入式组件的所述周界之间的间隙;将测得的间隙与所述预定间隙阈值进行比较;将所述测得的间隙与所述桥接阈值进行比较;如果所述测得的间隙大于所述间隙阈值但小于所述桥接阈值,则指示操作者和所述增材制造系统中的至少一个在所述嵌入式组件的周界壁与所述主体结构的邻近所述孔壁的所述顶部表面之间打印桥接构件;否则如果所述测得的间隙小于所述间隙阈值,则防止所述增材制造系统在所述嵌入式组件的所述周界壁与所述主体结构的邻近所述孔壁的所述顶部表面之间添加所述桥接构件;否则如果所述测得的间隙大于所述间隙阈值且大于所述桥接阈值,则致动警报。
如本文所使用的,捕获具有嵌入式组件的主体结构的图像是指捕获光学图像、声学印迹和接近轮廓(例如,使用原子力显微术或机器人接近感测)中的至少一个。换句话说,感测意指提供主体结构中的嵌入式组件的当前状态的快照。
一般来说,在一个实施例中,光学模块包括机器视觉模块。本文提供的系统和方法中使用的基本机器视觉系统可以包括一个或多个对准所关注区域的相机(通常具有固态电荷耦合装置(CCD)成像元件)、捕获和传输CCD图像的帧采集器/图像处理元件、用于运行机器视觉软件应用并操纵捕获的图像的计算机以及任选的显示器,以及关于所关注区域的适当照明。
术语“模块”的使用并不意味着作为模块的一部分描述或要求保护的组件或功能全都配置在(单个)公共封装内。实际上,模块的各种组件中的任何或所有组件(无论是控制逻辑还是其它组件)都可以组合在单个封装中或单独维护,并且可以进一步分布在多个分组或封装中或跨多个(远程)位置和装置分布。
另外,计算机程序可以包括用于执行本文描述的方法的步骤的程序代码装置以及计算机程序产品,所述计算机程序产品包括存储在介质(如硬盘、CD-ROM、DVD、USB记忆棒或可以通过如互联网或内联网等数据网络访问的存储介质等)上的程序代码装置,当计算机程序产品加载到计算机的主存储器中并且由计算机执行时,所述程序代码装置可以由计算机读取。
在本文描述的方法中使用的一个或多个存储器装置可以是各种类型的非易失性存储器装置或存储装置(换言之,在断电的情况下不会丢失其上的信息的存储装置)中的任何一种。术语“存储器装置”旨在涵盖安装介质(例如,CD-ROM或磁带装置)或非易失性存储器(如磁介质,例如,硬盘驱动器、光学存储装置或ROM、EPROM、FLASH等)。存储装置还可以包括其它类型的存储器或其组合。另外,存储介质可以定位在执行程序的第一计算机(例如,增材制造系统)中和/或可以定位在通过如互联网等网络连接到第一计算机的第二不同计算机中。在后一种情况下,第二计算机可以进一步向第一计算机提供程序指令以供执行。术语“存储器装置”还可以包含两个或更多个存储器装置,所述存储器装置可以驻留在不同的位置中,例如,在通过网络连接的不同计算机中。因此,例如,位图库可以驻留在远离耦合到所提供的增材制造系统的CAM模块的存储器装置上,并且可通过所提供的增材制造系统访问(例如,通过广域网)。
除非另外特别说明,否则根据以下讨论可以明显看出,应当理解,在整个说明书讨论中,使用如“处理”、“加载”、“通信”、“检测”、“计算”、“确定”、“分析”等术语是指人工或计算机或计算系统或类似的电子计算装置进行的动作和/或过程,所述动作和/或过程将如晶体管架构等表示为物理的数据操纵和/或变换为类似地表示为物理结构(换言之,孔内的相对位置坐标)的其它数据。
计算机辅助设计/计算机辅助制造(CAD/CAM)生成的与要制作的包括本文所述嵌入式组件的主体结构相关联的信息(所述信息在所述方法、程序和库中使用)可以基于转换的CAD/CAM数据包,其可以是例如IGES、DXF、DWG、DMIS、NC文件、文件、STL、EPRT文件、ODB、ODB++、an.asm、STL、IGES、STEP、Catia、SolidWorks、Autocad、ProE、3D Studio、Gerber、Rhino、Altium、Orcad、Eagle文件或包括上述中的一个或多个的包。另外,附加到图形对象的属性转移制作所需的元信息,并且可以精确地限定本文所描述的包含嵌入式芯片组件的印刷电路板的图像以及图像的结构和颜色(例如,树脂或金属),使制作数据从设计(例如3D可视化CAD)高效且有效地转移到制作(例如CAM)。因此且在实施例中,使用预处理算法将本文所描述的DWG、DXF、STL、EPRT ASM等等转换成2D文件。
通过参考附图可以获得对本文公开的组件、过程、组件和装置的更完全理解。这些图式(在本文中也被称作“图”)仅为基于便利性和易于证明本公开的示意性表示(例如,图示),并且因此,并不意欲指示装置或其组件的相对大小和尺寸和/或限定或限制示例性实施例的范围。尽管为清楚起见在以下描述中使用了特定的术语,但是这些术语仅旨在表示在附图中选择用于说明的实施例的特定结构,而不旨在限定或限制本公开的范围。在下文中的附图和以下说明中,应了解,相似的数字标记指代具有相似功能的组件。
现在转到图1,其展示了主体结构100和嵌入式组件200的示意性实例的透视图(1A)、俯视图(1B)和横截面视图(1C)。可以通过标准制造工艺或使用增材制造技术来制造主体结构100,同时在单独的设备中生产嵌入式组件200并且然后手动地或通过自动拾取和放置设备(例如,机器人臂模块)将所述嵌入式组件放置在孔150内。由于主体结构和嵌入式组件200的自然制造公差,孔壁101和邻近的顶部表面103与嵌入式组件200的周界203之间始终存在间隙“d1”。主体结构100的设计和制造使嵌入式组件要放置的位置处的孔150尽可能窄以使得能够拾取和放置,从而收纳并容纳第一和第二或更多组件200。因此,间隙“d1”可以是介于1μm与1000μm之间的任何值,例如介于10μm与500μm之间。图2还示出了主体结构100,其中多个不同的嵌入式组件或机械、声学、热学或光学组件定位于主体结构100的孔150内,其中一些在它们之间共享邻近的空间(例如200、200')。这里也一样,由于固有的主体结构和组件制造公差以及拾取和放置需求,所有结构之间也存在间隙。
在许多情况下,嵌入式装置或组件200可以具有用于功能连接的区域,如用于电子装置、传感器、换能器、热学或光学传输输入和输出信号的接触焊盘250、251(例如参见图3A)。可能期望在嵌入式装置(例如,组件200)中的接触焊盘250、251与主体结构100的邻近顶部表面103之间放置对应的连接材料,如迹线301、302(例如参见图3C),根据复合结构的最终组装,其将从所述顶部表面处进一步连接,如图3C、3D所示。当典型的增材制造用于沉积迹线301、302时,在孔壁101与嵌入式组件200的周界203之间或者在一个嵌入式组件200与另一嵌入式组件200'(如图2所展示)之间的间隙“d1”的尺寸(所产生的间隙d1)在成品的完整性和功能中起重要作用。形成迹线301、302的材料的粘度和沉积方法也可以起重要作用。因此,迹线301、302可能最终断开,这可能是由间隙(例如,参见图3D)引起的,或者是由间隙“d”之上的互连材料(迹线301、302)变窄引起的。虽然表面上提供一些功能,但是迹线301、302的这种变窄是电子装置领域的技术人员已知的,限制了组装结构的可靠性。
所公开的技术提供了桥接构件401(参见例如图4,左侧),所述桥接构件要沉积于在主体结构100与嵌入式组件之间(例如,IC 200)或不同的嵌入式组件(例如,IC 200、210、220等,例如参见图2)之间的间隙d1之上,以便克服这样的限制:如图3D所示,在需要互连迹线时存在此间隙。此外,当间隙d1增加时(间隙d2大于间隙d1),桥接构件402在孔壁101与组件203的周界之间过渡时下垂。使用增材制造可以进一步使得能够填充此凹陷(由下垂引起),因此如果需要的话可以产生几乎笔直的桥接构件403。在图4中,一个或多个桥接构件401(403)也可以用作机械加强结构,以确保嵌入式组件固定在适当的位置。可以基于主体结构100与嵌入式组件之间的最终产品的具体集成需求来选择桥接构件401的大小。如图5所示,它可以是单个边一直到四个边以及截面,其中其仅在期望连接的区段中应用。使用桥接构件400i允许通过增材制造将迹线301、302可靠地放置在主体结构的邻近孔壁103的顶部表面与嵌入式组件200的周界203之间,如图6所示。
图7示出了计算机处理器用来控制过程的逻辑的典型流程图。为了准确地放置桥接构件401,可以经由机器视觉来执行扫描709,例如使用光学、声学、静电或机械手段来确定主体结构100的孔150的尺寸以及孔150关于增材制造设备的位置。嵌入式组件200可以手动或通过拾取和放置自动化系统自动放置704。在一个实施例中,计算机用于管理数据采集并且管理组件的放置。然后,检查模块扫描结构以确定间隙“d1”的大小711。如果此间隙超过预定义的设计规则720,则过程被停止并且向系统操作者提供警报722以进行干预或将部件放置在拒绝的部件箱中。否则715,基于间隙大小、桥接构件401的性质以及装置设计,放置718桥接构件401,并且如果需要的话,进一步使顶表面201变得平坦。
因此,并且在如图1-7所展示的实施例中,本文提供了一种用于增加主体结构100中的集成电路200的连接性的方法,所述方法可在增材制造添加器中实施,所述方法包括:提供具有顶部表面103的主体结构100,所述主体结构包括具有孔壁101和孔底102的孔150,所述孔被配置成收纳并容纳要嵌入的第一组件200;将具有顶表面201、底表面202和周界203的第一组件200定位在孔150内,由此嵌入第一组件200;检查第一嵌入式组件200;确定孔壁101与第一嵌入式组件200的周界203之间的间隙dn:并且如果孔壁101与嵌入式组件200的周界203之间的间隙dn高于预定间隙阈值THG但小于桥接阈值THB时,使用3D打印机或其它增材制造装置,在嵌入式组件200的周界203与主体结构100的邻近孔壁101的顶部表面103之间添加桥接构件400i。
组件200的顶表面201可以进一步包括接触焊盘250、251,所述接触焊盘被配置成与至少主体结构100和第二组件200'、210等电连通或传送如光学或声学信号等信号。此外,组件200的周界203可以是具有三个或更多个小平面的多面体,每个小平面具有顶表面201。在图5中展示了四侧面多面体,但不应是限制性的。应当注意,例如第一或第二或其它嵌入式组件200的周界203与主体结构100的邻近孔壁101的顶部表面103之间添加桥接构件401的步骤之前可以是确定孔壁101与第一嵌入式组件200的周界203(在多面体的情况下)的每个小平面之间的间隙dn的步骤,然后在嵌入式组件200的周界壁203与主体结构100的邻近孔壁101的顶部表面103之间添加桥接构件401。如图6A、6B所展示,桥接构件401可以添加在接触焊盘251的一部分与主体结构100的邻近孔壁101的顶部表面103之间,其后可以在桥接构件401之上,在接触焊盘251的另一部分或绝缘和/或介电迹线302与主体结构100的顶部表面103和/或第二组件200'(参见例如图2)中的至少一个之间添加导电迹线302。本领域的任何技术人员可以得出结论:可以添加其它材料以提供用于热学、光和声学传导的路径。
在一个实施例中,用于制作具有改善的机械、光学、热学、声学和电气连接性的结构的增材制造打印机进一步包括:处理腔室:处理腔室;光学模块、机械模块和声学模块中的至少一个;其中光学模块、机械模块和所述声学模块中的所述至少一个包括与非易失性存储器通信的处理器,所述非易失性存储器包含处理器可读介质,所述处理器可读介质上具有可执行指令集,所述可执行指令集被配置成在被执行时使处理器:捕获具有第一嵌入式组件200的主体结构100的图像;测量孔壁101与第一嵌入式组件200的周界203之间的间隙d:将测得的间隙d与预定间隙阈值THG进行比较;将测得的间隙d与桥接阈值THB进行比较;如果测得的间隙d大于间隙阈值THG但小于桥接阈值THB(THB>d>THG),则指示操作者和/或增材制造系统(换句话说,自动地)在嵌入式组件200的周界壁203与主体结构100的邻近孔壁101的顶部表面103之间添加桥接构件401;否则如果测得的间隙d小于间隙阈值THG(d<THG),则防止打印机添加桥接构件401;否则如果测得的间隙d大于间隙阈值THG且大于桥接阈值THG(d>THB),则致动警报。
所述方法的实施例在图7中展示,如所展示的,在启动嵌入方案700时,扫描主体结构以确定是否是原本的701,并且如果是702,则将孔150的坐标和底部102的深度与尚未嵌入的组件的参数进行比较并确认703手动或自动将组件200放置704在孔150内的那个点处。如果主体结构不是原本的705,则系统将确认嵌入位点孔150与尚未嵌入的组件200之间的配合,然后放置704在孔150内,由此嵌入组件200。然后,系统将确定707组件200是否适当地放置在孔150内,并且如果是708,则将启动对嵌入式组件200的扫描709(例如利用机械和/或光学和/或声学),或者如果没有适当地放置710,则将再次进行放置704。在扫描之后,光学模块和/或机械模块和/或声学模块以及检查算法将定量711(换言之,测量)孔壁101与组件200的周界203之间以及周界203的任何小平面与主体结构100的邻近孔壁101的邻近顶部表面103之间的间隙d,然后,所述算法将分析713测得的间隙d是否大于THG,并且如果为否713,则防止714添加桥接构件401。另一方面,如果测得的间隙d大于715THG,则系统将分析716测得的间隙d是否大于桥接阈值THB,如果为否717,则系统询问718基于例如测得的间隙d2(图4,中心)和桥接材料,桥接是否会导致下垂,如果是,则增材制造系统(或系统外部的任何操作者)将校正719下垂(例如参见图6B,中间),添加720桥接构件401并终止714所述组件200的嵌入方案。另一方面,如果预期没有下垂721,则增材制造系统(或系统外部的任何操作者)将添加720桥接构件401,并终止714所述组件200的嵌入方案。否则,如果测得的间隙d大于722桥接阈值THB,则系统将根据完整结构的一种或多种设计规则审查723测得的间隙d,并且如果测得的间隙d不在设计规则的限制范围之内724,则向操作者提供警报725并停止添加。然而,如果间隙在设计规则之内727,则系统将再次确定701主体结构100是否对于尚未嵌入的组件200是原本的并且重复所述过程。
还设想的是,使用本文提供的方法,可以在尚未经历初始阶段(步骤700-707)的一个或多个已经嵌入的组件上启动725方案。
本文所使用的术语“包括”以及其衍生词旨在作为开放式术语,其指定所陈述的特征、要素、组件、组、整数和/或步骤的存在,但不排除其它未陈述的特征、要素、组件、组、整数和/或步骤的存在。前述内容还适用于具有类似含义的词语,如术语“包含”、“具有”以及其衍生词。
本文公开的所有范围都包含端点,并且端点可以彼此独立组合。“组合”包含共混物、混合物、合金、反应产物等。术语“一个/一种(a/an)”和“所述(the)”在本文中不表示对数量的限制,并且应被解释为涵盖单数和复数两者,除非本文另有说明或者与上下文明显矛盾。本文使用的前置词“(一个或多个)”旨在包含其修饰的术语的单数和复数两者,从而包含一个或多个所述术语(例如,(一个或多个)组件包含一个或多个组件)。整个说明书中对“一个实施例”、“另一个实施例”、“实施例”等(当存在时)的引用意味着结合所述实施例描述的特定要素(例如,特征、结构和/或特性)包含在本文描述的至少一个实施例中,并且可以存在于其它实施例中,也可以不存在于其它实施例中。另外,应当理解,所描述的要素可以在各个实施例中以任何合适的方式组合。此外,术语“第一”、“第二”等在本文中不表示任何顺序、量或重要性,而是用于将一个元件与另一个元件区分。
同样,术语“约”意味着量、大小、配方、参数和其它量和特性不是并且不必是精确的,而是根据需要可以是近似的和/或更大或更小,从而反映公差、转换因子、舍入、测量误差等以及本领域技术人员已知的其它因素。通常,量、大小、配方、参数或其它量或特性是“大约的”或“近似的”,无论是否明确如此陈述。
因此并且在一个实施例中,本文提供了一种用于增加主体结构中的嵌入式组件的连接性的方法,所述方法可在增材制造系统中实施,所述方法包括:提供具有顶部表面的所述主体结构,所述主体结构包括具有孔壁和孔底的孔,所述孔被配置成收纳并容纳要嵌入的第一组件;将具有顶表面、底表面和周界的所述嵌入式组件定位在所述孔内,由此嵌入所述第一组件;检查所述第一嵌入式组件;确定所述孔壁与所述第一嵌入式组件的所述周界之间的间隙;以及如果所述孔壁与所述嵌入式组件的所述周界之间的所述间隙大于预定间隙阈值但小于桥接阈值,则使用所述增材制造系统,在所述嵌入式组件的周界壁与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件,其中(i)所述第一嵌入式组件的所述顶表面进一步包括接触焊盘,所述接触焊盘被配置成至少与所述主体结构和第二嵌入式组件进行信号通信,(ii)所述嵌入式组件的所述周界是具有三个或更多个小平面的多面体,其中(iii)所述在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件的步骤之前是确定所述孔壁与所述第一嵌入式组件的所述周界的每个小平面之间的间隙的步骤,所述方法(iv)在所述第一嵌入式组件的所述小平面中的每个小平面的可选顶部表面上添加所述桥接构件并且(v)进一步包括在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件,(vi)所述桥接构件添加在所述接触焊盘的一部分与所述主体结构的邻近所述孔壁的所述顶部表面之间,所述方法进一步包括(vii)在所述桥接构件之上,在所述接触焊盘的另一部分与所述主体结构和所述第二嵌入式组件中的至少一个之间添加信号导电迹线,其中(viii)所述主体结构是印刷电路板、柔性印刷电路和高密度互连印刷电路中的至少一个,(ix)所述第一嵌入式组件和所述第二嵌入式组件至少是四方扁平封装(QFP)封装、薄型小外形封装(TSOP)、小外形集成电路(SOIC)封装、小外形J引线(SOJ)封装、塑料引线芯片载体(PLCC)封装、晶圆级芯片规模封装(WLCSP)、模具阵列工艺-球栅阵列(MAPBGA)封装、四方扁平无引线(QFN)封装、平面栅格阵列(LGA)封装、无源组件或包括上述组件的组合,其中(x)所述定位步骤是自动化的,其中(xi)所述增材制造系统进一步包括:处理腔室;以及光学模块、机械模块和声学模块中的至少一个;相机,其中光学模块、机械模块和所述声学模块中的所述至少一个包括与非易失性存储器通信的处理器,所述非易失性存储器包含处理器可读介质,所述处理器可读介质上具有可执行指令集,所述可执行指令集被配置成在被执行时使所述处理器:捕获具有所述第一嵌入式组件的所述主体结构的图像;测量所述孔壁与所述第一嵌入式组件的所述周界之间的间隙;将测得的间隙与所述预定间隙阈值进行比较;将所述测得的间隙与所述桥接阈值进行比较;将所述测得的间隙与预定下垂阈值进行比较;如果所述测得的间隙大于所述间隙阈值但小于所述下垂阈值,则指示操作者和所述增材制造系统中的至少一个在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件;否则如果所述测得的间隙大于所述间隙阈值且大于所述下垂阈值但小于所述桥接阈值,则指示所述操作者和所述增材制造系统中的至少一个在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件并校正下垂;否则如果所述测得的间隙小于所述间隙阈值,则防止所述增材制造系统在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加所述桥接构件;否则如果所述测得的间隙大于所述间隙阈值且大于所述桥接阈值,则致动警报,(xii)所述桥接阈值间隙被配置成防止所述桥接构件下垂,其中(xiii)所述桥接构件在所述嵌入式组件的周界与所述主体结构的邻近所述孔壁的所述顶部表面之间形成连续层,所述方法进一步包括(xiv)在所述桥接构件之上,在所述第一嵌入式组件周界与所述主体结构和第二嵌入式组件中的至少一个之间添加绝缘层、介电层、声学信号传送器、热换能器和电导体中的至少一个,其中(xv)所述增材制造系统进一步包括光学、声学或机械装置,所述光学、声学或机械装置被配置成检测所述第一嵌入式组件的所述周界与所述孔壁之间的间隙,其中(xvi)所述添加所述桥接构件的步骤是手动而不是使用所述增材制造系统执行的,并且其中(xvii)校正所述下垂包括添加被配置成使所述桥接构件平整的材料。
在另一个实施例中,本文提供了一种处理器可读介质,其上具有可执行指令集,所述可执行指令集被配置成在被执行时使处理器:捕获主体结构的图像,所述主体结构包括具有孔壁和孔底的孔,所述孔被配置成收纳并容纳要嵌入的第一组件,其中所述第一组件具有顶表面、底表面和周界;使用光学模块和声学模块以及机械模块中的至少一个,测量所述孔壁与所述第一嵌入式组件的所述周界之间的间隙;将测得的间隙与预定间隙阈值进行比较;将所述测得的间隙与桥接阈值进行比较;如果所述测得的间隙大于所述间隙阈值且小于所述桥接阈值,则指示操作者和所述增材制造系统中的至少一个在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间打印桥接构件;否则如果所述测得的间隙小于所述间隙阈值,则防止所述增材制造系统在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件;否则如果所述测得的间隙大于所述间隙阈值且大于所述桥接阈值,则致动警报。
尽管已经根据一些实施例描述了用于使用增材制造来改善嵌入式组件与主体结构的连接性的前述公开,但是根据本文的公开内容,其它实施例对于本领域普通技术人员来说将是显而易见的。此外,仅通过举例呈现了所描述的实施例,并且所述实施例并不旨在限制本发明的范围。事实上,本文所描述的新颖的方法、程序、库以及系统可以在不脱离其精神的情况下以各种其它形式具体化。因此,考虑到本文的公开内容,其它组合、省略、替换以及修改对技术人员来说将是显而易见的。
Claims (19)
1.一种用于增加主体结构中的嵌入式组件的连接性的方法,所述方法可在增材制造系统中实施,所述方法包括:
a.提供具有顶部表面的所述主体结构,所述主体结构包括具有孔壁和孔底的孔,所述孔被配置成收纳并容纳要嵌入的第一组件;
b.将具有顶表面、底表面和周界的所述嵌入式组件定位在所述孔内,由此嵌入所述第一组件;
c.检查所述第一嵌入式组件;
d.确定所述孔壁与所述第一嵌入式组件的所述周界之间的间隙;以及
e.如果所述孔壁与所述嵌入式组件的所述周界之间的所述间隙大于预定间隙阈值但小于桥接阈值,则使用所述增材制造系统,在所述嵌入式组件的周界壁与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件。
2.根据权利要求1所述的方法,其中所述第一嵌入式组件的所述顶表面进一步包括接触焊盘,所述接触焊盘被配置成至少与所述主体结构和第二嵌入式组件进行信号通信。
3.根据权利要求2所述的方法,其中所述嵌入式组件的所述周界是具有三个或更多个小平面的多面体。
4.根据权利要求3所述的方法,其中所述在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件的步骤之前是确定所述孔壁与所述第一嵌入式组件的所述周界的每个小平面之间的间隙的步骤。
5.根据权利要求3所述的方法,其进一步包括在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件。
6.根据权利要求5所述的方法,其中所述桥接构件添加在所述接触焊盘的一部分与所述主体结构的邻近所述孔壁的所述顶部表面之间。
7.根据权利要求6所述的方法,其进一步包括在所述桥接构件之上,在所述接触焊盘的另一部分与所述主体结构和所述第二嵌入式组件中的至少一个之间添加信号导电迹线。
8.根据权利要求1所述的方法,其中所述主体结构是印刷电路板、柔性印刷电路和高密度互连印刷电路中的至少一个。
9.根据权利要求1所述的方法,其中所述第一嵌入式组件和所述第二嵌入式组件至少是四方扁平封装(QFP)封装、薄型小外形封装(TSOP)、小外形集成电路(SOIC)封装、小外形J引线(SOJ)封装、塑料引线芯片载体(PLCC)封装、晶圆级芯片规模封装(WLCSP)、模具阵列工艺-球栅阵列(MAPBGA)封装、四方扁平无引线(QFN)封装、平面栅格阵列(LGA)封装、无源组件或包括上述组件的组合。
10.根据权利要求1所述的方法,其中所述定位步骤是自动化的。
11.根据权利要求1所述的方法,其中所述增材制造系统进一步包括:
a.处理腔室;以及
b.光学模块、机械模块和声学模块中的至少一个;
c.相机,其中光学模块、机械模块和所述声学模块中的所述至少一个包括与非易失性存储器通信的处理器,所述非易失性存储器包含处理器可读介质,所述处理器可读介质上具有可执行指令集,所述可执行指令集被配置成在被执行时使所述处理器:
i.捕获具有所述第一嵌入式组件的所述主体结构的图像;
ii.测量所述孔壁与所述第一嵌入式组件的所述周界之间的间隙;
iii.将测得的间隙与所述预定间隙阈值进行比较;
iv.将所述测得的间隙与所述桥接阈值进行比较;
v.将所述测得的间隙与预定下垂阈值进行比较;
vi.如果所述测得的间隙大于所述间隙阈值但小于所述下垂阈值,则指示操作者和所述增材制造系统中的至少一个在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件;否则
vii.如果所述测得的间隙大于所述间隙阈值且大于所述下垂阈值但小于所述桥接阈值,则指示所述操作者和所述增材制造系统中的至少一个在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件并校正下垂;否则
viii.如果所述测得的间隙小于所述间隙阈值,则防止所述增材制造系统在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加所述桥接构件;否则
ix.如果所述测得的间隙大于所述间隙阈值且大于所述桥接阈值,则致动警报。
12.根据权利要求11所述的方法,其中所述桥接阈值间隙被配置成防止所述桥接构件下垂。
13.根据权利要求1所述的方法,其中所述桥接构件在所述嵌入式组件的周界与所述主体结构的邻近所述孔壁的所述顶部表面之间形成连续层。
14.根据权利要求3所述的方法,其包括将所述桥接构件添加在所述第一嵌入式组件的所述小平面中的每个小平面的可选顶部表面上。
15.根据权利要求1所述的方法,其进一步包括在所述桥接构件之上,在所述第一嵌入式组件周界与所述主体结构和第二嵌入式组件中的至少一个之间添加绝缘层、介电层、声学信号传送器、热换能器和电导体中的至少一个。
16.根据权利要求1所述的方法,其中所述增材制造系统进一步包括光学、声学或机械装置,所述光学、声学或机械装置被配置成检测所述第一嵌入式组件的所述周界与所述孔壁之间的间隙。
17.根据权利要求5所述的方法,其中所述添加所述桥接构件的步骤是手动而不是使用所述增材制造系统执行的。
18.根据权利要求11所述的方法,其中校正所述下垂包括添加被配置成使所述桥接构件平整的材料。
19.一种处理器可读介质,其上具有可执行指令集,所述可执行指令集被配置成在被执行时使处理器:
i.捕获主体结构的图像,所述主体结构包括具有孔壁和孔底的孔,所述孔被配置成收纳并容纳要嵌入的第一组件,其中所述第一组件具有顶表面、底表面和周界;
ii.使用光学模块和声学模块以及机械模块中的至少一个,测量所述孔壁与所述第一嵌入式组件的所述周界之间的间隙;
iii.将测得的间隙与预定间隙阈值进行比较;
iv.将所述测得的间隙与桥接阈值进行比较;
v.如果所述测得的间隙大于所述间隙阈值且小于所述桥接阈值,则指示操作者和所述增材制造系统中的至少一个在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间打印桥接构件;否则
vi.如果所述测得的间隙小于所述间隙阈值,则防止所述增材制造系统在所述嵌入式组件的所述周界与所述主体结构的邻近所述孔壁的所述顶部表面之间添加桥接构件;否则
vii.如果所述测得的间隙大于所述间隙阈值且大于所述桥接阈值,则致动警报。
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WO2018031186A1 (en) * | 2016-08-08 | 2018-02-15 | Nano-Dimension Technologies, Ltd. | Printed circuit board fabrication methods programs and libraries |
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JP2005050911A (ja) | 2003-07-30 | 2005-02-24 | Seiko Epson Corp | 半導体装置 |
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JP2007214402A (ja) | 2006-02-10 | 2007-08-23 | Cmk Corp | 半導体素子及び半導体素子内蔵型プリント配線板 |
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JP6037545B2 (ja) | 2012-06-19 | 2016-12-07 | 富士機械製造株式会社 | Ledパッケージ及びその製造方法 |
JP2014146714A (ja) | 2013-01-29 | 2014-08-14 | Kitakyushu Foundation For The Advancement Of Industry Science And Technology | Ledの実装方法及びled照明器 |
US9855698B2 (en) * | 2013-08-07 | 2018-01-02 | Massachusetts Institute Of Technology | Automatic process control of additive manufacturing device |
JP2015053468A (ja) | 2013-08-07 | 2015-03-19 | 日東電工株式会社 | 半導体パッケージの製造方法 |
US10226895B2 (en) * | 2013-12-03 | 2019-03-12 | Autodesk, Inc. | Generating support material for three-dimensional printing |
KR101634067B1 (ko) | 2014-10-01 | 2016-06-30 | 주식회사 네패스 | 반도체 패키지 및 그 제조방법 |
JP6784701B2 (ja) | 2015-05-19 | 2020-11-11 | タクトテク オーユー | エレクトロニクス用の熱成形プラスチックカバーおよび関連した製法 |
WO2018017082A1 (en) * | 2016-07-20 | 2018-01-25 | Hewlett-Packard Development Company, L.P. | Printing three-dimensional (3d) objects |
US9799617B1 (en) | 2016-07-27 | 2017-10-24 | Nxp Usa, Inc. | Methods for repackaging copper wire-bonded microelectronic die |
JP2018067627A (ja) | 2016-10-19 | 2018-04-26 | イビデン株式会社 | 電子部品内蔵基板の製造方法 |
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GB2521619A (en) * | 2013-12-23 | 2015-07-01 | Nokia Technologies Oy | An apparatus and associated methods for flexible carrier substrates |
US20150201500A1 (en) * | 2014-01-12 | 2015-07-16 | Zohar SHINAR | System, device, and method of three-dimensional printing |
WO2018031186A1 (en) * | 2016-08-08 | 2018-02-15 | Nano-Dimension Technologies, Ltd. | Printed circuit board fabrication methods programs and libraries |
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CA3106527A1 (en) | 2020-01-23 |
US20210249316A1 (en) | 2021-08-12 |
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WO2020018672A1 (en) | 2020-01-23 |
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EP3823826A1 (en) | 2021-05-26 |
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