CN112736087B - 一种阵列基板的制作方法、阵列基板及显示面板 - Google Patents

一种阵列基板的制作方法、阵列基板及显示面板 Download PDF

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CN112736087B
CN112736087B CN201910960432.XA CN201910960432A CN112736087B CN 112736087 B CN112736087 B CN 112736087B CN 201910960432 A CN201910960432 A CN 201910960432A CN 112736087 B CN112736087 B CN 112736087B
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CN112736087A (zh
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高宇鹏
袁广才
关峰
王治
杜建华
强朝辉
李超
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BOE Technology Group Co Ltd
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Abstract

本发明公开了一种阵列基板的制作方法、阵列基板及显示面板，该阵列基板的制作方法通过对在制作氧化物薄膜晶体管的半导体层形成的铟的氧化物薄膜进行还原，获得微晶硅薄膜晶体管的半导体层的诱导金属铟，通过金属铟诱导多晶硅的方式形成微晶硅半导体层，并且在形成微晶硅半导体层之后，两类晶体管相同的功能的膜层可以通过同一道掩膜版进行制作，极大的降低了掩膜版使用数量。

Description

一种阵列基板的制作方法、阵列基板及显示面板
技术领域
本发明涉及显示技术领域，尤其涉及一种阵列基板的制作方法、阵列基板及显示面板。
背景技术
阵列基板包括显示区域和围绕显示区域的边框区域，显示区域设置有像素驱动电路，边框区域设置有栅极驱动电路。在像素电路中，需要的驱动电流较小，因而对像素电路内的各晶体管的迁移率要求不高，而由于栅极驱动电路的功能所限，对其内部的各晶体管的迁移率要求较高。
基于上述，为实现不同电路对晶体管的不同要求，需要在阵列基板上设置不同类型的晶体管，可以在边框区域设置硅基晶体管，在显示区域设置氧化物薄膜晶体管。相关技术中，在制作存在上述两类晶体管的阵列基板时，采用先在对应位置制作一类晶体管，再在对应位置制作另一类晶体管，因此导致每一道工艺均需采用一道新的掩膜版，增加了制作成本。
因此，如何在满足不同区域对晶体管类型需求的同时降低生产成本是本领域技术人员亟待解决的技术问题。
发明内容
有鉴于此，本发明实施例提供了一种阵列基板的制作方法、阵列基板及显示面板，用以降掩膜版的使用数量，节约生产成本。
第一方面，本发明实施例提供了一种阵列基板的制作方法，所述阵列基板包括：衬底基板，以及位于所述衬底基板的第一区域内的氧化物薄膜晶体管，位于所述衬底基板的第二区域内的微晶硅薄膜晶体管，且所述第一区域与所述第二区域互不重叠；所述方法包括：
在所述衬底基板上形成具有凹槽的缓冲层，其中，所述凹槽位于所述衬底基板的第二区域内；
在所述凹槽内和所述第一区域内分别形成铟的氧化物薄膜；
对所述凹槽内的所述铟的氧化物薄膜进行还原处理，得到铟颗粒；
在所述凹槽内形成非晶硅薄膜，并在预设温度采用所述铟颗粒诱导所述非晶硅生长成微晶硅；
去除所述微晶硅内的所述铟颗粒，形成所述微晶硅薄膜晶体管的微硅半导体层。
在一种可能的实施方式中，在本发明实施例提供的阵列基板的制作方法中，所述在所述凹槽内和所述第一区域内分别形成铟的氧化物薄膜，具体包括：
在所述缓冲层背离所述衬底基板一侧形成所述铟的氧化物薄膜；
在所述铟的氧化物薄膜上形成光刻胶层；
采用半色调掩膜版对所述光刻胶层进行构图，并刻蚀所述铟的氧化物薄膜，形成在所述凹槽内的所述铟的氧化物薄膜，以及位于所述第一区域内所述铟的氧化物薄膜；
对图案化的光刻胶层进行灰化处理，仅在位于所述第一区域内所述铟的氧化物薄膜上保留光刻胶。
在一种可能的实施方式中，在本发明实施例提供的阵列基板的制作方法中，所述对所述凹槽内的所述铟的氧化物薄膜进行还原处理；具体包括：
以所述光刻胶对所述第一区域内的所述铟的氧化物进行遮挡，通过氢等离子对所述凹槽内的所述铟的氧化物薄膜进行还原处理。
在一种可能的实施方式中，在本发明实施例提供的阵列基板的制作方法中，在所述通过氢等离子对所述凹槽内的所述铟的氧化物薄膜进行还原处理之后，所述方法包括：
去除覆盖所述第一区域内的所述铟的氧化物薄膜的所述光刻胶。
在一种可能的实施方式中，在本发明实施例提供的阵列基板的制作方法中，去除所述微晶硅内的所述铟颗粒，具体包括：
通过酸洗方法去除所述微晶硅的所述铟颗粒，其中，所述酸洗方法中所用的酸仅与所述铟颗粒发生反应，不与所述微晶硅发生反应。
在一种可能的实施方式中，在本发明实施例提供的阵列基板的制作方法中，在形成所述微硅半导体层之后，所述方法还包括：
在所述凹槽位置处和所述第一区域内依次形成源漏电极层、栅极绝缘层和栅极层。
在一种可能的实施方式中，在本发明实施例提供的阵列基板的制作方法中，所述铟的氧化物薄膜包括：氧化铟锡和/或氧化铟镓锡。
在一种可能的实施方式中，在本发明实施例提供的阵列基板的制作方法中，所述预设温度为0℃～500℃。
第二方面，本发明实施例还提供了一种阵列基板，包括：衬底基板，位于所述衬底基板的第一区域内的氧化物薄膜晶体管，位于所述衬底基板的第二区域的微晶硅薄膜晶体管；
所述氧化物薄膜晶体管和所述微晶硅薄膜晶体管通过上述任一实施例提供的阵列基板的制作方法形成。
在一种可能的实施方式中，在本发明实施例提供的阵列基板中，所述第一区域位于所述衬底基板的显示区域，所述第二区域位于所述衬底基板的第二区域。
第三方面，本发明实施例还提供了一种显示面板，包括上述实施例所述的阵列基板。
本发明的有益效果：
本发明实施例提供了一种阵列基板的制作方法、阵列基板及显示面板，该阵列基板的制作方法通过对在制作氧化物薄膜晶体管的半导体层形成的铟的氧化物薄膜进行还原，获得微晶硅薄膜晶体管的半导体层的诱导金属铟，通过金属铟诱导多晶硅的方式形成微晶硅半导体层，并且在形成微晶硅半导体层之后，两类晶体管相同的功能的膜层可以通过同一道掩膜版进行制作，极大的降低了掩膜版使用数量。
附图说明
图1为本发明实施例提供的阵列基板的制作方法的流程图；
图2a-图2i为本发明实施例提供的阵列基板制作过程对应的结构示意图；
图3为本发明实施例提供的阵列基板的结构示意图。
具体实施方式
相关技术中，同时包括硅基薄膜晶体管和氧化物薄膜晶体管的阵列基板，在制作过程中，采用先制作一种类型的晶体管，再制作另一种类型的晶体管的方式完成阵列基板的制作的，该种制作方式每形成一个功能层均需要设置一道掩膜版，该种制作工艺极大的增加了阵列基板的制作成本。
针对相关技术存在的上述问题，本发明实施例提供了一种阵列基板的制作方法、阵列基板及显示面板。为了使本发明的目的，技术方案和优点更加清楚，下面结合附图，对本发明实施例提供的阵列基板的制作方法、阵列基板及显示面板的具体实施方式进行详细地说明。应当理解，下面所描述的优选实施例仅用于说明和解释本发明，并不用于限定本发明。并且在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互组合。
附图中各部件的形状和大小不反应真实比例，目的只是示意说明本发明内容。
具体地，本发明实施例提供了一种阵列基板的制作方法，其中，该阵列基板包括：衬底基板，以及位于衬底基板的第一区域内的氧化物薄膜晶体管，位于衬底基板的第二区域内的微晶硅薄膜晶体管，且第一区域与第二区域互不重叠；如图1所示，该方法包括以下步骤S101至S105，具体如下：
S101、在衬底基板上形成具有凹槽的缓冲层，其中，该凹槽位于衬底基板的第二区域内；
S102、在凹槽内和第一区域内分别形成铟的氧化物薄膜；
S103、对凹槽内的铟的氧化物薄膜进行还原处理，得到铟颗粒；
具体地还原处理过程及相关参数如下：
In2O3+H2→In+H2O；
还原条件为：功率1-100W；气体流量1-1000sccm；腔室压强10-1000mTorr，腔室温度10-500℃，还原时间0-10min；
S104、在凹槽内形成非晶硅薄膜，并在预设温度采用铟颗粒诱导非晶硅生长成微晶硅；
其中，非晶体管的沉积参数可以为：衬底0-200℃；腔室压力0-20Pa；气体流量10-1000sccm；沉积厚度10-500nm。
S105、去除微晶硅内的铟颗粒，形成微晶硅薄膜晶体管的微硅半导体层。
具体地，在本发明实施例提供的阵列基板的制作方法中，通过对在制作氧化物薄膜晶体管的半导体层形成的铟的氧化物薄膜进行还原，获得微晶硅薄膜晶体管的半导体层的诱导金属铟，通过金属铟诱导多晶硅的方式形成微晶硅半导体层，并且在形成微晶硅半导体层之后，两类晶体管相同的功能的膜层可以通过同一道掩膜版进行制作，极大的降低了掩膜版使用数量。同时由于两类薄膜晶体管中的各膜层可以通过相同掩膜版进行制作，降低了工艺对两类晶体管之间的间距要求，可以提高分辨率。
可选地，在本发明实施例提供的阵列基板的制作方法中，在凹槽内和第一区域内分别形成铟的氧化物薄膜，具体包括：
在缓冲层背离衬底基板一侧形成铟的氧化物薄膜；
在铟的氧化物薄膜上形成光刻胶层；
采用半色调掩膜版对光刻胶层进行构图，并刻蚀铟的氧化物薄膜，形成在凹槽内的铟的氧化物薄膜，以及位于第一区域内铟的氧化物薄膜；
对图案化的光刻胶层进行灰化处理，仅在位于第一区域内铟的氧化物薄膜上保留光刻胶。
具体地，在本发明实施例提供的阵列基板的制作方法中，通过半色调掩膜版对光刻胶进行构图，可以保留位于第一区域内的光刻胶，该光刻胶覆盖第一区域内的氧化物薄膜，该氧化物薄膜即为氧化物薄膜晶体管的半导体层。之所以对第一区域内的氧化物薄膜进行遮挡，是由于后续需要对凹槽内的氧化物薄膜进行还原以获得微硅半导体层的诱导金属铟，该种设置，可以在对凹槽内的氧化物薄膜进行还原时不必设置掩膜版，从而进一步减少掩膜版的使用数量。
可选地，在本发明实施例提供的阵列基板的制作方法中，对凹槽内的铟的氧化物薄膜进行还原处理；具体包括：
以光刻胶对第一区域内的铟的氧化物进行遮挡，通过氢等离子对凹槽内的铟的氧化物薄膜进行还原处理。
需要说明的是，上述实施例是采用氢等离子处理的方式对氧化物薄膜进行还原，当然也可以通过其他的方式对该氧化物薄膜进行还原，在此不做具体限定。
可选地，在本发明实施例提供的阵列基板的制作方法中，在通过氢等离子对凹槽内的铟的氧化物薄膜进行还原处理之后，方法包括：
去除覆盖第一区域内的铟的氧化物薄膜的光刻胶。
具体地，在本发明实施例提供的阵列基板的制作方法中，在对凹槽内的氧化物薄膜进行还原的过程中，通过光刻胶对第一区域内的氧化物薄膜进行覆盖已经避免了第一区域内的氧化物薄膜被还原，影响氧化物薄膜晶体管的性能。但是，在对凹槽内的氧化物薄膜进行还原，得到铟颗粒之后，后续步骤均需借助掩膜版进行构图，因此，可以在还原步骤之后去除第一区域内的光刻胶，当然也可以在形成微硅半导体层之后再去除第一区域内的光刻胶，可以根据实际需要选择在何时进行去除，在此不做具体限定。
可选地，在本发明实施例提供的阵列基板的制作方法中，去除微晶硅内的铟颗粒，具体包括：
通过酸洗方法去除微晶硅的铟颗粒，其中，酸洗方法中所用的酸仅与铟颗粒发生反应，不与微晶硅发生反应。
具体地，在本发明实施例提供的阵列基板的制作方法中，在金属铟可以诱导非晶硅生长成微硅的过程中，该金属铟可以向微硅的表面移动，因此，可以通过酸洗的方式去除该铟颗粒，其中，当氧化物薄膜包括其他金属时，在进行还原时也是被还原的，但是铟颗粒起到主要诱导作用，在该步骤酸洗的过程中，不仅能够去除金属铟颗粒，可以去除其他金属颗粒。
需要说明的是，在该步骤中所使用的酸为与金属颗粒反应，而不与硅反应的酸，例如可以为稀盐酸或稀硫酸等，而不可以为氢氟酸等对硅具有腐蚀性的酸。
可选地，在本发明实施例提供的阵列基板的制作方法中，在形成微硅半导体层之后，方法还包括：
在凹槽位置处和第一区域内依次形成源漏电极层、栅极绝缘层和栅极层。
具体地，在本发明实施例提供的阵列基板的制作方法中，在氧化物薄膜晶体管和微晶硅薄膜晶体管的半导体层均形成之后，在后续的各功能层的制作过程中，相同的功能层均可以采用同一道掩膜版进行制作，如，氧化物薄膜晶体管和微晶硅薄膜晶体管的源漏电极层均可以通过一道掩膜版进行制作，氧化物薄膜晶体管和微晶硅薄膜晶体管的栅极绝缘层可以通过同一掩膜版进行制作，氧化物薄膜晶体管和微晶硅薄膜晶体管的栅极层也可以通过一道掩膜版进行制作，与相关技术中两种类型的薄膜晶体管的各功能层需要分别制作相比，极大的减少了掩膜版的使用量。
可选地，在本发明实施例提供的阵列基板的制作方法中，铟的氧化物薄膜包括：氧化铟锡和/或氧化铟镓锡。
可选地，在本发明实施例提供的阵列基板的制作方法中，预设温度为0℃～500℃。
下面结合附图2a-2i对阵列基板的制作方法进行具体说明：
如图2a所示，提供一衬底基板1，并在衬底基板1上形成缓冲层2，通过第一掩膜版在衬底基板1的第二区域上对该缓冲层2进行刻蚀，形成具有凹槽的缓冲层2；
如图2b所示，在缓冲层2背离衬底基板1的一侧形成铟的氧化物薄膜3，通过第二掩膜版(半色调掩膜版)对该氧化物薄膜3进行构图，使凹槽内保留氧化物薄膜3，同时使第一区域保留覆盖有光刻胶4的氧化物薄膜3；
如图2c所示，通过氢等离子对凹槽内的氧化物薄膜3进行还原，还原出金属铟颗粒31；
如图2d所示，沉积非晶硅薄膜5，并通过第三掩膜版对该非晶硅薄膜5进行构图，保留凹槽所在区域内的非晶硅薄膜5，在凹槽内形成非晶硅和金属铟的混合物；
如图2e所示，在350℃下，采用金属铟颗粒31诱导非晶硅形成微硅半导体层6，同时使金属铟颗粒31位于微硅半导体层6的表面；
如图2f所示，通过第四掩膜版采用酸洗的方式去除凹槽所在区域内的金属铟颗粒31，形成微硅半导体层，并去除氧化物薄膜晶体管所在区域内的光刻胶；
如图2g所示，在形成微硅半导体层6和氧化物薄膜3之上分别对应形成源漏电极层7，并通过第五掩膜版进行构图，其中，图2g中示出两种类型的源漏电极存在连接关系，为示意性结构图，意在表达，微晶硅薄膜晶体管可以与氧化物薄膜晶体管存在连接关系；
如图2h所示，在源漏电极层7背离衬底基板1的一侧，形成栅极绝缘层8；
如图2i所示，通过第六掩膜版在栅极绝缘层8上，形成氧化物薄膜晶体管和微晶硅薄膜晶体管对应栅极层9。
基于同一发明构思，如图3所示，本发明实施例还提供了一种阵列基板，包括：衬底基板1，位于衬底基板1的第一区域内的氧化物薄膜晶体管，位于衬底基板1的第二区域的微晶硅薄膜晶体管；
该氧化物薄膜晶体管和微晶硅薄膜晶体管通过上述实施例提供的阵列基板的制作方法形成。
具体地，在本发明实施例提供的阵列基板中，该第一区域可以位于衬底基板的显示区域内，该第二区域可以位于衬底基板的第二区域内。
除上述实施例提供的各膜层之外，如图3所示，该阵列基板还可以包括位于栅极层9背离衬底基板1一侧的平坦化层10等。
需要说明是，该阵列基板采用上述阵列基板的制作方法进行制作，因此具有该阵列基板的制作方法的全部优点，可以参见阵列基板的制作方法的实施例进行实施，在此不再赘述。
基于同一发明构思，本发明实施例还提供了一种显示面板，包括上述实施例提供的阵列基板，以及覆盖该阵列基板的封装盖板。
该显示面板具有该阵列基板的全部优点，可以参见阵列基板的实施例进行实施，在此不再赘述。
本发明实施例提供了一种阵列基板的制作方法、阵列基板及显示面板，该阵列基板的制作方法通过对在制作氧化物薄膜晶体管的半导体层形成的铟的氧化物薄膜进行还原，获得微晶硅薄膜晶体管的半导体层的诱导金属铟，通过金属铟诱导多晶硅的方式形成微晶硅半导体层，并且在形成微晶硅半导体层之后，两类晶体管相同的功能的膜层可以通过同一道掩膜版进行制作，极大的降低了掩膜版使用数量。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (11)

1.一种阵列基板的制作方法，所述阵列基板包括：衬底基板，以及位于所述衬底基板的第一区域内的氧化物薄膜晶体管，位于所述衬底基板的第二区域内的微晶硅薄膜晶体管，且所述第一区域与所述第二区域互不重叠；其特征在于，所述方法包括：
在所述衬底基板上形成具有凹槽的缓冲层，其中，所述凹槽位于所述衬底基板的所述第二区域内；
在所述凹槽内和所述第一区域内分别形成铟的氧化物薄膜；
对所述凹槽内的所述铟的氧化物薄膜进行还原处理，得到铟颗粒；
在所述凹槽内形成非晶硅薄膜，并在预设温度采用所述铟颗粒诱导所述非晶硅生长成微晶硅；
去除所述微晶硅内的所述铟颗粒，形成所述微晶硅薄膜晶体管的微硅半导体层。
2.如权利要求1所述的阵列基板的制作方法，其特征在于，所述在所述凹槽内和所述第一区域内分别形成铟的氧化物薄膜，具体包括：
在所述缓冲层背离所述衬底基板一侧形成所述铟的氧化物薄膜；
在所述铟的氧化物薄膜上形成光刻胶层；
采用半色调掩膜版对所述光刻胶层进行构图，并刻蚀所述铟的氧化物薄膜，形成在所述凹槽内的所述铟的氧化物薄膜，以及位于所述第一区域内所述铟的氧化物薄膜；
对图案化的光刻胶层进行灰化处理，仅在位于所述第一区域内所述铟的氧化物薄膜上保留光刻胶。
3.如权利要求2所述的阵列基板的制作方法，其特征在于，所述对所述凹槽内的所述铟的氧化物薄膜进行还原处理；具体包括：
以所述光刻胶对所述第一区域内的所述铟的氧化物进行遮挡，通过氢等离子对所述凹槽内的所述铟的氧化物薄膜进行还原处理。
4.如权利要求3所述的阵列基板的制作方法，其特征在于，在所述通过氢等离子对所述凹槽内的所述铟的氧化物薄膜进行还原处理之后，所述方法包括：
去除覆盖所述第一区域内的所述铟的氧化物薄膜的所述光刻胶。
5.如权利要求1所述的阵列基板的制作方法，其特征在于，去除所述微晶硅内的所述铟颗粒，具体包括：
通过酸洗方法去除所述微晶硅的所述铟颗粒，其中，所述酸洗方法中所用的酸仅与所述铟颗粒发生反应，不与所述微晶硅发生反应。
6.如权利要求1-5任一项所述的阵列基板的制作方法，其特征在于，在形成所述微硅半导体层之后，所述方法还包括：
在所述凹槽位置处和所述第一区域内依次形成源漏电极层、栅极绝缘层和栅极层。
7.如权利要求1-5任一项所述的阵列基板的制作方法，其特征在于，所述铟的氧化物薄膜包括：氧化铟锡和/或氧化铟镓锡。
8.如权利要求1-5任一项所述的阵列基板的制作方法，其特征在于，所述预设温度为0℃～500℃。
9.一种阵列基板，其特征在于，包括：衬底基板，位于所述衬底基板的第一区域内的氧化物薄膜晶体管，位于所述衬底基板的第二区域的微晶硅薄膜晶体管；
所述氧化物薄膜晶体管和所述微晶硅薄膜晶体管通过如权利要求1-8任一项所述的阵列基板的制作方法形成。
10.如权利要求9所述的阵列基板，其特征在于，所述第一区域位于所述衬底基板的显示区域，所述第二区域位于所述衬底基板的第二区域。
11.一种显示面板，其特征在于，包括如权利要求9或10所述的阵列基板。
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