CN111984052A - Voltage source - Google Patents

Voltage source Download PDF

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Publication number
CN111984052A
CN111984052A CN202010737491.3A CN202010737491A CN111984052A CN 111984052 A CN111984052 A CN 111984052A CN 202010737491 A CN202010737491 A CN 202010737491A CN 111984052 A CN111984052 A CN 111984052A
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Prior art keywords
transistor
voltage
current
output
circuit
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刘利书
冯宇翔
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Midea Group Co Ltd
Guangdong Midea White Goods Technology Innovation Center Co Ltd
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Midea Group Co Ltd
Guangdong Midea White Goods Technology Innovation Center Co Ltd
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Priority to CN202010737491.3A priority Critical patent/CN111984052A/en
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation

Abstract

The application discloses a voltage source, which comprises an output circuit, an operational amplifier adaptive voltage circuit, an input-output coupling loop circuit and a current source, wherein the operational amplifier adaptive voltage circuit, the input-output coupling loop circuit and the current source are sequentially connected; the operational amplifier adaptive voltage circuit is used for generating a first current output by the first output end and a second current output by the second output end; the input-output coupling loop circuit is used for adjusting the voltage of the first output end and the voltage of the second output end and generating an adjusting current; the current source is used for adjusting the first current and the second current; the output circuit is used for generating a stable voltage and outputting the stable voltage. The voltage source provided by the application has the advantages that the structure is simple, the controllability is good, the influence of the offset voltage of the operational amplifier is reduced through the input-output coupling loop circuit, the influence of mismatch of the current mirror is reduced through the current source, and the output voltage is high in precision and good in stability.

Description

Voltage source
Technical Field
The application relates to the technical field of circuits, in particular to a voltage source.
Background
In the field of semiconductor devices and chips, it is generally necessary to design an external or internal voltage source with high precision and high temperature stability. The basic parameters for judging the quality of the voltage source comprise:1) stability of voltage: does not change with the applied voltage or load; 2) stability at temperature: does not change with the change of the external temperature; 3) the stability of the process. Among them, the stability of temperature is the most technically challenging. In the industry, the design of a voltage source is conventionally that positive and negative temperature coefficients of a triode are superposed to generate output voltage which is not changed along with power supply voltage, temperature and process. The performance parameters of the control circuit and the protection circuit in the chip are significantly affected by the reference voltage. In order to accurately set the bias potential of each analog unit in the chip and the reference potential of the control module and the protection module, a high-precision reference voltage signal is essential. However, considering the mismatch problem of the offset voltage VOS of the operational amplifier and the current mirror, the design of the high-precision reference source is always an important factor affecting the performance of the device/module. As shown in fig. 1, a conventional design idea is to superimpose two independent sets of currents with different temperature coefficients to generate a current that does not change with temperature, and transmit the current to an output branch circuit to realize a stable voltage source design. Fig. 2 shows a specific design circuit, and the basic structure is composed of a bandgap reference core and an operational amplifier. Will generate a positive temperature coefficient current IPTAT(IPTAT＝ΔVBE/R2) With negative temperature coefficient current ICTAT(ICTAT＝VBE/R1) Weighted summation is carried out to obtain an approximate zero temperature coefficient current I1The current is replicated by a current mirror, and a resistor R4Applying an output reference voltage if the offset voltage of the operational amplifier is VOSThen a voltage reference value V is outputrefThe values of (A) are:
Figure BDA0002605630380000011
offset voltage V of operational amplifierOSThe conventional voltage reference circuit is difficult to output a reference voltage with high precision and high temperature stability. In addition, the voltage applied to the two ends of the resistor R2 is the difference delta Vbe between the base electrode and the emitter electrode of the two triodes, the voltage is a positive temperature coefficient, and the base electrode and the emitter electrode Vbe are negative temperature coefficients, so that the voltage source Vref which does not change along with the temperature can be obtained through the linear superposition of the delta Vbe and the Vbe. At present, the methodIn the case, the operational amplifier is not an ideal operational amplifier, and has an offset voltage Vos, which cannot ensure that the voltages at the point a and the point B are completely equal, so the accuracy and the temperature stability of the output voltage Vref are not high.
Disclosure of Invention
It is an object of the present application to provide a voltage source. The following presents a simplified summary in order to provide a basic understanding of some aspects of the disclosed embodiments. This summary is not an extensive overview and is intended to neither identify key/critical elements nor delineate the scope of such embodiments. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is presented later.
According to an aspect of the embodiments of the present application, a voltage source is provided, and its idea is shown in fig. 3, a negative temperature coefficient is first coupled with an output branch to generate a negative temperature coefficient current, and the negative temperature coefficient current includes a negative feedback effect of an output voltage, so that an influence of an offset voltage can be greatly reduced. Then the negative temperature coefficient current and the positive temperature coefficient current are superposed to obtain a current which does not change along with the temperature, and finally the current is output to an output branch circuit. The circuit comprises an output circuit, and an operational amplifier adaptive voltage circuit, an input-output coupling loop circuit and a current source which are sequentially connected, wherein the output circuit is respectively connected with the operational amplifier adaptive voltage circuit and the input-output coupling loop circuit;
the operational amplifier adaptive voltage circuit comprises a first output end and a second output end; the operational amplifier adaptive voltage circuit and the output circuit are respectively connected with an input power supply voltage;
the operational amplifier adaptive voltage circuit is used for generating a first current output by the first output end and a second current output by the second output end;
the input-output coupling loop circuit is used for adjusting the voltage of the first output end and the voltage of the second output end, reducing the difference value between the voltage of the first output end and the voltage of the second output end and generating an adjusting current;
the current source is used for adjusting the first current and the second current so as to reduce the difference between the first current and the second current;
the output circuit is used for generating a third current equal to the first current, generating a stable voltage by using the third current and the adjusting current and outputting the stable voltage.
Further, the operational amplifier adaptive voltage circuit comprises an operational amplifier and a current mirror which are connected with each other.
Further, the current mirror includes a first transistor and a second transistor; a first pin of the first transistor and a first pin of the second transistor are both connected with the input power supply voltage; and the second pin of the first transistor, the third pin of the second transistor and the second pin of the second transistor are all connected with the operational amplifier adaptive voltage circuit.
Further, the first transistor and the second transistor are PMOS transistors or triodes.
Furthermore, the output circuit includes a third transistor and a fifth resistor, a first pin of the third transistor is connected to the input power voltage, a second pin of the third transistor is connected to the operational amplifier adaptive voltage circuit, a third pin of the third transistor is connected to a first end of the fifth resistor, and a second end of the fifth resistor is grounded.
Further, the third transistor is a PMOS transistor or a triode.
Further, the input-output coupling loop circuit comprises a first resistor, a second resistor, a third resistor and a fourth resistor; the first end of the first resistor is respectively connected with the current mirror and the operational amplifier adaptive voltage circuit; the first end of the second resistor is connected with the second end of the first resistor; the second end of the second resistor is connected with the output circuit; the first end of the third resistor is respectively connected with the current mirror and the operational amplifier adaptive voltage circuit; the first end of the fourth resistor is connected with the second end of the third resistor; the second end of the fourth resistor is connected with the output circuit; the first resistance is equal to the third resistance.
Further, the current source is a cross-coupled circuit; the cross-coupling circuit comprises a sixth resistor, a first transistor, a second transistor, a third transistor and a fourth transistor; the first end of the sixth resistor is connected with the input-output coupling loop circuit; a third pin of the third transistor is connected with a second end of the sixth resistor; a second pin of the third transistor is connected with a first pin of the fourth transistor; a third pin of the fourth transistor is connected with the input-output coupling loop circuit; a second pin of the fourth transistor is connected with a first pin of the third transistor; a third pin of the first transistor is connected with a first pin of the third transistor; the second pin and the first pin of the first transistor are both grounded; a third pin of the second transistor is connected with a first pin of the fourth transistor; the first pin and the second pin of the second transistor are both grounded.
Further, the first transistor, the second transistor, the third transistor and/or the fourth transistor are/is a PMOS transistor or a triode.
Further, the first transistor, the second transistor, the third transistor, and the fourth transistor are a PNP triode or an NPN triode, respectively.
Further, the emitter areas of the first transistor and the fourth transistor are equal; the emitter areas of the second transistor and the third transistor are equal.
According to another aspect of embodiments of the present application, there is provided an electrical device comprising a voltage source as described above.
The technical scheme provided by the embodiment of the application can have the following beneficial effects:
the voltage source provided by the embodiment of the application has the advantages that the structure is simple, the controllability is good, the influence of the offset voltage of the operational amplifier is reduced through the input-output coupling loop circuit, the influence of mismatch of the current mirror is reduced through the cross coupling circuit, the output voltage precision is high, and the stability is good.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the embodiments of the application, or may be learned by the practice of the embodiments. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a block diagram of a prior art circuit configuration;
FIG. 2 is a diagram of an example circuit of a prior art voltage source;
FIG. 3 is a block diagram of a circuit configuration of an embodiment of the present application;
FIG. 4 is a circuit schematic of one embodiment of the present application;
FIG. 5 is a circuit schematic of another embodiment of the present application;
fig. 6 is a circuit schematic diagram of yet another embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is further described with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It will be understood by those within the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
An embodiment of the present application provides a voltage source, a structural block diagram of which is shown in fig. 3, and the voltage source includes a voltage output circuit, and a positive temperature coefficient current generating circuit and a negative temperature coefficient current generating circuit that are respectively connected to the voltage output circuit, the negative temperature coefficient current generating circuit is coupled to an output branch circuit to generate a negative temperature coefficient current, the current includes a negative feedback function of an output voltage, and can greatly reduce an influence of an offset voltage, and then the negative temperature coefficient current is superimposed with the positive temperature coefficient current to obtain a current that does not change with temperature, and finally the current is output to the output branch circuit. I1 is a positive temperature coefficient current generated by a positive temperature coefficient circuit; k1 is the magnification or reduction factor of I1 during transmission; i2 is a negative temperature coefficient current generated after the negative temperature coefficient circuit is coupled with the voltage output circuit; k2 is the factor by which I2 is scaled up or down during transmission.
As shown in fig. 4, an embodiment of the present application provides a voltage source, which includes an output circuit 4, and an operational amplifier adaptive voltage circuit 1, an input-output coupled loop circuit 2, and a cross-coupled circuit 3, which are connected in sequence, where the output circuit 4 is connected to the operational amplifier adaptive voltage circuit 1 and the input-output coupled loop circuit 2, respectively;
the operational amplifier adaptive voltage circuit 1 comprises a first output end and a second output end; the operational amplifier adaptive voltage circuit 1 and the output circuit 4 are respectively connected with an input power supply voltage VCC;
the operational amplifier adaptive voltage circuit 1 is used for generating a first current I output by a first output end1And a second current I output by the second output terminal2；
The input-output coupling loop circuit 2 is used for adjusting the voltage of the first output end and the voltage of the second output end, reducing the difference between the voltage of the first output end and the voltage of the second output end and generating an adjusting current;
the cross-coupling circuit 3 is used for adjusting the first current I1And a second current I2To reduce the first current I1And a second current I2The difference between them; the cross-coupled circuit 3 can also be replaced by a common current source;
the output circuit 4 is used for generating a first current I1Equal third current I3Using a third current I3And adjusting the current to generate a stabilized voltage Vref and outputting the stabilized voltage Vref.
The operational amplifier adaptive voltage circuit 1 comprises an operational amplifier OP and a current mirror which are connected with each other; the current mirror comprises a first PMOS transistor M1 and a second PMOS transistor M2. The output circuit 4 includes a third PMOS transistor M3 and a fifth resistor R3. The input-output coupling loop circuit 2 includes a first resistor R1, a second resistor R2, a third resistor R5, and a fourth resistor R4. The cross-coupling circuit 3 includes a sixth resistor R6, a first transistor Q1, a second transistor Q2, a third transistor Q3, and a fourth transistor Q4. The first resistor R1 and the third resistor R5 are equal.
The source electrode of the first PMOS tube M1, the source electrode of the second PMOS tube M2 and the source electrode of the third PMOS tube M3 are all connected with an input power supply voltage VCC; the grid electrode of the first PMOS tube M1, the grid electrode of the second PMOS tube M2 and the grid electrode of the third PMOS tube M3 are all connected with the output end of the operational amplifier OP; the non-inverting input end of the operational amplifier OP is connected with the drain electrode of the first PMOS tube M1; the inverting input terminal of the operational amplifier OP is connected to the drain of the second PMOS transistor M2.
A first end of the first resistor R1 is respectively connected to the drain of the first PMOS transistor and the non-inverting input end of the operational amplifier OP; a first end of the third resistor R5 is connected to the drain of the second PMOS transistor M2 and the inverting input terminal of the operational amplifier OP, respectively; a first end of the second resistor R2 is connected with a second end of the first resistor R1; a second end of the second resistor R2 is connected with the drain electrode of the third PMOS tube; a first end of the fourth resistor R4 is connected with a second end of the third resistor R5; the second end of the fourth resistor R4 is connected to the drain of the third PMOS transistor.
A first end of the sixth resistor R6 is connected with a second end of the first resistor R1; an emitter of the third transistor Q3 is connected to a second end of the sixth resistor R6; the base electrode of the third triode Q3 is connected with the collector electrode of the fourth triode Q4; an emitter of the fourth transistor Q4 is connected to a second end of the third resistor R5; the base electrode of the fourth triode Q4 is connected with the collector electrode of the third triode Q3; the emitter of the first triode Q1 is connected with the collector of the third triode Q3; the base electrode and the collector electrode of the first triode are grounded; the emitter of the second triode Q2 is connected with the collector of the fourth triode Q4; the collector and base of the second transistor Q2 are both grounded. A triode is a bipolar transistor. The output end of the voltage source is connected with the drain electrode of the third PMOS tube. The areas of the emitting areas of the first triode Q1 and the fourth triode Q4 are equal; the emitter areas of the second transistor Q2 and the third transistor Q3 are equal. The ratio of the emitting area of the first transistor Q1 to the emitting area of the second transistor Q2 is 1: and N is added. Preferably, the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 are all PNP transistors.
The output voltage Vref can be adjusted by adjusting the value of the fifth resistor R3, so as to obtain Vref with different values.
The input-output coupling loop circuit is used for ensuring that the voltages of a first output end and a second output end of the operational amplifier adaptive voltage circuit are equal, and the first output end and the second output end are respectively a drain end of a first PMOS tube and a drain end of a second PMOS tube. The input-output coupling loop circuit comprises two feedback loops, wherein a first resistor R1 and a second resistor R2 form a first feedback loop for adjusting the offset voltage V of the operational amplifier OPOSFeedback to the in-phase input end of the operational amplifier OP to reduce the offset voltage VOSThe influence on the reference voltage. Meanwhile, the third resistor R5 and the fourth resistor R4 form a second feedback loop for balancing the current loss caused by the first feedback loop.
The feedback loop formed by the first resistor R1 and the second resistor R2 is coupled to the non-inverting input terminal of the operational amplifier OP. The feedback loop formed by the third resistor R5 and the fourth resistor R4 can reduce current loss. The input-output coupling loop circuit greatly reduces the influence of the offset voltage problem of the operational amplifier OP and improves the output precision of the voltage source.
The cross-coupling circuit is used for reducing or eliminating the mismatch of the current mirror, so that the current I output by the drain electrode of the first PMOS tube M11Current I output from drain of second PMOS transistor M22As equal as possible.
The working principle of the input-output coupling loop circuit is as follows:
make RF1＝RF2＝RFWherein R isF1I.e. R2, RF2I.e. R4, RFAt the set value, R flows throughF1And RF2Current of (I)RF1And IRF2Is IRF1＝IRF2＝(VA-Vref)/RF，VANamely the voltage at the point A of the positive phase input end of the operational amplifier OP; vref is the output stable voltage; the width-to-length ratios of the PMOS transistors M1, M2, and M3 are equal, and the currents flowing through them are equal, and have the values:
Figure BDA0002605630380000071
Figure BDA0002605630380000072
wherein IR3Is the current flowing through the fifth resistor R3, I3Is the current, V, output by the drain of the third PMOS transistor M3A’The voltage at point A' in FIG. 4, which is located between R1 and R6, is connected to R1 and R6, respectivelyA2I.e., the resistance value of R6.
The output reference voltage V can be obtained from the above formularefIs expressed as
Figure BDA0002605630380000073
The derivation is obtained from the above two sides
Figure BDA0002605630380000074
Wherein k is boltzmann constant, Q is electron charge amount, N is a ratio of emitter area of the transistor Q2Q 3 to that of the transistor Q1Q 4, i.e., emitter area ratio a 2: a3: a1: a4 ═ N:1: 1.
Thermal voltage VTK is boltzmann constant, T is absolute temperature, and q is electron charge amount. VTIn general, 26mV may be used.
IRF1+IRF2I.e. the adjustment current. The output circuit 4 is used for generating a first current I1Equal third current I3Using a third current I3And adjusting the current (I)RF1+IRF2) Are combined into IR3，I R3R5Namely, a stable voltage Vref is generated and outputted.
At room temperature
Figure BDA0002605630380000081
The concentration of the carbon dioxide is-1.5 mV,
Figure BDA0002605630380000082
to k/q by appropriately setting RF/RA2Optimizing the value of the sum parameter N to output the reference voltage VrefTo obtain an output voltage that is approximately temperature independent, the value being:
Figure BDA0002605630380000083
Vosis the offset voltage of the operational amplifier. Vref,osIs the final output voltage under the influence of the offset voltage. Taking account of offset voltage V of operational amplifier OPOSUnder the influence of the electric field, the current flows through the resistor RF1Current of 2 (2V)BE+VOS-Vref,OS)/RF1Through a resistance RF2Has a current of (2V)BE+VOS-Vref,OS)/RF2Thus, the above formula is modified to
Figure BDA0002605630380000084
△VBEFor difference of base-emitter voltages of two triodes, i.e. DeltaVBE＝VBE4-VBE3＝VBE2-VBE1. The value of the output reference voltage considering the offset voltage of the operational amplifier OP is as follows. Compared with the traditional scheme, the influence of the offset voltage on the output reference voltage is reduced by more than half:
Figure BDA0002605630380000085
a degree of mismatch is considered for the current mirror mismatch factor, i.e., the currents flowing through the M1 and M2 tubes. The cross coupling circuit is used for eliminating the mismatch of the current mirror and ensuring the current I1 output by the drain electrode of the first PMOS tube and the current I output by the drain electrode of the second PMOS tube2Are equal.
The working principle of the cross-coupling circuit is as follows:
assuming I caused by a current mirror1And I2Has a mismatch coefficient of σ, i.e. I1＝I2(1+ σ), i.e. PTAT current I1Can be expressed as
Figure BDA0002605630380000086
In the formula, AE1、AE2、AE3、AE4Emitter area of bipolar transistors Q1, Q2, Q3, Q4, IE1、IE2、IE3、IE4Is the emitter current, V, of bipolar transistors Q1, Q2, Q3, Q4BE1、VBE2、VBE3、VBE4The base-emitter voltages of transistors Q1, Q2, Q3, and Q4, respectively. Due to IE1＝IE3＝I1，IE2＝IE4＝I2，AE2＝AE3＝NAE1＝NAE4From this can be obtained
Figure BDA0002605630380000091
The cross-coupling circuit eliminates the current mismatch of the M1 and M2 tubes (the above formula is independent of the mismatch coefficient sigma). Meanwhile, the influence caused by the process is reduced by adopting a large-size current mirror MOS tube structure and a matched layout. Therefore, the circuit adopts 4 bipolar transistors connected in a tuning coupling mode, two groups of the bipolar transistors at opposite corners are set to be equal in emitting area, and mismatch factors are completely eliminated.
In some embodiments, one or more of the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 may be NPN transistors, and when the PNP transistor is replaced by an NPN transistor, the collector of the NPN transistor is replaced by the emitter of the PNP transistor, and the emitter of the NPN transistor is replaced by the collector of the PNP transistor, and meanwhile, the collector of the NPN transistor is connected to the base.
In some embodiments, one or more of the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 may be MOS transistors, and when the PNP transistor is replaced by an MOS transistor, the collector of the PNP transistor is replaced by a source, and the emitter of the PNP transistor is replaced by a drain. As shown in fig. 5, four PMOS transistors are used in the cross-coupled circuit 3.
In some embodiments, one or more of the first PMOS transistor, the second PMOS transistor, and the third PMOS transistor is replaced by a triode; when the PMOS tube is replaced by the PNP type triode, the source electrode is replaced by the collector electrode of the PNP type triode, and the drain electrode is replaced by the emitting electrode of the PNP type triode; when the PMOS tube is replaced by the NPN type triode, the drain electrode is replaced by the collector electrode of the PNP type triode, and the source electrode is replaced by the emitter electrode of the PNP type triode. As shown in fig. 6, two PNP transistors are used in the operational amplifier adaptive voltage circuit 1, and one PNP transistor is used in the output circuit 4.
Another embodiment of the present application provides an electrical appliance, such as a washing machine, comprising the voltage source as described above.
The voltage source provided by the embodiment of the application has the advantages that the structure is simple, the controllability is good, the influence of OP offset voltage of the operational amplifier is reduced through the input-output coupling loop circuit, the influence of mismatch of the current mirror is reduced through the cross coupling circuit, the output voltage precision is high, and the stability is good.
It should be noted that:
in the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the application may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
In the description of the present application, if there are terms such as "first", "second", "third", "fourth", etc., such terms are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit indicating a number of technical features being indicated. Thus, features defined as "first", "second", "third", "fourth" may explicitly or implicitly include one or more of the features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In the description of the present application, if there are terms such as "disposed," "connected," and the like, unless otherwise expressly specified or limited, such terms are to be construed broadly, e.g., as meaning directly connected, indirectly connected through an intermediary, communicating between two elements, or interacting between two elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
Similarly, it should be appreciated that in the foregoing description of exemplary embodiments of the application, various features of the application are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. However, the disclosed method should not be interpreted as reflecting an intention that: this application is intended to cover such departures from the present disclosure as come within known or customary practice in the art to which this invention pertains. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this application.
Furthermore, those skilled in the art will appreciate that while some embodiments described herein include some features included in other embodiments, rather than other features, combinations of features of different embodiments are meant to be within the scope of the application and form different embodiments. For example, in the following claims, any of the claimed embodiments may be used in any combination.
It should be noted that the above-mentioned embodiments illustrate rather than limit the application, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The application may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The usage of the words first, second and third, etcetera do not indicate any ordering. These words may be interpreted as names.
It should be understood that, although the steps in the flowcharts of the figures are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and may be performed in other orders unless explicitly stated herein. Moreover, at least a portion of the steps in the flow chart of the figure may include multiple sub-steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, which are not necessarily performed in sequence, but may be performed alternately or alternately with other steps or at least a portion of the sub-steps or stages of other steps.
The above-mentioned embodiments only express the embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.

Claims (12)

1. A voltage source is characterized by comprising an output circuit, an operational amplifier adaptive voltage circuit, an input-output coupling loop circuit and a current source, wherein the operational amplifier adaptive voltage circuit, the input-output coupling loop circuit and the current source are sequentially connected;
the operational amplifier adaptive voltage circuit comprises a first output end and a second output end; the operational amplifier adaptive voltage circuit and the output circuit are respectively connected with an input power supply voltage;
the operational amplifier adaptive voltage circuit is used for generating a first current output by the first output end and a second current output by the second output end;
the input-output coupling loop circuit is used for adjusting the voltage of the first output end and the voltage of the second output end, reducing the difference value between the voltage of the first output end and the voltage of the second output end and generating an adjusting current;
the current source is used for adjusting the first current and the second current so as to reduce the difference between the first current and the second current;
the output circuit is used for generating a third current equal to the first current, generating a stable voltage by using the third current and the adjusting current and outputting the stable voltage.
2. The voltage source of claim 1, wherein the op-amp adaptation voltage circuit comprises an operational amplifier and a current mirror connected to each other.
3. The voltage source of claim 2, wherein the current mirror comprises a first transistor and a second transistor; a first pin of the first transistor and a first pin of the second transistor are both connected with the input power supply voltage; and the second pin of the first transistor, the third pin of the second transistor and the second pin of the second transistor are all connected with the operational amplifier adaptive voltage circuit.
4. The voltage source of claim 3, wherein the first transistor and the second transistor are PMOS transistors or triodes.
5. The voltage source of claim 1, wherein the output circuit comprises a third transistor and a fifth resistor, a first pin of the third transistor is connected to the input power voltage, a second pin of the third transistor is connected to the operational amplifier adapter voltage circuit, a third pin of the third transistor is connected to a first end of the fifth resistor, and a second end of the fifth resistor is grounded.
6. The voltage source of claim 5, wherein the third transistor is a PMOS transistor or a triode.
7. The voltage source of claim 1, wherein the input-output coupling loop circuit comprises a first resistor, a second resistor, a third resistor, and a fourth resistor; the first end of the first resistor is respectively connected with the current mirror and the operational amplifier adaptive voltage circuit; the first end of the second resistor is connected with the second end of the first resistor; the second end of the second resistor is connected with the output circuit; the first end of the third resistor is respectively connected with the current mirror and the operational amplifier adaptive voltage circuit; the first end of the fourth resistor is connected with the second end of the third resistor; the second end of the fourth resistor is connected with the output circuit; the first resistance is equal to the third resistance.
8. The voltage source of claim 1, wherein the current source is a cross-coupled circuit; the cross-coupling circuit comprises a sixth resistor, a first transistor, a second transistor, a third transistor and a fourth transistor; the first end of the sixth resistor is connected with the input-output coupling loop circuit; a third pin of the third transistor is connected with a second end of the sixth resistor; a second pin of the third transistor is connected with a first pin of the fourth transistor; a third pin of the fourth transistor is connected with the input-output coupling loop circuit; a second pin of the fourth transistor is connected with a first pin of the third transistor; a third pin of the first transistor is connected with a first pin of the third transistor; the second pin and the first pin of the first transistor are both grounded; a third pin of the second transistor is connected with a first pin of the fourth transistor; the first pin and the second pin of the second transistor are both grounded.
9. The voltage source of claim 8, wherein the first transistor, the second transistor, the third transistor, and/or the fourth transistor is a PMOS transistor or a triode.
10. The voltage source of claim 8, wherein the first transistor, the second transistor, the third transistor, and the fourth transistor are each a PNP transistor or an NPN transistor.
11. The voltage source of claim 10, wherein the emitter areas of the first transistor and the fourth transistor are equal; the emitter areas of the second transistor and the third transistor are equal.
12. An electrical device, characterized in that it comprises a voltage source according to any one of claims 1-11.
CN202010737491.3A 2020-07-28 2020-07-28 Voltage source Pending CN111984052A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112729578A (en) * 2020-12-08 2021-04-30 广东美的白色家电技术创新中心有限公司 Electrical equipment, electronic device and temperature detection circuit thereof

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102270008A (en) * 2011-06-23 2011-12-07 西安电子科技大学 Band-gap reference voltage source with wide input belt point curvature compensation
CN102622031A (en) * 2012-04-09 2012-08-01 中国科学院微电子研究所 Low-voltage and high-precision band-gap reference voltage source
CN102841629A (en) * 2012-09-19 2012-12-26 中国电子科技集团公司第二十四研究所 Bipolar complementary metal oxide semiconductor (BiCMOS) current-type reference circuit
CN103197722A (en) * 2013-03-29 2013-07-10 东南大学 Low-static-power current-mode band-gap reference voltage circuit
CN104950978A (en) * 2015-06-19 2015-09-30 西安华芯半导体有限公司 Amplifier offset voltage compensating circuit for low-voltage band-gap reference
US20200036366A1 (en) * 2018-07-30 2020-01-30 Analog Devices Global Unlimited Company Techniques for generating multiple low noise reference voltages
CN111190454A (en) * 2020-02-28 2020-05-22 清华大学 Curvature compensation low-temperature drift band gap reference voltage source circuit

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102270008A (en) * 2011-06-23 2011-12-07 西安电子科技大学 Band-gap reference voltage source with wide input belt point curvature compensation
CN102622031A (en) * 2012-04-09 2012-08-01 中国科学院微电子研究所 Low-voltage and high-precision band-gap reference voltage source
CN102841629A (en) * 2012-09-19 2012-12-26 中国电子科技集团公司第二十四研究所 Bipolar complementary metal oxide semiconductor (BiCMOS) current-type reference circuit
CN103197722A (en) * 2013-03-29 2013-07-10 东南大学 Low-static-power current-mode band-gap reference voltage circuit
CN104950978A (en) * 2015-06-19 2015-09-30 西安华芯半导体有限公司 Amplifier offset voltage compensating circuit for low-voltage band-gap reference
US20200036366A1 (en) * 2018-07-30 2020-01-30 Analog Devices Global Unlimited Company Techniques for generating multiple low noise reference voltages
CN111190454A (en) * 2020-02-28 2020-05-22 清华大学 Curvature compensation low-temperature drift band gap reference voltage source circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112729578A (en) * 2020-12-08 2021-04-30 广东美的白色家电技术创新中心有限公司 Electrical equipment, electronic device and temperature detection circuit thereof
CN112729578B (en) * 2020-12-08 2024-03-22 广东美的白色家电技术创新中心有限公司 Electrical equipment, electronic device and temperature detection circuit thereof

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