CN111430401A - 单片光电集成电路及其形成方法 - Google Patents
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- 230000005693 optoelectronics Effects 0.000 title claims abstract description 47
- 238000000034 method Methods 0.000 title claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 97
- 230000005669 field effect Effects 0.000 claims abstract description 48
- 230000002093 peripheral effect Effects 0.000 claims abstract description 41
- 239000000463 material Substances 0.000 claims description 28
- 229910002704 AlGaN Inorganic materials 0.000 claims description 21
- 238000005530 etching Methods 0.000 claims description 14
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- 238000000151 deposition Methods 0.000 claims description 3
- 238000012545 processing Methods 0.000 abstract description 5
- 229910002601 GaN Inorganic materials 0.000 description 184
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- 238000009825 accumulation Methods 0.000 description 2
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- 230000004048 modification Effects 0.000 description 2
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- 239000010703 silicon Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
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- 238000011161 development Methods 0.000 description 1
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- 238000010894 electron beam technology Methods 0.000 description 1
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Abstract
本发明涉及一种单片光电集成电路及其形成方法。所述单片光电集成电路包括:衬底,包括光子集成器件区域和外围电路区域;第一GaN基多量子阱光电PN结器件,位于光子集成器件区域,用作发光二极管,包括第一P‑型欧姆接触电极和第一N‑型欧姆接触电极;第一GaN基场效应晶体管,位于外围电路区域,包括具有第一凹槽的第一栅极介质层、填充于第一凹槽中的第一栅极、以及第一源极和第一漏极;第一源极电连接第一P‑型欧姆接触电极,第一漏极用于与第一电位电连接,第一N‑型欧姆接触电极用于与低于第一电位的第二电位电连接,第一栅极电连接控制端口,以控制发光二极管的亮灭。本发明制备的单片光电集成电路具有高性能,且能够有效降低其加工难度。
Description
技术领域
本发明涉及集成光电子技术领域,尤其涉及一种单片光电集成电路及其形成方法。
背景技术
光电单片集成技术是未来通信与信息技术发展的重要方向,与传统的片外互连方式相比,单片光电集成电路具有面积小、可靠性高、噪声小、速度快以及抗干扰能力强等优势。随着材料科学和制造技术的进步,在单片衬底上集成光学、光电和电子元件成为可能。但是,当前的单片光电集成电路在电学性能、制造工艺以及结构复杂性方面存在着众多不足。
因此,如何提高单片光电集成电路的性能,降低单片光电集成电路的制造复杂度,并简化单片光电集成电路的结构,是目前亟待解决的技术问题。
发明内容
本发明提供一种单片光电集成电路及其形成方法,用于解决现有的单片光电集成电路性能较差的问题。
为了解决上述问题,本发明提供了一种单片光电集成电路,包括:
衬底,包括光子集成器件区域和外围电路区域;
第一GaN基多量子阱光电PN结器件,位于所述衬底表面的所述光子集成器件区域,用作单片光电集成电路中的发光二极管,包括第一P-型欧姆接触电极和第一N-型欧姆接触电极;
第一GaN基场效应晶体管,位于所述衬底表面的外围电路区域,所述第一GaN基场效应晶体管包括位于所述衬底表面且具有第一凹槽的第一栅极介质层、填充于所述第一凹槽中的第一栅极、以及位于所述第一栅极相对两侧的第一源极和第一漏极;
所述第一源极电连接所述第一P-型欧姆接触电极,所述第一漏极用于与第一电位电连接,所述第一N-型欧姆接触电极用于与低于所述第一电位的第二电位电连接,所述第一栅极电连接控制端口,以控制所述发光二极管的亮灭。
可选的,还包括:
第二GaN基多量子阱光电PN结器件,位于所述衬底表面的所述光子集成器件区域,用作所述单片光电集成电路中的光电检测器,包括第二P-型欧姆接触电极和第二N-型欧姆接触电极,且所述第二GaN基多量子阱光电PN结器件与所述第一GaN基多量子阱光电PN结器件通过光波导连接;
电阻,位于所述衬底表面的外围电路区域;
第二GaN基场效应晶体管,位于所述衬底表面的外围电路区域,所述第二GaN基场效应晶体管包括位于所述衬底表面且具有第二凹槽的第二栅极介质层、填充于所述第二凹槽中的第二栅极、以及位于所述第二栅极相对两侧的第二源极和第二漏极;
所述电阻的一端电连接所述第二N-型欧姆接触电极、另一端用于与第三电位电连接,所述第二P-型欧姆接触电极用于与低于所述第三电位的第四电位电连接,所述第二N-型欧姆接触电极与所述电阻之间的电位电连接到所述第二栅极,以控制所述第二GaN基场效应晶体管的导通与否。
可选的,所述衬底表面还包括AlGaN缓冲层、以及位于所述AlGaN缓冲层表面的未掺杂GaN层;
所述单片光电集成电路还包括一自所述衬底贯穿所述AlGaN缓冲层和所述未掺杂GaN层的空腔,所述光波导为悬于所述空腔上方的GaN固支梁结构,所述第一GaN基多量子阱光电PN结器件和所述第二GaN基多量子阱光电PN结器件形成于所述未掺杂GaN层表面、且均悬于所述空腔上方。
可选的,所述第一GaN基多量子阱光电PN结器件还包括沿垂直于所述衬底的方向依次叠置的第一N-型GaN外延层、第一InGaN/GaN多量子阱层和第一P-型GaN外延层,所述第二GaN基多量子阱光电PN结器件还包括沿垂直于所述衬底的方向依次叠置的第二N-型GaN外延层、第二InGaN/GaN多量子阱层和第二P-型GaN外延层;
在外围电路区域,还包括设置于所述未掺杂GaN层表面的第三N-型GaN外延层,所述第一源极、所述第一漏极、所述第二源极和所述第二漏极均设置于所述第三N-型GaN外延层表面;
所述第三N-型GaN外延层中具有暴露所述未掺杂GaN层的第一通孔和第二通孔,所述第一栅极介质层覆盖所述第一通孔的内壁以及部分的所述第三N-型GaN外延层表面,所述第二栅极介质层覆盖所述第二通孔的内壁以及部分的所述第三N-型GaN外延层表面。
可选的,还包括:
贯穿所述未掺杂GaN层和所述AlGaN缓冲层并暴露所述衬底的隔离槽,所述隔离槽用于隔离所述光子集成器件区域和所述外围电路区域。
可选的,在沿平行于所述衬底的方向上,所述第一P-型欧姆接触电极的截面为圆形,所述第一N-型欧姆接触电极的截面呈弧形环绕所述第一P-型欧姆接触电极的外周设置;
在沿平行于所述衬底的方向上,所述第二P-型欧姆接触电极的截面为圆形,所述第二N-型欧姆接触电极的截面呈弧形环绕所述第二P-型欧姆接触电极的外周设置。
可选的,所述电阻包括:
两个电阻电极,位于所述衬底表面;
电阻臂,位于所述衬底表面,且所述电阻臂的两端与两个所述电阻电极一一对应电连接。
为了解决上述问题,本发明还提供了一种如上述任一项所述的单片光电集成电路的形成方法,包括如下步骤:
提供一衬底,并于所述衬底表面定义光子集成器件区域和外围电路区域;
形成第一GaN基多量子阱光电PN结器件于所述衬底表面的所述光子集成器件区域,用作单片光电集成电路中的发光二极管,所述第一GaN基多量子阱光电PN结器件包括第一P-型欧姆接触电极和第一N-型欧姆接触电极;
形成第一GaN基场效应晶体管于所述衬底表面的外围电路区域,所述第一GaN基场效应晶体管包括位于所述衬底表面且具有第一凹槽的第一栅极介质层、填充于所述第一凹槽中的第一栅极、以及位于所述第一栅极相对两侧的第一源极和第一漏极;
电连接所述第一源极与所述第一P-型欧姆接触电极、所述第一漏极与第一电位、所述第一N-型欧姆接触电极与低于所述第一电位的第二电位、所述第一栅极与控制端口,以控制所述发光二极管的亮灭。
可选的,还包括如下步骤:
形成第二GaN基多量子阱光电PN结器件于所述衬底表面的所述光子集成器件区域,用作所述单片光电集成电路中的光电检测器,所述第二GaN基多量子阱光电PN结器件包括第二P-型欧姆接触电极和第二N-型欧姆接触电极;
通过光波导连接所述第一GaN基多量子阱光电PN结器件与所述第二GaN基多量子阱光电PN结器件;
形成第二GaN基场效应晶体管于所述衬底表面的外围电路区域,所述第二GaN基场效应晶体管包括位于所述衬底表面且具有第二凹槽的第二栅极介质层、填充于所述第二凹槽中的第二栅极、以及位于所述第二栅极相对两侧的第二源极和第二漏极;
形成电阻于所述衬底表面的外围电路区域;
电连接所述电阻的一端电连接所述第二N-型欧姆接触电极、另一端与第三电位、以及所述第二P-型欧姆接触电极与低于所述第三电位的第四电位,同时所述第二N-型欧姆接触电极与所述电阻之间的电位电连接到所述第二栅极,以控制所述第二GaN基场效应晶体管的导通与否。
可选的,还包括如下步骤:
形成AlGaN缓冲层、以及位于所述AlGaN缓冲层表面的未掺杂GaN层于所述衬底表面;
沉积N-型GaN材料于所述为掺杂的GaN层表面,形成N-型GaN材料层;
刻蚀所述N-型GaN材料层,同时形成所述第一GaN基多量子阱光电PN结器件的第一N-型GaN外延层、所述第二GaN基多量子阱光电PN结器件的第二N-型GaN外延层和位于所述外围电路区域的第三N-型GaN外延层;
刻蚀所述第三N-型GaN外延层,形成暴露所述未掺杂GaN层的第一通孔和第二通孔;
形成覆盖所述第一通孔的内壁以及部分的所述第三N-型GaN外延层表面的第一栅极介质层、同时形成覆盖所述第二通孔的内壁以及部分的所述第三N-型GaN外延层表面的第二栅极介质层。
本发明提供的单片光电集成电路及其形成方法,一方面,将第一GaN基多量子阱光电PN结器件与第一GaN基场效应晶体管集成在同一片衬底表面,利用GaN材料具有高电子迁移率、高热导率、高耐温、抗腐蚀以及抗辐射等优良特性,使得制备的单片光电集成电路中的第一GaN基多量子阱光电PN结器件与第一GaN基场效应晶体管具有高性能;另一方面,本发明提供的第一GaN基场效应晶体管无需使用复杂的离子注入技术进行制备加工过程中可以无需引入外延材料的生长,同时能够与第一GaN基多量子阱光电PN结器件的制备工艺完全兼容,从而有效降低了单片光电集成电路的加工难度。
附图说明
附图1是本发明具体实施方式中单片光电集成电路的整体结构示意图;
附图2是图1沿A-A’方向的剖面示意图;
附图3是本发明具体实施方式中第一GaN基场效应晶体管的结构示意图;
附图4是图3沿B-B’方向的剖面示意图;
附图5是本发明具体实施方式中电阻的结构示意图;
附图6是本发明具体实施方式中单片光电集成电路的形成方法流程图。
具体实施方式
下面结合附图对本发明提供的单片光电集成电路及其形成方法的具体实施方式做详细说明。
本具体实施方式提供了一种单片光电集成电路,附图1是本发明具体实施方式中单片光电集成电路的整体结构示意图,附图2是图1沿A-A’方向的剖面示意图,附图3是本发明具体实施方式中第一GaN基场效应晶体管的结构示意图,附图4是图3沿B-B’方向的剖面示意图。如图1-图4所示,本具体实施方式提供的单片光电集成电路,包括:
衬底10,包括光子集成器件区域1和外围电路区域2;
第一GaN基多量子阱光电PN结器件11,位于所述衬底10表面的所述光子集成器件区域1,用作单片光电集成电路中的发光二极管,包括第一P-型欧姆接触电极111和第一N-型欧姆接触电极112;
第一GaN基场效应晶体管21,位于所述衬底10表面的外围电路区域2,所述第一GaN基场效应晶体管21包括位于所述衬底10表面且具有第一凹槽的第一栅极介质层31、填充于所述第一凹槽中的第一栅极211、以及位于所述第一栅极211相对两侧的第一源极212和第一漏极213;
所述第一源极212电连接所述第一P-型欧姆接触电极111,所述第一漏极213用于与第一电位VDD1电连接,所述第一N-型欧姆接触电极112用于与低于所述第一电位VDD1的第二电位VSS1电连接,所述第一栅极211电连接控制端口24,以控制所述发光二极管的亮灭。
具体来说,所述衬底10可以为硅衬底,也可以为蓝宝石衬底。所述第一GaN基多量子阱光电PN结器件与所述第一GaN基场效应晶体管21均外延生长于所述衬底10表面。所述第一GaN基多量子阱光电PN结器件11用作所述单片光电集成电路中的发光二极管,用于向外界发送带有多媒体信息的可见光信号。所述第一源极212电连接所述第一P-型欧姆接触电极111,所述第一漏极213用于与第一电位VDD1(即高电位)电连接,所述第一N-型欧姆接触电极112用于与低于所述第一电位的第二电位VSS1(即低电位)电连接,所述第一栅极211电连接控制端口24,以控制所述发光二极管的亮灭。所述第一GaN基场效应晶体管21中的所述第一栅极211的材料可以与所述第一P-型欧姆接触电极111的材料相同,例如均为Ni和/或Au。所述第一源极212与所述第一漏极213的材料可以与所述第一N-型欧姆接触电极112的材料相同,例如均为Ti和/或Al。
可选的,所述单片光电集成电路还包括:
第二GaN基多量子阱光电PN结器件12,位于所述衬底10表面的所述光子集成器件区域1,用作所述单片光电集成电路中的光电检测器,包括第二P-型欧姆接触电极121和第二N-型欧姆接触电极122,且所述第二GaN基多量子阱光电PN结器件12与所述第一GaN基多量子阱光电PN结器件11通过光波导13连接;
电阻23,位于所述衬底10表面的外围电路区域2;
第二GaN基场效应晶体管22,位于所述衬底10表面的外围电路区域2,所述第二GaN基场效应晶体管22包括位于所述衬底10表面且具有第二凹槽的第二栅极介质层、填充于所述第二凹槽中的第二栅极221、以及位于所述第二栅极221相对两侧的第二源极222和第二漏极223;
所述电阻的23一端电连接所述第二N-型欧姆接触电极122、另一端用于与第三电位VDD2电连接,所述第二P-型欧姆接触电极121用于与低于所述第三电位VDD2的第四电位VSS2电连接,所述第二N-型欧姆接触电极122与所述电阻23之间的电位电连接到所述第二栅极221,以控制所述第二GaN基场效应晶体管22的导通与否。
具体来说,所述第二GaN基多量子阱光电PN结器件12用作所述单片光电集成电路中的光电检测器,使得所述第一GaN基多量子阱光电PN结器件11与所述第二GaN基多量子阱光电PN结器件12之间可以通过所述光波导13进行光路连接,从而进行可见光通信。所述电阻23的一端电连接所述第二N-型欧姆接触电极122、另一端接第三电位VDD2(即高电位),所述第二P-型欧姆接触电极121接第四电位VSS2(即低电位)。所述第二N-型欧姆接触电极122与所述电阻23之间的电位电连接到所述第二栅极221,以控制所述第二GaN基场效应晶体管22的导通与关闭,以进一步实现信号的输出。所述第二漏极223接第五电位VDD3(即高电位),所述第二源极222接低于所述第五电位VDD3的第六电位VSS3(即低电位)。
可选的,所述衬底10表面还包括AlGaN缓冲层14、以及位于所述AlGaN缓冲层14表面的未掺杂GaN层15;
所述单片光电集成电路还包括一自所述衬底10贯穿所述AlGaN缓冲层14和所述未掺杂GaN层15的空腔16,所述光波导13为悬于所述空腔16上方的GaN固支梁结构,所述第一GaN基多量子阱光电PN结器件11和所述第二GaN基多量子阱光电PN结器件12形成于所述未掺杂GaN层15表面、且均悬于所述空腔16上方。
可选的,所述第一GaN基多量子阱光电PN结器件11还包括沿垂直于所述衬底10的方向依次叠置的第一N-型GaN外延层113、第一InGaN/GaN多量子阱层115和第一P-型GaN外延层114,所述第二GaN基多量子阱光电PN结器件12还包括沿垂直于所述衬底10的方向依次叠置的第二N-型GaN外延层123、第二InGaN/GaN多量子阱层125和第二P-型GaN外延层124;
在外围电路区域2,还包括设置于所述未掺杂GaN层15表面的第三N-型GaN外延层32,所述第一源极212、所述第一漏极213、所述第二源极222和所述第二漏极223均设置于所述第三N-型GaN外延层32表面;
所述第三N-型GaN外延层32中具有暴露所述未掺杂GaN层15的第一通孔和第二通孔,所述第一栅极介质层31覆盖所述第一通孔的内壁以及部分的所述第三N-型GaN外延层32表面,所述第二栅极介质层覆盖所述第二通孔的内壁以及部分的所述第三N-型GaN外延层32表面。
具体来说,所述第一GaN基多量子阱PN结器件11与所述第二GaN基多量子阱PN结器件12呈对称设置,即所述第一GaN基多量子阱PN结器件11与所述第二GaN基多量子阱PN结器件12的结构相同,从而可以同步形成所述第一GaN基多量子阱PN结器件11与所述第二GaN基多量子阱PN结器件12。所述空腔16自所述衬底10的底面依次贯穿所述衬底10、所述AlGaN缓冲层14和所述未掺杂GaN层15,使得所述第一GaN基多量子阱PN结器件11、所述第二GaN基多量子阱PN结器件12与所述光波导13均悬于所述空腔16上方。所述第一P-型欧姆接触电极111的功函数大于所述第一P-型GaN外延层114、所述第二P-型欧姆接触电极121的功函数大于所述第二P-型GaN外延层124,从而能够分别在半导体一侧形成空穴积累层。所述第一N-型欧姆接触电极112的功函数小于所述第一N-型GaN外延层113、所述第二N-型欧姆接触电极122的功函数小于所述第二N-型GaN外延层124,从而能够分别在半导体一侧形成电子积累层。
所述第一GaN基场效应晶体管21与所述第二GaN基场效应晶体管22的结构也可以相同。以下以所述第一GaN基场效应晶体管21为例进行说明。所述第一栅极211位于所述第一源极212与所述第一漏极213之间。位于所述外围电路区域2的所述第三N-型GaN外延层32中具有暴露所述未掺杂GaN层15的第一通孔,介质材料完全覆盖所述第一通孔的侧壁及底壁,形成凹槽结构的所述第一栅极介质层31,使得所述第一栅极211与其下方的GaN材料电性绝缘,并能够通过所述栅极211上施加的电压控制其下方的载流子通道。本具体实施方式中的所述第一GaN基场效应晶体管21可以采用围栅、共源或者共漏中的一种或两种以上的组合结构形式,来进一步提高所述第一GaN基场效应晶体管的输出性能,并进一步减小器件尺寸。所述第三N-型GaN外延层32可以与所述第一N-型GaN外延层113、所述第二N-型GaN外延层123同步形成,以进一步简化所述单片光电集成电路的制造工艺,降低制造成本。
为了避免制程工艺以及电学性能的相互干扰,可选的,所述单片光电集成电路还包括:
贯穿所述未掺杂GaN层15和所述AlGaN缓冲层14并暴露所述衬底的隔离槽,所述隔离槽用于隔离所述光子集成器件区域1和所述外围电路区域2。
可选的,在沿平行于所述衬底10的方向上,所述第一P-型欧姆接触电极111的截面为圆形,所述第一N-型欧姆接触电极112的截面呈弧形环绕所述第一P-型欧姆接触电极111的外周设置;
在沿平行于所述衬底10的方向上,所述第二P-型欧姆接触电极121的截面为圆形,所述第二N-型欧姆接触电极122的截面呈弧形环绕所述第二P-型欧姆接触电极121的外周设置。
具体来说,所述第一P-型欧姆接触电极111与所述第二P-型欧姆接触电极121的结构可以相同,所述第一N-型欧姆接触电极112与所述第二N-型欧姆接触电极122的结构可以相同。以所述第一P-型欧姆接触电极111、所述第一N-型欧姆接触电极112为例,所述第一P-型欧姆接触电极111的截面呈圆形,所述第一N-型欧姆接触电极112的截面呈开环的环形、且围绕于所述第一P-型欧姆接触电极111的外围设置。
所述电阻23可以为N-型GaN薄膜电阻形式,也可以为所述第二GaN基场效应晶体管22的有源电阻形式,本领域技术人员可以根据实际需要进行选择。附图5是本发明具体实施方式中电阻的结构示意图。可选的,如图5所示,所述电阻23包括:
两个电阻电极232,位于所述衬底10表面;
电阻臂231,位于所述衬底10表面,且所述电阻臂231的两端与两个所述电阻电极232一一对应电连接。
具体来说,如图5所示,所述电阻23为N-型GaN薄膜电阻形式,包括平铺呈弯折状的所述电阻臂231、以及连接于所述电阻臂端部的所述电阻电极232。
不仅如此,本具体实施方式还提供了一种如上述任一项所述的单片光电集成电路的形成方法。附图6是本发明具体实施方式中单片光电集成电路的形成方法流程图,本具体实施方式形成的单片光电集成电路的结构可参见图1-图5。如图-图6所示,本具体实施方式提供的单片光电集成电路的形成方法,包括如下步骤:
步骤S61,提供一衬底10,并于所述衬底10表面定义光子集成器件区域1和外围电路区域2;
步骤S62,形成第一GaN基多量子阱光电PN结器件11于所述衬底10表面的所述光子集成器件区域1,用作单片光电集成电路中的发光二极管,所述第一GaN基多量子阱光电PN结器件11包括第一P-型欧姆接触电极111和第一N-型欧姆接触电极112;
形成第一GaN基场效应晶体管21于所述衬底10表面的外围电路区域2,所述第一GaN基场效应晶体管21包括位于所述衬底10表面且具有第一凹槽的第一栅极介质层31、填充于所述第一凹槽中的第一栅极211、以及位于所述第一栅极211相对两侧的第一源极212和第一漏极213;
电连接所述第一源极212与所述第一P-型欧姆接触电极111、所述第一漏极213与第一电位VDD1、所述第一N-型欧姆接触电极112与低于所述第一电位VDD1的第二电位VSS1、所述第一栅极211与控制端口24,以控制所述发光二极管的亮灭。
可选的,所述单片光电集成电路的形成方法还包括如下步骤:
形成第二GaN基多量子阱光电PN结器件12于所述衬底10表面的所述光子集成器件区域1,用作所述单片光电集成电路中的光电检测器,所述第二GaN基多量子阱光电PN结器件12包括第二P-型欧姆接触电极121和第二N-型欧姆接触电极122;
通过光波导13连接所述第一GaN基多量子阱光电PN结器件11与所述第二GaN基多量子阱光电PN结器件12;
形成第二GaN基场效应晶体管22于所述衬底10表面的外围电路区域2,所述第二GaN基场效应晶体管22包括位于所述衬底10表面且具有第二凹槽的第二栅极介质层、填充于所述第二凹槽中的第二栅极221、以及位于所述第二栅极221相对两侧的第二源极222和第二漏极223;
形成电阻23于所述衬底10表面的外围电路区域2;
电连接所述电阻23的一端电连接所述第二N-型欧姆接触电极122、另一端与第三电位VDD2、以及所述第二P-型欧姆接触电极121与低于所述第三电位VDD2的第四电位VSS2,同时所述第二N-型欧姆接触电极122与所述电阻23之间的电位电连接到所述第二栅极221,以控制所述第二GaN基场效应晶体管22的导通与否。
可选的,所述单片光电集成电路的形成方法还包括如下步骤:
形成AlGaN缓冲层14、以及位于所述AlGaN缓冲层14表面的未掺杂GaN层15于所述衬底10表面;
沉积N-型GaN材料于所述为掺杂的GaN层15表面,形成N-型GaN材料层;
刻蚀所述N-型GaN材料层,同时形成所述第一GaN基多量子阱光电PN结器件11的第一N-型GaN外延层113、所述第二GaN基多量子阱光电PN结器件12的第二N-型GaN外延层123和位于所述外围电路区域2的第三N-型GaN外延层32;
刻蚀所述第三N-型GaN外延层32,形成暴露所述未掺杂GaN层15的第一通孔和第二通孔;
形成覆盖所述第一通孔的内壁以及部分的所述第三N-型GaN外延层32表面的第一栅极介质层31、同时形成覆盖所述第二通孔的内壁以及部分的所述第三N-型GaN外延层32表面的第二栅极介质层。
以下举例说明所述单片光电集成电路的形成方法。可参见图1-图5,所述单片光电集成电路的形成方法,具体包括如下步骤:
1、选择硅基或者蓝宝石基氮化镓外延片作为基片,形成衬底2以及沿垂直于所述衬底10的方向依次叠置于所述衬底10表面的AlGaN缓冲层14、未掺杂GaN层15、N-型GaN材料层、InGaN/GaN多量子阱材料层和P-型GaN材料层;
2、涂覆第一光刻胶层于所述P-型GaN材料层表面并光刻,使得于第一光刻胶层中形成第一刻蚀窗口,所述第一刻蚀窗口与第一GaN基多量子阱光电PN结器件11与第一GaN基多量子阱光电PN结器件之间的间隔区域对应,采用ICP(电感耦合等离子体)干法刻蚀至所述N-型GaN材料层,去除第一光刻胶层;
3、涂覆第二光刻胶层于所述P-型GaN材料层表面并光刻,使得于第二光刻胶层中形成第二刻蚀窗口,沿所述第二刻蚀窗口进行ICP干法刻蚀至所述衬底10表面,形成用于分隔光子集成器件区域1和外围电路区域2的隔离槽,去除第二光刻胶层以及所述外围电路区域2中的所述InGaN/GaN多量子阱材料层和所述P-型GaN材料层;
4、涂覆第三光刻胶层于外围电路区域2的所述N-型GaN材料层表面并光刻,使得于第三光刻胶层中形成第三刻蚀窗口,沿所述第三刻蚀窗口刻蚀所述N-型GaN材料层至所述未掺杂GaN层15表面,形成第一通孔和第二通孔,去除第三光刻胶层;
5、涂覆第四光刻胶层于所述光子集成器件区域1和二所述外围电路区域2,并光刻去除用于形成所述第一GaN基场效应晶体管的第一源极区域、第一漏极区域、用于形成所述第二GaN基场效应晶体管的第二源极区域、第二漏极区域、电阻区域、第一N-型欧姆接触电极区域和第二N-型欧姆接触电极区域上方的所述第四光刻胶层;
6、电子束蒸发N-型欧姆接触金属,并除去所述第四光刻胶层,形成第一源极212、第一漏极213、第二源极222、第二漏极223、电阻23、第一N-型欧姆接触电极112和第二N-型欧姆接触电极122;
7、采用等离子体增强化学气相沉积(PECVD)工艺或者原子层沉积工艺(ALD)生长高质量的第一栅极介质层31于所述第一通孔内壁、以及生长高质量的第二栅极介质层于所述第二通孔内壁;
8、涂覆第五光刻胶层于所述光子集成器件区域1和二所述外围电路区域2,并光刻去除用于形成所述第一GaN基场效应晶体管的第一栅极区域、所述第二GaN基场效应晶体管的第二栅极区域、第一P型欧姆接触电极区域和第二P-型欧姆接触电极区域表面的第五光刻胶层;
9、电子束蒸发P-型欧姆接触金属,并除去所述第五光刻胶层,形成第一栅极211、第二栅极221、第一P-型欧姆接触电极111和第二P-型欧姆接触电极121;
10、去除所述第一GaN基多量子阱光电PN结器件11、所述第二GaN基多量子阱光电PN结器件12以及光波导13下方的部分衬底10、AlGaN缓冲层14和未掺杂GaN层15,形成空腔16。
本具体实施方式提供的单片光电集成电路及其形成方法,一方面,将第一GaN基多量子阱光电PN结器件与第一GaN基场效应晶体管集成在同一片衬底表面,利用GaN材料具有高电子迁移率、高热导率、高耐温、抗腐蚀以及抗辐射等优良特性,使得制备的单片光电集成电路中的第一GaN基多量子阱光电PN结器件与第一GaN基场效应晶体管具有高性能;另一方面,本发明提供的第一GaN基场效应晶体管无需使用复杂的离子注入技术进行制备加工过程中可以无需引入外延材料的生长,同时能够与第一GaN基多量子阱光电PN结器件的制备工艺完全兼容,从而有效降低了单片光电集成电路的加工难度。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员,在不脱离本发明原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。
Claims (10)
1.一种单片光电集成电路,其特征在于,包括:
衬底,包括光子集成器件区域和外围电路区域;
第一GaN基多量子阱光电PN结器件,位于所述衬底表面的所述光子集成器件区域,用作单片光电集成电路中的发光二极管,包括第一P-型欧姆接触电极和第一N-型欧姆接触电极;
第一GaN基场效应晶体管,位于所述衬底表面的外围电路区域,所述第一GaN基场效应晶体管包括位于所述衬底表面且具有第一凹槽的第一栅极介质层、填充于所述第一凹槽中的第一栅极、以及位于所述第一栅极相对两侧的第一源极和第一漏极;
所述第一源极电连接所述第一P-型欧姆接触电极,所述第一漏极用于与第一电位电连接,所述第一N-型欧姆接触电极用于与低于所述第一电位的第二电位电连接,所述第一栅极电连接控制端口,以控制所述发光二极管的亮灭。
2.根据权利要求1所述的单片光电集成电路,其特征在于,还包括:
第二GaN基多量子阱光电PN结器件,位于所述衬底表面的所述光子集成器件区域,用作所述单片光电集成电路中的光电检测器,包括第二P-型欧姆接触电极和第二N-型欧姆接触电极,且所述第二GaN基多量子阱光电PN结器件与所述第一GaN基多量子阱光电PN结器件通过光波导连接;
电阻,位于所述衬底表面的外围电路区域;
第二GaN基场效应晶体管,位于所述衬底表面的外围电路区域,所述第二GaN基场效应晶体管包括位于所述衬底表面且具有第二凹槽的第二栅极介质层、填充于所述第二凹槽中的第二栅极、以及位于所述第二栅极相对两侧的第二源极和第二漏极;
所述电阻的一端电连接所述第二N-型欧姆接触电极、另一端用于与第三电位电连接,所述第二P-型欧姆接触电极用于与低于所述第三电位的第四电位电连接,所述第二N-型欧姆接触电极与所述电阻之间的电位电连接到所述第二栅极,以控制所述第二GaN基场效应晶体管的导通与否。
3.根据权利要求2所述的单片光电集成电路,其特征在于,所述衬底表面还包括AlGaN缓冲层、以及位于所述AlGaN缓冲层表面的未掺杂GaN层;所述单片光电集成电路还包括一自所述衬底贯穿所述AlGaN缓冲层和所述未掺杂GaN层的空腔,所述光波导为悬于所述空腔上方的GaN固支梁结构,所述第一GaN基多量子阱光电PN结器件和所述第二GaN基多量子阱光电PN结器件形成于所述未掺杂GaN层表面、且均悬于所述空腔上方。
4.根据权利要求3所述的单片光电集成电路,其特征在于,所述第一GaN基多量子阱光电PN结器件还包括沿垂直于所述衬底的方向依次叠置的第一N-型GaN外延层、第一InGaN/GaN多量子阱层和第一P-型GaN外延层,所述第二GaN基多量子阱光电PN结器件还包括沿垂直于所述衬底的方向依次叠置的第二N-型GaN外延层、第二InGaN/GaN多量子阱层和第二P-型GaN外延层;
在外围电路区域,还包括设置于所述未掺杂GaN层表面的第三N-型GaN外延层,所述第一源极、所述第一漏极、所述第二源极和所述第二漏极均设置于所述第三N-型GaN外延层表面;
所述第三N-型GaN外延层中具有暴露所述未掺杂GaN层的第一通孔和第二通孔,所述第一栅极介质层覆盖所述第一通孔的内壁以及部分的所述第三N-型GaN外延层表面,所述第二栅极介质层覆盖所述第二通孔的内壁以及部分的所述第三N-型GaN外延层表面。
5.根据权利要求3所述的单片光电集成电路,其特征在于,还包括:
贯穿所述未掺杂GaN层和所述AlGaN缓冲层并暴露所述衬底的隔离槽,所述隔离槽用于隔离所述光子集成器件区域和所述外围电路区域。
6.根据权利要求2所述的单片光电集成电路,其特征在于,在沿平行于所述衬底的方向上,所述第一P-型欧姆接触电极的截面为圆形,所述第一N-型欧姆接触电极的截面呈弧形环绕所述第一P-型欧姆接触电极的外周设置;
在沿平行于所述衬底的方向上,所述第二P-型欧姆接触电极的截面为圆形,所述第二N-型欧姆接触电极的截面呈弧形环绕所述第二P-型欧姆接触电极的外周设置。
7.根据权利要求2所述的单片光电集成电路,其特征在于,所述电阻包括:
两个电阻电极,位于所述衬底表面;
电阻臂,位于所述衬底表面,且所述电阻臂的两端与两个所述电阻电极一一对应电连接。
8.一种如权利要求1-7中任一项所述的单片光电集成电路的形成方法,其特征在于,包括如下步骤:
提供一衬底,并于所述衬底表面定义光子集成器件区域和外围电路区域;
形成第一GaN基多量子阱光电PN结器件于所述衬底表面的所述光子集成器件区域,用作单片光电集成电路中的发光二极管,所述第一GaN基多量子阱光电PN结器件包括第一P-型欧姆接触电极和第一N-型欧姆接触电极;
形成第一GaN基场效应晶体管于所述衬底表面的外围电路区域,所述第一GaN基场效应晶体管包括位于所述衬底表面且具有第一凹槽的第一栅极介质层、填充于所述第一凹槽中的第一栅极、以及位于所述第一栅极相对两侧的第一源极和第一漏极;
电连接所述第一源极与所述第一P-型欧姆接触电极、所述第一漏极与第一电位、所述第一N-型欧姆接触电极与低于所述第一电位的第二电位、所述第一栅极与控制端口,以控制所述发光二极管的亮灭。
9.根据权利要求8所述的单片光电集成电路的形成方法,其特征在于,还包括如下步骤:
形成第二GaN基多量子阱光电PN结器件于所述衬底表面的所述光子集成器件区域,用作所述单片光电集成电路中的光电检测器,所述第二GaN基多量子阱光电PN结器件包括第二P-型欧姆接触电极和第二N-型欧姆接触电极;
通过光波导连接所述第一GaN基多量子阱光电PN结器件与所述第二GaN基多量子阱光电PN结器件;
形成第二GaN基场效应晶体管于所述衬底表面的外围电路区域,所述第二GaN基场效应晶体管包括位于所述衬底表面且具有第二凹槽的第二栅极介质层、填充于所述第二凹槽中的第二栅极、以及位于所述第二栅极相对两侧的第二源极和第二漏极;
形成电阻于所述衬底表面的外围电路区域;
电连接所述电阻的一端电连接所述第二N-型欧姆接触电极、另一端与第三电位、以及所述第二P-型欧姆接触电极与低于所述第三电位的第四电位,同时所述第二N-型欧姆接触电极与所述电阻之间的电位电连接到所述第二栅极,以控制所述第二GaN基场效应晶体管的导通与否。
10.根据权利要求9所述的单片光电集成电路的形成方法,其特征在于,还包括如下步骤:
形成AlGaN缓冲层、以及位于所述AlGaN缓冲层表面的未掺杂GaN层于所述衬底表面;
沉积N-型GaN材料于所述为掺杂的GaN层表面,形成N-型GaN材料层;
刻蚀所述N-型GaN材料层,同时形成所述第一GaN基多量子阱光电PN结器件的第一N-型GaN外延层、所述第二GaN基多量子阱光电PN结器件的第二N-型GaN外延层和位于所述外围电路区域的第三N-型GaN外延层;
刻蚀所述第三N-型GaN外延层,形成暴露所述未掺杂GaN层的第一通孔和第二通孔;
形成覆盖所述第一通孔的内壁以及部分的所述第三N-型GaN外延层表面的第一栅极介质层、同时形成覆盖所述第二通孔的内壁以及部分的所述第三N-型GaN外延层表面的第二栅极介质层。
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