CN111344845A - 半导体工艺片及半导体封装体制造方法 - Google Patents

半导体工艺片及半导体封装体制造方法 Download PDF

Info

Publication number
CN111344845A
CN111344845A CN201880074101.XA CN201880074101A CN111344845A CN 111344845 A CN111344845 A CN 111344845A CN 201880074101 A CN201880074101 A CN 201880074101A CN 111344845 A CN111344845 A CN 111344845A
Authority
CN
China
Prior art keywords
semiconductor
adhesive
chip
layer
sealing material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
CN201880074101.XA
Other languages
English (en)
Chinese (zh)
Inventor
志贺豪士
佐藤慧
高本尚英
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nitto Denko Corp
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Publication of CN111344845A publication Critical patent/CN111344845A/zh
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00Layered products comprising a layer of synthetic resin
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00Adhesives in the form of films or foils
    • C09J7/30Adhesives in the form of films or foils characterised by the adhesive composition
    • C09J7/38Pressure-sensitive adhesives [PSA]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52Mounting semiconductor bodies in containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/20Structure, shape, material or disposition of high density interconnect preforms
    • H01L2224/21Structure, shape, material or disposition of high density interconnect preforms of an individual HDI interconnect
    • H01L2224/214Connecting portions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/96Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • H01L2924/1816Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18162Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Adhesive Tapes (AREA)
  • Dicing (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Laminated Bodies (AREA)
  • Die Bonding (AREA)
  • Control And Other Processes For Unpacking Of Materials (AREA)
CN201880074101.XA 2017-11-16 2018-09-05 半导体工艺片及半导体封装体制造方法 Withdrawn CN111344845A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2017-220856 2017-11-16
JP2017220856A JP7095978B2 (ja) 2017-11-16 2017-11-16 半導体プロセスシートおよび半導体パッケージ製造方法
PCT/JP2018/032933 WO2019097819A1 (ja) 2017-11-16 2018-09-05 半導体プロセスシートおよび半導体パッケージ製造方法

Publications (1)

Publication Number Publication Date
CN111344845A true CN111344845A (zh) 2020-06-26

Family

ID=66538976

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201880074101.XA Withdrawn CN111344845A (zh) 2017-11-16 2018-09-05 半导体工艺片及半导体封装体制造方法

Country Status (5)

Country Link
JP (1) JP7095978B2 (ja)
KR (1) KR102600254B1 (ja)
CN (1) CN111344845A (ja)
TW (1) TWI772520B (ja)
WO (1) WO2019097819A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114958226A (zh) * 2021-02-25 2022-08-30 日东电工株式会社 光半导体元件密封用片

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11538787B2 (en) * 2020-10-30 2022-12-27 Advanced Semiconductor Engineering, Inc. Method and system for manufacturing a semiconductor package structure
JP2022170157A (ja) 2021-04-28 2022-11-10 日東電工株式会社 熱硬化性樹脂組成物、熱硬化性シート、及び、半導体チップ被覆部材

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1264173A (zh) * 1999-02-03 2000-08-23 卡西欧计算机株式会社 半导体装置及制做方法
JP2005028734A (ja) * 2003-07-11 2005-02-03 Nitto Denko Corp 積層シート
CN101083235A (zh) * 2006-06-02 2007-12-05 索尼株式会社 半导体装置及半导体装置的制造方法
CN103137501A (zh) * 2011-11-28 2013-06-05 日东电工株式会社 半导体装置的制造方法
JP2013157470A (ja) * 2012-01-30 2013-08-15 Sekisui Chem Co Ltd 半導体部品の製造方法
CN104733400A (zh) * 2013-12-24 2015-06-24 日东电工株式会社 切割/芯片接合薄膜、半导体装置的制造方法以及半导体装置
US20160035667A1 (en) * 2014-07-30 2016-02-04 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of Packaging Semiconductor Devices and Packaged Semiconductor Devices
CN107017173A (zh) * 2015-11-13 2017-08-04 日东电工株式会社 半导体封装体的制造方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001313350A (ja) * 2000-04-28 2001-11-09 Sony Corp チップ状電子部品及びその製造方法、並びにその製造に用いる疑似ウエーハ及びその製造方法
US8258624B2 (en) 2007-08-10 2012-09-04 Intel Mobile Communications GmbH Method for fabricating a semiconductor and semiconductor package
JP5224111B2 (ja) 2008-08-29 2013-07-03 日立化成株式会社 半導体ウェハ加工用接着フィルム
US20110198762A1 (en) 2010-02-16 2011-08-18 Deca Technologies Inc. Panelized packaging with transferred dielectric
JP2012227441A (ja) 2011-04-21 2012-11-15 Sumitomo Bakelite Co Ltd 半導体装置の製造方法および半導体装置
JP5837381B2 (ja) * 2011-09-28 2015-12-24 日東電工株式会社 半導体装置の製造方法
JP2013074184A (ja) * 2011-09-28 2013-04-22 Nitto Denko Corp 半導体装置の製造方法
KR20130103950A (ko) * 2012-03-12 2013-09-25 닛토덴코 가부시키가이샤 반도체 장치 제조용 내열성 점착 테이프 및 그 테이프를 사용한 반도체 장치의 제조 방법
KR20130103947A (ko) * 2012-03-12 2013-09-25 닛토덴코 가부시키가이샤 반도체 장치 제조용 내열성 점착 테이프 및 그 테이프를 사용한 반도체 장치의 제조 방법
JPWO2014156324A1 (ja) * 2013-03-27 2017-02-16 古河電気工業株式会社 有機電子デバイス用素子封止用樹脂組成物、有機電子デバイス用素子封止用樹脂シート、有機エレクトロルミネッセンス素子、及び画像表示装置
JP6167612B2 (ja) 2013-03-29 2017-07-26 住友ベークライト株式会社 接着シートおよび電子部品
JPWO2015064574A1 (ja) * 2013-10-30 2017-03-09 リンテック株式会社 半導体接合用接着シートおよび半導体装置の製造方法
JP2015126124A (ja) 2013-12-26 2015-07-06 日東電工株式会社 半導体パッケージの製造方法
JP6530213B2 (ja) * 2014-07-22 2019-06-12 日東電工株式会社 シート状樹脂組成物、裏面研削用テープ一体型シート状樹脂組成物、及び、半導体装置の製造方法
US9281286B1 (en) 2014-08-27 2016-03-08 Freescale Semiconductor Inc. Microelectronic packages having texturized solder pads and methods for the fabrication thereof
JP2017088782A (ja) 2015-11-13 2017-05-25 日東電工株式会社 積層体および合同体・組み合わせの回収方法・半導体装置の製造方法

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1264173A (zh) * 1999-02-03 2000-08-23 卡西欧计算机株式会社 半导体装置及制做方法
JP2005028734A (ja) * 2003-07-11 2005-02-03 Nitto Denko Corp 積層シート
CN1577821A (zh) * 2003-07-11 2005-02-09 日东电工株式会社 层压片
CN101083235A (zh) * 2006-06-02 2007-12-05 索尼株式会社 半导体装置及半导体装置的制造方法
CN103137501A (zh) * 2011-11-28 2013-06-05 日东电工株式会社 半导体装置的制造方法
JP2013157470A (ja) * 2012-01-30 2013-08-15 Sekisui Chem Co Ltd 半導体部品の製造方法
CN104733400A (zh) * 2013-12-24 2015-06-24 日东电工株式会社 切割/芯片接合薄膜、半导体装置的制造方法以及半导体装置
US20160035667A1 (en) * 2014-07-30 2016-02-04 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of Packaging Semiconductor Devices and Packaged Semiconductor Devices
CN107017173A (zh) * 2015-11-13 2017-08-04 日东电工株式会社 半导体封装体的制造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114958226A (zh) * 2021-02-25 2022-08-30 日东电工株式会社 光半导体元件密封用片

Also Published As

Publication number Publication date
KR20200085842A (ko) 2020-07-15
TW201923995A (zh) 2019-06-16
KR102600254B1 (ko) 2023-11-08
WO2019097819A1 (ja) 2019-05-23
JP7095978B2 (ja) 2022-07-05
TWI772520B (zh) 2022-08-01
JP2019091845A (ja) 2019-06-13

Similar Documents

Publication Publication Date Title
JP5666335B2 (ja) 保護層形成用フィルム
JP5830250B2 (ja) 半導体装置の製造方法
JP4810565B2 (ja) ダイシング・ダイボンドフィルム及び半導体装置の製造方法
JP5437111B2 (ja) ダイボンドフィルム、ダイシング・ダイボンドフィルム及び半導体装置
JP6068386B2 (ja) 熱硬化型ダイボンドフィルム、ダイシング・ダイボンドフィルム及び半導体装置の製造方法
US20100129986A1 (en) Dicing die-bonding film and process for producing semiconductor device
KR20170095947A (ko) 다이싱 시트, 다이싱·다이 본드 필름 및 반도체 장치의 제조 방법
JP5696205B2 (ja) ダイボンドフィルム、ダイシング・ダイボンドフィルム及び半導体装置
TWI820080B (zh) 半導體背面密接膜及切晶帶一體型半導體背面密接膜
JP2015092594A (ja) 保護層形成用フィルム
CN111334212A (zh) 粘接薄膜、带有切割带的粘接薄膜、及半导体装置制造方法
JP7438740B2 (ja) 半導体プロセスシート
JP7064184B2 (ja) ダイシングテープ一体型封止用シート及び半導体装置の製造方法
CN111344845A (zh) 半导体工艺片及半导体封装体制造方法
KR101518095B1 (ko) 플립 칩형 반도체 이면용 필름, 다이싱 테이프 일체형 반도체 이면용 필름, 반도체 장치의 제조 방법 및 플립 칩형 반도체 장치
TWI796391B (zh) 切晶帶一體型半導體背面密接膜
JP6574685B2 (ja) ダイシング・ダイボンドフィルム及び半導体装置の製造方法
CN111276439A (zh) 切割芯片接合薄膜
JP7438741B2 (ja) 半導体プロセスシート
TWI839475B (zh) 熱硬化性黏接著膜、半導體製程用片材、及半導體封裝製造方法
JP7333257B2 (ja) 半導体背面密着フィルム
JP7229815B2 (ja) 熱硬化性粘接着フィルム、半導体プロセスシート、および半導体パッケージ製造方法
JP2015103579A (ja) 熱硬化型ダイボンドフィルム、ダイシングシート付きダイボンドフィルム、及び、半導体装置の製造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
WW01 Invention patent application withdrawn after publication

Application publication date: 20200626

WW01 Invention patent application withdrawn after publication