CN111312671A - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
- Publication number
- CN111312671A CN111312671A CN201911204638.6A CN201911204638A CN111312671A CN 111312671 A CN111312671 A CN 111312671A CN 201911204638 A CN201911204638 A CN 201911204638A CN 111312671 A CN111312671 A CN 111312671A
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- China
- Prior art keywords
- solder
- bonding
- solders
- semiconductor device
- bonding region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 63
- 229910000679 solder Inorganic materials 0.000 claims abstract description 155
- 230000020169 heat generation Effects 0.000 claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 239000010949 copper Substances 0.000 claims description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 8
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 8
- 229910052802 copper Inorganic materials 0.000 claims description 8
- 229910052709 silver Inorganic materials 0.000 claims description 8
- 239000004332 silver Substances 0.000 claims description 8
- 229910052797 bismuth Inorganic materials 0.000 claims description 7
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 claims description 7
- 229910052738 indium Inorganic materials 0.000 claims description 7
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 7
- 238000007711 solidification Methods 0.000 claims description 7
- 230000008023 solidification Effects 0.000 claims description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 5
- 229910052787 antimony Inorganic materials 0.000 claims description 2
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims 1
- 229910052725 zinc Inorganic materials 0.000 claims 1
- 239000011701 zinc Substances 0.000 claims 1
- 230000017525 heat dissipation Effects 0.000 abstract description 19
- 239000000203 mixture Substances 0.000 abstract description 4
- 238000000034 method Methods 0.000 abstract description 3
- 230000035882 stress Effects 0.000 description 16
- 239000000463 material Substances 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 239000012141 concentrate Substances 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000008014 freezing Effects 0.000 description 1
- 238000007710 freezing Methods 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
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Abstract
本发明的目的在于提供一种能够提高半导体装置的散热性或者可靠性的技术。半导体装置(1)具有:基板(6);多个焊料(7a、7b),它们相互相邻且成分及浓度的至少一个相互不同;以及半导体芯片(8),其具有通过多个焊料(7a、7b)而与基板(6)接合的接合面。半导体芯片(8)的接合面包含半导体芯片(8)的发热或者对接合对象的应力相互不同的多个接合区域(8a、8b),多个焊料(7a、7b)与多个接合区域(8a、8b)对应地配设。
Description
技术领域
本发明涉及一种具有焊料的半导体装置。
背景技术
就功率模块而言,为了高输出化以及低损耗化,半导体元件的薄化正在发展。为了适当地进行该薄化,散热性的控制、可靠性的提高是重要的。例如,专利文献1的技术通过使焊料的厚度在每个区域不同,来缓和热应力,提高可靠性。
专利文献1:日本特开2015-015335号公报
但是,根据半导体装置的设计,有时不能使焊料的厚度不同。另外,如果使焊料的厚度不同,则焊料的厚度局部变大,其结果,有时散热性降低。
发明内容
因此,本发明是鉴于上述问题而提出的,其目的在于,提供一种能够提高半导体装置的散热性或者可靠性的技术。
本发明涉及的半导体装置具有:基板;多个焊料,它们配设于所述基板之上且相互相邻,该多个焊料的成分及浓度的至少一个相互不同;以及半导体芯片,其具有通过所述多个焊料而与所述基板接合的接合面,所述半导体芯片的所述接合面包含所述半导体芯片的发热或者对接合对象的应力相互不同的多个接合区域,所述多个焊料与所述多个接合区域对应地配设。
发明的效果
根据本发明,由于多个焊料与多个接合区域对应地配设,所以能够提高半导体装置的散热性或者可靠性。
附图说明
图1是表示实施方式1涉及的半导体装置的结构的俯视图。
图2是表示实施方式1涉及的半导体装置的结构的剖面图。
图3是表示实施方式2涉及的半导体装置的结构的俯视图。
图4是表示实施方式2涉及的半导体装置的结构的剖面图。
图5是表示变形例涉及的半导体装置的结构的俯视图。
标号的说明
1半导体装置,6基板,7a第一焊料,7a1空间,7a2开口,7b第二焊料,8半导体芯片,8a第一接合区域,8b第二接合区域。
具体实施方式
<实施方式1>
图1是表示本发明的实施方式1涉及的半导体装置1的结构的俯视图,图2是沿着图1的A-A线的剖面图。如图1及图2所示,半导体装置1具有基板6、多个焊料7a、7b、7c以及半导体芯片8。
多个焊料7a、7b、7c配设于基板6之上且相互相邻。在本实施方式1中,多个焊料7a、7b、7c包含第一焊料7a、第二焊料7b、第三焊料7c。第一焊料7a具有在俯视观察时不存在第一焊料7a的空间7a1,并且除了与空间7a1连通的开口7a2以外在俯视观察时第一焊料7a围绕空间7a1。第二焊料7b配设于开口7a2,第三焊料7c被第一焊料7a以及第二焊料7b完全地围绕。
在本实施方式1中,多个焊料7a、7b、7c的成分以及浓度的至少一个相互不同。在此,对多个焊料7a、7b、7c的成分相互不同的结构进行说明,多个焊料7a、7b、7c的浓度相互不同的结构将在后面进行说明。此外,优选第一焊料7a自身的成分以及浓度均匀,这对于第二焊料7b以及第三焊料7c也是同样的。
在多个焊料7a、7b、7c的成分相互不同的结构中,多个焊料7a、7b、7c以相互不同的组合包含锑(Sb)、镍(Ni)、铋(Bi)、铟(In)以及锌(Zn)。虽然略微依赖于浓度、组合,但通常存在下述倾向,即,包含铋及铟的焊料的机械强度及凝固点比不含铋及铟的焊料的机械强度及凝固点低。另外,通常在将相邻的熔融中的多种焊料一齐冷却的情况下,存在下述倾向,即,在凝固点(最终凝固点)低的焊料处体积收缩容易集中,容易产生使散热性恶化的缩孔10(图1)。
在本实施方式1中,第三焊料7c包含铋及铟这两者,第一焊料7a包含铋及铟中的一者,第二焊料7b不包含铋及铟。因此,第三焊料7c由于不易产生缩孔因而热导率最高,第一焊料7a由于在不易产生缩孔方面仅次于第三焊料7c因而热导率仅次于第三焊料7c,第二焊料7b由于容易产生缩孔因而热导率最低。
半导体芯片8具有通过多个焊料7a、7b、7c而与基板6接合的接合面。该接合面包含半导体芯片8的发热相互不同的多个接合区域8a、8b、8c,多个接合区域8a、8b、8c包含第一接合区域8a、第二接合区域8b、第三接合区域8c。
多个焊料7a、7b、7c与半导体芯片8的多个接合区域8a、8b、8c对应地进行配设。在本实施方式1中,与第三焊料7c对应的第三接合区域8c的发热最高,与第一焊料7a对应的第一接合区域8a的发热次高,与第二焊料7b对应的第二接合区域8b的发热最低。由此,在发热高的接合区域配设不易产生缩孔且散热性高的焊料,在发热低的接合区域配设容易产生缩孔且散热性低的焊料。因此,根据本实施方式1,能够提高半导体装置1的散热性。
此外,在多个焊料7a、7b、7c全部使用不易产生缩孔且散热性高的焊料的情况下,不是在第二焊料7b,而是在需要高散热性的第一焊料7a产生缩孔的可能性变高。与此相对,在本实施方式1中,第二焊料7b使用容易产生缩孔且散热性低的焊料。通过在第二焊料7b产生缩孔,从而能够抑制第一焊料7a的体积收缩,因此,能够降低在需要高散热性的第一焊料7a产生缩孔的可能性。
以上,对多个焊料7a、7b、7c的成分相互不同的结构进行了说明。接着,对多个焊料7a、7b、7c的浓度相互不同的结构进行说明。在多个焊料7a、7b、7c的浓度相互不同的结构中,多个焊料7a、7b、7c包含铜(Cu)或银(Ag),多个焊料7a、7b、7c的铜或银的浓度相互相差大于或等于0.5%。通常存在下述倾向,即,焊料所包含的铜或银的浓度越高,焊料的热导率越高。
在本实施方式1中,第三焊料7c的铜或银的浓度最高,第一焊料7a的铜或银的浓度次高,第二焊料7b的铜或银的浓度最低。因此,在多个焊料7a、7b、7c中,第三焊料7c的热导率最高,第一焊料7a的热导率次高,第二焊料7b的热导率最低。即使是这样的结构,也与上述的结构同样,在发热高的接合区域配设不易产生缩孔且散热性高的焊料,在发热低的接合区域配设容易产生缩孔且散热性低的焊料,因此,能够提高半导体装置1的散热性。
此外,在上述结构中,多个焊料7a、7b、7c的成分以及浓度的一个相互不同。但是,也可以是多个焊料7a、7b、7c的成分以及浓度这两者都相互不同的结构。即使是这样的结构,也能够与上述结构同样地提高半导体装置1的散热性。
<实施方式2>
图3是表示本发明的实施方式2涉及的半导体装置1的结构的俯视图。下面,对本实施方式2涉及的结构要素中的与上述结构要素相同或者类似的结构要素标注相同的参照标号,主要对不同的结构要素进行说明。
在本实施方式2中,多个焊料7a、7b包含第一焊料7a和第二焊料7b。第一焊料7a具有在俯视观察时不存在第一焊料7a的空间7a1,并且在俯视观察时第一焊料7a围绕空间7a1。第二焊料7b配设于空间7a1。优选第一焊料7a自身的成分以及浓度均匀,这对于第二焊料7b也是同样的。
另外,在本实施方式2中,与实施方式1同样地,多个焊料7a、7b的成分以及浓度的至少一个相互不同。其结果是,根据在实施方式1中说明的理由,第一焊料7a的凝固点比第二焊料7b的凝固点高。另外,第一焊料7a的机械强度比第二焊料7b的机械强度高,第二焊料7b的热导率比第一焊料7a的热导率高。
图4是表示第一焊料7a以及第二焊料7b凝固前的半导体装置1的状态的剖面图。如图4所示,半导体芯片8以向与多个焊料7a、7b相反侧突出的方式弯曲状地翘曲。
根据以上那样的本实施方式2涉及的半导体装置1的结构,第二焊料7b的整周被凝固点比第二焊料7b高的第一焊料7a围绕。根据这样的结构,在形成半导体装置1时,凝固点低的第二焊料7b在被凝固点高且先凝固的第一焊料7a圈入的状态下凝固。由此,凝固点低的第二焊料7b的体积收缩被抑制,因此,能够抑制第二焊料7b中的缩孔(空隙)的产生。另外,由于与收缩相应量的体积被半导体芯片8的上述翘曲抵消,所以也能够降低半导体芯片8的翘曲。另外,通过这样的翘曲的降低,能够降低热阻。
以上的结果是,半导体芯片8的接合面包含对接合对象的应力相互不同的多个接合区域8a、8b,即第一接合区域8a和第二接合区域8b。在本实施方式2中,多个焊料7a、7b与半导体芯片8的多个接合区域8a、8b对应地配设。例如,第一接合区域8a对与第一接合区域8a对应的第一焊料7a施加第一应力,第二接合区域8b对与第二接合区域8b对应的第二焊料7b施加与第一应力不同的第二应力。第二应力可以小于第一应力,也可以大于第一应力。根据这样的结构,如上所述,能够提高半导体装置1的散热性。
另外,在本实施方式2中,机械强度不同的第一焊料7a以及第二焊料7b选择性地配设于应力不同的第一接合区域8a以及第二接合区域8b。而且,例如,第一焊料7a及第二焊料7b的机械强度的大小关系与第一接合区域8a及第二接合区域8b的应力的大小关系一致。根据这样的结构,能够抑制焊料的横裂,因此,能够提高半导体装置1的可靠性。此外,在实施方式1中也能够实现该结构。
并且,在本实施方式2中,热导率不同的第一焊料7a以及第二焊料7b选择性地配设于应力不同的第一接合区域8a以及第二接合区域8b。而且,例如,第一焊料7a以及第二焊料7b的热导率的大小关系与第一接合区域8a以及第二接合区域8b的应力的大小关系一致。根据这样的结构,能够提高半导体芯片8的发热大的中央部的散热性,因此,能够进一步提高半导体装置1的可靠性。此外,在实施方式1中也能够实现该结构。
<变形例>
在以上的说明中,将图1那样的焊料的配置应用于半导体芯片8的发热相互不同的多个接合区域,但也可以将图3那样的焊料的配置应用于该接合区域。同样地,虽然将图3那样的焊料的配置应用于对接合对象的应力相互不同的多个接合区域,但也可以将图1那样的焊料的配置应用于该接合区域。
另外,在以上的说明中,虽然将图1那样的焊料的配置应用于半导体芯片8的发热相互不同的多个接合区域,但也可以将其应用于半导体芯片8的发热相互不同的多个接合区域与对接合对象的应力相互不同的多个接合区域的组合。同样地,虽然将图3那样的焊料的配置应用于半导体芯片8的发热相互不同的多个接合区域,但也可以将其应用于半导体芯片8的发热相互不同的多个接合区域与对接合对象的应力相互不同的多个接合区域的组合。
另外,在以上的说明中,俯视观察时的焊料的形状为四边形,但也可以是除此以外的多边形,还可以是圆形或者图5那样的椭圆形。
另外,本发明在其发明范围内,能够自由地对各实施方式以及各变形例进行组合,或者适当地对各实施方式以及各变形例进行变形、省略。
Claims (8)
1.一种半导体装置,其具有:
基板;
多个焊料,它们配设于所述基板之上且相互相邻,该多个焊料的成分及浓度的至少一个相互不同;以及
半导体芯片,其具有通过所述多个焊料而与所述基板接合的接合面,
所述半导体芯片的所述接合面包含所述半导体芯片的发热或者对接合对象的应力相互不同的多个接合区域,
所述多个焊料与所述多个接合区域对应地配设。
2.根据权利要求1所述的半导体装置,其中,
所述多个焊料包含第一焊料以及第二焊料,
所述第一焊料具有在俯视观察时不存在所述第一焊料的空间,并且,除了与所述空间连通的开口以外在俯视观察时所述第一焊料围绕所述空间,
所述第二焊料配设于所述开口。
3.根据权利要求1所述的半导体装置,其中,
所述多个焊料包含第一焊料以及第二焊料,
所述第一焊料具有在俯视观察时不存在所述第一焊料的空间,并且,在俯视观察时所述第一焊料围绕所述空间,
所述第二焊料配设于所述空间。
4.根据权利要求3所述的半导体装置,其中,
所述第一焊料的凝固点比所述第二焊料的凝固点高,
所述多个接合区域包含:
第一接合区域,其与所述第一焊料对应,对所述第一焊料施加第一应力;以及
第二接合区域,其与所述第二焊料对应,对所述第二焊料施加与所述第一应力不同的第二应力。
5.根据权利要求2或3所述的半导体装置,其中,
所述多个接合区域包含应力不同的第一接合区域以及第二接合区域,
机械强度不同的所述第一焊料以及所述第二焊料选择性地配设于所述第一接合区域以及所述第二接合区域。
6.根据权利要求2或3所述的半导体装置,其中,
所述多个接合区域包含应力不同的第一接合区域以及第二接合区域,
热导率不同的所述第一焊料以及所述第二焊料选择性地配设于所述第一接合区域以及所述第二接合区域。
7.根据权利要求1至6中任一项所述的半导体装置,其中,
所述多个焊料包含铜或银,
所述多个焊料的铜或银的浓度相互相差大于或等于0.5%。
8.根据权利要求1至7中任一项所述的半导体装置,其中,
所述多个焊料以相互不同的组合包含锑、镍、铋、铟以及锌。
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