CN111211167B - 一种消除负阻效应的rc-igbt器件结构 - Google Patents

一种消除负阻效应的rc-igbt器件结构 Download PDF

Info

Publication number
CN111211167B
CN111211167B CN202010023986.XA CN202010023986A CN111211167B CN 111211167 B CN111211167 B CN 111211167B CN 202010023986 A CN202010023986 A CN 202010023986A CN 111211167 B CN111211167 B CN 111211167B
Authority
CN
China
Prior art keywords
type
buffer layer
igbt device
collector region
negative resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202010023986.XA
Other languages
English (en)
Other versions
CN111211167A (zh
Inventor
王颖
张孝冬
于成浩
曹菲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hangzhou Dianzi University
Original Assignee
Hangzhou Dianzi University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hangzhou Dianzi University filed Critical Hangzhou Dianzi University
Priority to CN202010023986.XA priority Critical patent/CN111211167B/zh
Publication of CN111211167A publication Critical patent/CN111211167A/zh
Application granted granted Critical
Publication of CN111211167B publication Critical patent/CN111211167B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]

Abstract

本发明提供了一种消除负阻效应的RC‑IGBT器件。该RC‑IGBT器件与传统器件相比，在N型集电区和P型集电区上方有混合交替排列的N型和P+型缓冲层，且最靠近N型集电区的P+柱边缘超过N型缓冲层。由于上述混合交替排列N型和P型的缓冲层对场截止区的多区段的隔离作用，电子或空穴需要爬过多个P型区域，增长了载流子运动路径，从而增大了RC‑IGBT器件在导通初期N型集电区上方电势差，使得该PN结更容易开启，器件更容易从单极导通转换为双极导通，进而抑制了RC‑IGBT器件在导通初期所产生的Snapback效应。

Description

一种消除负阻效应的RC-IGBT器件结构
技术领域
本发明涉及半导体技术领域，具体而言，涉及一种消除负阻效应的RC-IGBT器件结构。
背景技术
绝缘栅双极型晶体管(IGBT)，是一种集成了MOS(绝缘栅型场效应晶体管)控制和双极导通BJT(双极型晶体管)组成的功率半导体器件，相比传统VDMOS器件，IGBT具有电导调制作用，是一种双极器件。具有MOSFET的输入阻抗高、控制功率小、驱动电路简单、开关速度高、开关损耗小的优点，同时具有双极功率晶体管的电流密度大、饱和压降低、电流处理能力强的优点。
电力电子系统中，IGBT通常需要与反向并联的快恢复二极管(Fast RecoveryDiode，简称为FRD)配合使用。因此将FRD与IGBT单片地集成在一起的逆导型IGBT(ReverseConductive IGBT)近年来得到了国内外的广泛关注。由于单片集成的IGBT和FRD共用同一个结终端，因此RC-IGBT大大提高了硅片的利用率，降低了成本，并且避免了互连引线等的寄生效应，提高了器件的可靠性。相对传统IGBT器件，RC-IGBT在成本和性能上的巨大优势，使得该器件具备了巨大的发展潜力。在关断瞬态期间，RC-IGBT的N型集电区为漂移区残留的载流子提供了一条快速抽走的通道，因此可以大大减少关断时间。然而，传统RC-IGBT在正向导通初期，器件由单极导通向双极导通转换过程中，会存在一个负阻区，称作Snapback现象，严重时导致器件无法开启，对器件可靠性及性能造成危害。
发明内容
本发明的主要目的在于提供一种消除负阻效应的RC-IGBT器件结构，以解决现有技术中的RC-IGBT在正向导通初期产生的snapback现象，从而对器件可靠性及性能造成危害的问题。
本发明一种消除负阻效应的RC-IGBT器件结构，传统的RC-IGBT器件通过离子注入在N型衬底背面形成一定厚度的N-buffer层，N-buffer层的宽度小于N-漂移区的宽度；一定厚度的N-buffer层通过离子注入形成P+柱，进而形成一个N-buffer层内部下沿带有多个P+柱的混合交替排列N型和P型的缓冲层；N型集电区和P型集电区被空隙分隔开，所述的N型集电区上方的P+柱不与P型集电区接触；N-buffer层中最靠近N型集电区一侧的P+柱边缘超出N-buffer层。
作为优选，所述的P+柱数量为三个。
作为优选，所述的离子注入一定厚度的N-buffer层的掺杂浓度为1×1016cm-3，厚度为6μm。
作为优选，所述的离子注入一定厚度的N-buffer层的N型集电区上方的开口宽度为1.2μm。
作为优选，所述的离子注入一定厚度的混合P+/N-buffer层的P+型掺杂浓度为1×1017cm-3，厚度为5μm。
本发明的有益效果在于：由于上述混合交替排列N型和P型的缓冲层对场截止区的多区段的隔离作用，载流子需要爬过多个P型区域，增长了载流子运动路径，从而增大了RC-IGBT器件在导通初期N型集电区上方电势差，使得该PN结更容易开启，器件更容易从单极导通转换为双极导通，进而抑制了RC-IGBT器件在导通初期所产生的Snapback效应。
附图说明
图1示出了传统RC-IGBT结构示意图；
图2示出了基于本发明设计的RC-IGBT半元胞结构示意图；
图3～6示出了图2所示结构中背面结构的制作流程示意图；
图7示出了图1所示结构的IV曲线图；
图8示出了图2所示结构的IV曲线图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚，以下结合附图对本发明进行具体阐述。
传统RC-IGBT结构如图1所示，本发明提出的RC-IGBT半元胞结构如图2所示，与传统RC-IGBT相比，本发明提出的RC-IGBT不同之处在于在N-型漂移区的内底部引入了混合P+/N-buffer层，如图3～6所示，其背面结构具体制作步骤如下：
1.选用1200V RC-IGBT器件，单个mos元胞宽度为10μm，半集电极宽度为10μm，厚度为130μm；漂移区浓度为5.0×1013cm-3，栅氧化层厚度为0.05μm；
2.通过离子注入在N-漂移区底部形成宽度为8.5μm、厚度为10μm、掺杂浓度为1.0×1016cm-3的N-缓冲层。
3.通过离子注入在N-缓冲层内部底部制作3个P+柱区，纵向注入结深为5μm，横向注入宽度1μm，掺杂浓度为1.0×1017cm-3，其中最接近N-漂移区的P+柱边缘超出N-buffer层。
4.继续分别离子注入形成N+集电区和P+集电区，并刻蚀N+集电区和P+集电区交接处，形成空隙隔离，使N+型集电区上方的P+柱不与P+型集电区接触。
根据图7所示仿真结果可以得出，当mos元胞宽度为10μm、半集电极宽度为320μm时，图1结构的传统RC-IGBT表现出明显的snapback现象。
根据图8所示仿真结果可以得出，当mos元胞宽度为10μm、半集电极宽度为10μm时，图2结构的RC-IGBT没有snapback现象。
显然，本领域的技术人员可以对本发明进行各种改动和变形而不脱离本发明的精神和范围。应注意到的是，以上所述仅为本发明的具体实施例，并不限制本发明，凡在本发明的精神和原则之内，所做的调制和优化，皆应属本发明权利要求的涵盖范围。

Claims (7)

1.一种消除负阻效应的RC-IGBT器件结构，其特征在于，RC-IGBT器件通过离子注入在N型衬底背面形成一定厚度的N-buffer层，N-buffer层的宽度小于N-漂移区的宽度，一定厚度的N-buffer层通过离子注入形成P+柱，进而形成一个N-buffer层内部下沿带有多个P+柱的混合交替排列N型和P型的缓冲层；N型集电区和P型集电区被空隙分隔开，所述的N型集电区上方的P+柱不与P型集电区接触；N-buffer层中最靠近N型集电区一侧的P+柱边缘超出N-buffer层。
2.根据权利要求1所述的一种消除负阻效应的RC-IGBT器件结构，其特征在于：所述的P+柱数量为三个。
3.根据权利要求1所述的一种消除负阻效应的RC-IGBT器件结构，其特征在于：所述的离子注入一定厚度的N-buffer层的掺杂浓度为1×1016cm-3。
4.根据权利要求1所述的一种消除负阻效应的RC-IGBT器件结构，其特征在于：N-buffer层中最靠近N型集电区一侧的P+柱边缘与N型集电区外侧边缘的距离为1.2μm。
5.根据权利要求1所述的一种消除负阻效应的RC-IGBT器件结构，其特征在于：所述的离子注入一定厚度的N-buffer层的厚度为6μm。
6.根据权利要求1所述的一种消除负阻效应的RC-IGBT器件结构，其特征在于：所述的离子注入一定厚度的混合P+柱/N-buffer层的P+型掺杂浓度为1×1017cm-3。
7.根据权利要求1所述的一种消除负阻效应的RC-IGBT器件结构，其特征在于：所述的离子注入一定厚度的混合P+柱/N-buffer层的P+型厚度为5μm。
CN202010023986.XA 2020-01-09 2020-01-09 一种消除负阻效应的rc-igbt器件结构 Active CN111211167B (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010023986.XA CN111211167B (zh) 2020-01-09 2020-01-09 一种消除负阻效应的rc-igbt器件结构

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010023986.XA CN111211167B (zh) 2020-01-09 2020-01-09 一种消除负阻效应的rc-igbt器件结构

Publications (2)

Publication Number Publication Date
CN111211167A CN111211167A (zh) 2020-05-29
CN111211167B true CN111211167B (zh) 2022-04-01

Family

ID=70788848

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010023986.XA Active CN111211167B (zh) 2020-01-09 2020-01-09 一种消除负阻效应的rc-igbt器件结构

Country Status (1)

Country Link
CN (1) CN111211167B (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117059648A (zh) * 2022-05-06 2023-11-14 无锡华润华晶微电子有限公司 一种逆导igbt晶体管及其制备方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011114027A (ja) * 2009-11-24 2011-06-09 Toshiba Corp 電力用半導体装置
CN107256890A (zh) * 2017-06-19 2017-10-17 西安理工大学 一种逆导型绝缘栅双极型晶体管及其制备方法
CN208352296U (zh) * 2018-07-19 2019-01-08 厦门芯一代集成电路有限公司 一种氧化槽隔离型逆导型igbt的新结构
US10418470B2 (en) * 2017-09-14 2019-09-17 Kabushiki Kaisha Toshiba Semiconductor device having IGBT portion and diode portion

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8564097B2 (en) * 2010-04-15 2013-10-22 Sinopower Semiconductor, Inc. Reverse conducting IGBT
CN106206679B (zh) * 2016-08-31 2019-08-23 电子科技大学 一种逆导型igbt

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011114027A (ja) * 2009-11-24 2011-06-09 Toshiba Corp 電力用半導体装置
CN107256890A (zh) * 2017-06-19 2017-10-17 西安理工大学 一种逆导型绝缘栅双极型晶体管及其制备方法
US10418470B2 (en) * 2017-09-14 2019-09-17 Kabushiki Kaisha Toshiba Semiconductor device having IGBT portion and diode portion
CN208352296U (zh) * 2018-07-19 2019-01-08 厦门芯一代集成电路有限公司 一种氧化槽隔离型逆导型igbt的新结构

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
A Low Turn-Off Loss 4H-SiC Trench IGBT With;Ying Wang;《IEEE TRANSACTIONS ON ELECTRON DEVICES》;20171111;全文 *

Also Published As

Publication number Publication date
CN111211167A (zh) 2020-05-29

Similar Documents

Publication Publication Date Title
CN103383958A (zh) 一种rc-igbt器件及其制作方法
CN110400840B (zh) 一种抑制电压回折现象的rc-ligbt器件
CN108649068B (zh) Rc-igbt器件及其制备方法
CN111834449B (zh) 一种具有背面双mos结构的快速关断rc-igbt器件
EP3474330B1 (en) Lateral insulated-gate bipolar transistor and manufacturing method therefor
CN112038401A (zh) 一种绝缘栅双极性晶体管结构及其制备方法
CN106129110A (zh) 一种双通道rc‑igbt器件及其制备方法
CN110137250B (zh) 一种具有超低导通压降的高速igbt器件
CN106067481B (zh) 一种双通道rc-igbt器件及其制备方法
JPH03155677A (ja) 伝導度変調型ｍｏｓｆｅｔ
JPH03194974A (ja) Ｍｏｓ型半導体装置
CN108155230B (zh) 一种横向rc-igbt器件及其制备方法
JPH11274516A (ja) 電力用半導体装置
CN116504817B (zh) 开关速度快且损耗低的rc-igbt结构及其制备方法
CN111211167B (zh) 一种消除负阻效应的rc-igbt器件结构
WO2013049850A2 (en) Mct device with base-width-determined latching and non-latching states
CN107564959B (zh) 一种mos栅控晶闸管及其制作方法
US20230047794A1 (en) Multi-trench Super-Junction IGBT Device
CN105529370A (zh) 一种mos触发负阻二极管及其制造方法
WO2022252654A1 (zh) 逆导型横向绝缘栅双极型晶体管
US8878238B2 (en) MCT device with base-width-determined latching and non-latching states
US20150187922A1 (en) Power semiconductor device
CN110610986B (zh) 一种利用结终端集成横向续流二极管的rc-igbt器件
CN114373749A (zh) 一种消除负阻效应的横向rc-igbt器件结构
CN111933687B (zh) 具有高安全工作区的横向功率器件

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant