CN111145811B - 阻变存储阵列及其操作方法、阻变存储器电路 - Google Patents

阻变存储阵列及其操作方法、阻变存储器电路 Download PDF

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CN111145811B
CN111145811B CN201911409161.5A CN201911409161A CN111145811B CN 111145811 B CN111145811 B CN 111145811B CN 201911409161 A CN201911409161 A CN 201911409161A CN 111145811 B CN111145811 B CN 111145811B
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initialization
voltage
circuit
memory cell
resistive
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CN111145811A (zh
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潘立阳
孙婧瑶
吴华强
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Tsinghua University
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Tsinghua University
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Priority to US17/790,369 priority patent/US20230044537A1/en
Priority to PCT/CN2020/141478 priority patent/WO2021136394A1/fr
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/003—Cell access
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0023—Address circuits or decoders
    • G11C13/0026—Bit-line or column circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0023—Address circuits or decoders
    • G11C13/0028—Word-line or row circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0097—Erasing, e.g. resetting, circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/0083—Write to perform initialising, forming process, electro forming or conditioning
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/10—Resistive cells; Technology aspects
    • G11C2213/15—Current-voltage curve
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/79—Array wherein the access device being a transistor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/82—Array having, for accessing a cell, a word line, a bit line and a plate or source line receiving different potentials

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  • Static Random-Access Memory (AREA)
CN201911409161.5A 2019-12-31 2019-12-31 阻变存储阵列及其操作方法、阻变存储器电路 Active CN111145811B (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201911409161.5A CN111145811B (zh) 2019-12-31 2019-12-31 阻变存储阵列及其操作方法、阻变存储器电路
US17/790,369 US20230044537A1 (en) 2019-12-31 2020-12-30 Resistive random access memory array and operation method therefor, and resistive random access memory circuit
PCT/CN2020/141478 WO2021136394A1 (fr) 2019-12-31 2020-12-30 Réseau de mémoire vive résistive et son procédé de fonctionnement, et circuit de mémoire vive résistive

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CN201911409161.5A CN111145811B (zh) 2019-12-31 2019-12-31 阻变存储阵列及其操作方法、阻变存储器电路

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WO (1) WO2021136394A1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111145811B (zh) * 2019-12-31 2021-11-09 清华大学 阻变存储阵列及其操作方法、阻变存储器电路
CN111179991B (zh) * 2019-12-31 2022-06-03 清华大学 阻变存储阵列及其操作方法、阻变存储器电路
CN111091858B (zh) * 2019-12-31 2021-11-09 清华大学 阻变存储阵列的操作方法
CN112464156B (zh) * 2020-12-17 2022-08-23 长江先进存储产业创新中心有限责任公司 矩阵与向量的乘法运算方法及装置
CN117497026A (zh) * 2022-07-25 2024-02-02 清华大学 存储器单元、阵列电路结构及数据处理方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007004873A (ja) * 2005-06-22 2007-01-11 Sony Corp 記憶装置の初期化方法
CN105097021A (zh) * 2014-05-22 2015-11-25 华邦电子股份有限公司 电阻式存储器的形成以及测试方法
CN107093454A (zh) * 2016-02-18 2017-08-25 爱思开海力士有限公司 阻变存储装置和用于阻变存储装置的电压发生电路
CN109741773A (zh) * 2018-09-21 2019-05-10 浙江大学 一种基于积累模式阻变场效应晶体管的与非型存储阵列

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100868105B1 (ko) * 2006-12-13 2008-11-11 삼성전자주식회사 저항 메모리 장치
CN103247347B (zh) * 2012-02-11 2017-07-25 三星电子株式会社 提供智能存储器架构的方法和系统
JP2015064918A (ja) * 2013-09-25 2015-04-09 マイクロン テクノロジー， インク． 半導体装置及びその書き込み方法
JP6829831B2 (ja) * 2016-12-02 2021-02-17 国立研究開発法人産業技術総合研究所 抵抗変化型メモリ
CN111145811B (zh) * 2019-12-31 2021-11-09 清华大学 阻变存储阵列及其操作方法、阻变存储器电路
CN111179991B (zh) * 2019-12-31 2022-06-03 清华大学 阻变存储阵列及其操作方法、阻变存储器电路
CN111091858B (zh) * 2019-12-31 2021-11-09 清华大学 阻变存储阵列的操作方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007004873A (ja) * 2005-06-22 2007-01-11 Sony Corp 記憶装置の初期化方法
CN105097021A (zh) * 2014-05-22 2015-11-25 华邦电子股份有限公司 电阻式存储器的形成以及测试方法
CN107093454A (zh) * 2016-02-18 2017-08-25 爱思开海力士有限公司 阻变存储装置和用于阻变存储装置的电压发生电路
CN109741773A (zh) * 2018-09-21 2019-05-10 浙江大学 一种基于积累模式阻变场效应晶体管的与非型存储阵列

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CN111145811A (zh) 2020-05-12
WO2021136394A1 (fr) 2021-07-08
US20230044537A1 (en) 2023-02-09

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