CN110931483B - 具有源极镇流的碳化硅金属氧化物半导体场效应晶体管 - Google Patents

具有源极镇流的碳化硅金属氧化物半导体场效应晶体管 Download PDF

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CN110931483B
CN110931483B CN201910876410.5A CN201910876410A CN110931483B CN 110931483 B CN110931483 B CN 110931483B CN 201910876410 A CN201910876410 A CN 201910876410A CN 110931483 B CN110931483 B CN 110931483B
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CN110931483A (zh
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维平达斯·帕拉
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Alpha and Omega Semiconductor Cayman Ltd
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Abstract

本发明公开了一种集成器件和制作所述集成器件的方法。该集成器件包含多个平面金属氧化物半导体场效应晶体管，后者具有于多个源极区的第一源极区中形成的第一接触区，以及于多个源极区的第二源极区中形成的第二接触区。第一接触区和第二接触区具有掺杂第二导电类型的源极区相应部分，且第一接触区和第二接触区经由结型场效应晶体管区域分离；其中结型场效应晶体管区域的一个平面尺寸长于另一个，且第一接触区和第二接触区经由较长平面尺寸分离。结型场效应晶体管区域通过导电接触至少一个接触区的源极区和体区，界定于对应较长平面尺寸的至少一侧。

Description

具有源极镇流的碳化硅金属氧化物半导体场效应晶体管
技术领域
本披露的所有方面与功率集成电路相关；具体地说，关联包含平面金属氧化物半导体场效应晶体管的集成功率器件，该晶体管在其碳化硅基片中具有源极镇流。
背景技术
大多数半导体功率器件采用硅作为基片进行制作。近来，出现了采用碳化硅(SiC)制作功率器件的发展趋势，尤其是对于高电压功率器件。较之于硅，碳化硅展现出多个理想的特性，包括在高温、高功率电平和高频率下运行的能力。此外，碳化硅功率器件呈现出低比导通电阻(RDSon)和高热导率，特别是高出硅功率器件500至1000倍，使之成为构造功率器件应用中的理想选择。
维持功率器件设计中的低RDSon意味着：要么具有短通道长度，要么在较之于类似电压额定值器件更高的过驱动电压下运行功率器件。由于这些因素，再结合碳化硅功率器件中漂移区域小于硅功率器件10倍这一事实，使得碳化硅功率器件具有较之于类似普通硅器件较差的短路特性。
本发明的实施方案在此背景下发生。
发明内容
本发明的目的在于提供一种具有源极镇流的碳化硅金属氧化物半导体场效应晶体管，采用碳化硅制作功率器件，使功率器件展现出多个理想的特性，即使在高温、高功率和高频率下也可较好地运行。
为了达到上述目的，本发明通过以下技术方案实现：
一种包含多个平面金属氧化物半导体场效应晶体管的集成器件，它包括：
a)第一导电类型的碳化硅基片组成；
b)多个与第一导电类型相反的第二导电类型的掺杂体区，形成在基片组成的上部；
c)多个第一导电类型的掺杂源区，其中多个掺杂源极区的每一个形成于多个体区中每一个的上部；
d)第一接触区形成于多个源极区的第一源极区中，第二接触区形成于多个源极区的第二源极区中；其中第一接触区和第二接触区具有掺杂第二导电类型；其中第一接触区和第二接触区被结型场效应晶体管区域分离；其中结型场效应晶体管区域的一个平面尺寸要比另一个长；其中第一接触区和第二接触区被较长平面尺寸分离；其中结型场效应晶体管区域在对应于较长平面尺寸的至少一侧，被源极区界定，且体区与至少一个接触区产生导电接触；
e)形成于碳化硅基片顶上的绝缘层；
f)形成于绝缘层上的导电层，具有对应于接触区上绝缘层基底部分中开口的开口。
优选地，第一接触区和第二接触区交错排列，且每一接触区具有相应的结型场效应晶体管区域；其中第一接触区和第二接触区之间的距离短于结型场效应晶体管区域较长平面尺寸的全长，但长于较短区的较短平面尺寸。
优选地，第一接触区的长度对应于第一结型场效应晶体管区域的较短平面尺寸，且第二接触区的长度对应于第二结型场效应晶体管区域的较短平面尺寸。
优选地，界定结型场效应晶体管区域的源极区轻掺杂有第二导电类型，且接触区重掺杂有第二导电类型。
优选地，界定结型场效应晶体管区域的源极区的掺杂浓度逐渐减小，直至在第一接触区和第二接触区之间轻掺杂有第二导电类型。
优选地，界定结型场效应晶体管区域的源极区的掺杂浓度提高至在接触区附近重掺杂的第二浓度。
优选地，形成界定结型场效应晶体管区域的源极区中的间隙，且体区在第一接触区和第二接触区之间保持连续。
优选地，肖特基接触形成于第一接触区和第二接触区之间源极区中的间隙。
优选地，肖特基接触形成于结型场效应晶体管区域中并完全重叠该区域。
优选地，a)进一步包括在体区上部中形成第一导电类型的轻掺杂阱区，以及
b)包括在阱区上部中形成源极区。
优选地，包含多个平面金属氧化物半导体场效应晶体管的集成器件的制作方法，包括：
a)提供第一导电类型的碳化硅基片组成；
b)形成第二导电类型的多个掺杂体区，与基片上部中形成的第一导电类型相反；
c)形成第一导电类型的多个掺杂源极区，其中多个掺杂源极区中的每一个形成于多个体区中每一个的上部；
d)在多个源极区的第一源极区中形成第一接触区，在多个源极区的第二源极区中形成第二接触区；其中第一接触区和第二接触区分别具有掺杂第二导电类型的源极区部分；其中第一接触区和第二接触区经由结型场效应晶体管区域分离；其中结型场效应晶体管区域的一个平面尺寸长于另一个；其中第一接触区和第二接触区经由较长平面尺寸分离；其中结型场效应晶体管区域通过导电接触至少一个接触区的源极区和体区，界定于对应较长平面尺寸的至少一侧；
e)在碳化硅基片顶上形成绝缘层；
f)于绝缘层上形成导电层，具有对应于接触区上方绝缘基底部分中开口的开口。
优选地，第一接触区和第二接触区交错排列，且每一接触区具有相应的结型场效应晶体管区域；其中第一接触区和第二接触区之间的距离短于结型场效应晶体管区域较长平面尺寸的全长，但长于该区域的较短平面尺寸。
优选地，第一接触区的长度对应于第一结型场效应晶体管区域的较短平面尺寸，第二接触区的长度对应于第二结型场效应晶体管区域的较短平面尺寸。
优选地，界定结型场效应晶体管区域的源极区轻掺杂有第二导电类型，且接触区重掺杂有第二导电类型。
优选地，界定结型场效应晶体管区域的源极区的掺杂浓度逐渐减小，直至在第一接触区和第二接触区之间轻掺杂有第二导电类型。
优选地，界定结型场效应晶体管区域的源极区的掺杂浓度提高至在接触区附近重掺杂有第二浓度。
优选地，于界定结型场效应晶体管区域的源极区中形成间隙；其中体区在第一接触区和第二接触区之间保持连续。
优选地，于第一接触区和第二接触区之间源极区间隙中形成肖特基接触。
优选地，于结型场效应晶体管区域中形成肖特基接触，并完全重叠该区域。
优选地，a)进一步包括在体区上部形成第一导电类型的轻掺杂阱区，以及
b)包括在阱区上部形成源极区。
本发明与现有技术相比具有以下优点：
(1)采用碳化硅制作功率器件，使功率器件展现出多个理想的特性，即使在高温、高功率和高频率下也可较好地运行；
(2)本发明的功率器件中沟道密度和接触密度脱耦，可以独立改变源极电阻和沟道电阻，从而改进短路特性。
附图说明
图1A显示现有技术碳化硅金属氧化物半导体场效应晶体管集成器件的俯视示意图；
图1B显示图1A中现有技术碳化硅金属氧化物半导体场效应晶体管集成器件的侧视横截面示意图；
图2A按照本披露的所有方面，描绘了具有源极镇流的碳化硅平面金属氧化物半导体场效应晶体管集成器件的俯视示意图；
图2B按照本披露的所有方面，描绘了具有源极镇流的碳化硅平面金属氧化物半导体场效应晶体管集成器件接触区之间的侧视横截面示意图；
图3A按照本披露的所有方面，显示了具有棋盘状图案偏移接触区，带源极镇流的碳化硅平面金属氧化物半导体场效应晶体管集成器件的俯视示意图；
图3B按照本披露的所有方面，显示了具有棋盘状图案偏移接触区，带源极镇流的碳化硅平面金属氧化物半导体场效应晶体管集成器件接触区的侧视横截面示意图；
图4是按照本披露的所有方面，显示的具有棋盘状图案偏移接触区，在界定沟道区的源极区中有间隙，带源极镇流的碳化硅平面金属氧化物半导体场效应晶体管集成器件的俯视示意图；
图5按照本披露的所有方面，描绘了具有棋盘状图案偏移接触区，其轻掺杂源极区对沟道区作出界定，带源极镇流的碳化硅平面金属氧化物半导体场效应晶体管集成器件的俯视示意图；
图6是按照本披露的所有方面，显示的具有棋盘状图案偏移接触区，其重掺杂源极区逐渐减小为轻掺杂源极区并对沟道区作出界定，带源极镇流的碳化硅平面金属氧化物半导体场效应晶体管集成器件的俯视示意图；
图7A按照本披露的所有方面，显示了具有棋盘状图案偏移接触区，其肖特基触点位于接触区之间，带源极镇流的碳化硅平面金属氧化物半导体场效应晶体管集成器件的俯视示意图；
图7B按照本披露的所有方面，显示了具有棋盘状图案偏移接触区，其肖特基触点更换接触区之一，带源极镇流的碳化硅平面金属氧化物半导体场效应晶体管集成器件的俯视示意图；
图8A-8I按照本披露的所有方面，描绘了具有源极镇流的碳化硅平面金属氧化物半导体场效应晶体管集成器件的制作过程；
图8J-8K按照本披露的所有方面，显示了具有源极镇流以包含肖特基触点的碳化硅平面金属氧化物半导体场效应晶体管集成器件制作过程的修改；
图9按照本披露的所有方面，描绘了具有源极镇流的碳化硅平面金属氧化物半导体场效应晶体管集成器件的四分之三剖面图。
具体实施方式
图1A-1B是现有技术碳化硅平面金属氧化物半导体场效应晶体管集成功率器件100的原理图。应该注意到，该集成结构100无法呈现最优短路特性，并且得到描绘，以阐明传统型碳化硅平面金属氧化物半导体场效应晶体管集成器件的结构。碳化硅平面金属氧化物半导体场效应晶体管集成功率器件100的配置方式类似于使用硅基片的现有技术硅平面金属氧化物半导体场效应晶体管集成功率器件。图1A显示现有技术硅化硅平面金属氧化物半导体场效应晶体管功率器件的俯视示意图，而图1B显示横截面示意图。
碳化硅平面金属氧化物半导体场效应晶体管集成功率器件100的制作采用了掺杂第一导电类型的碳化硅基片组成。如图所示，该碳化硅基片组成102由第一导电类型的重掺杂碳化硅基片101，以及覆盖生长、沉积或以其他方式形成于基片101表面的碳化硅轻掺杂外延层103构成。作为替代，碳化硅基片组成102可以仅由碳化硅基片101构成。碳化硅基片101在集成功率器件100中形成每一金属氧化物半导体场效应晶体管器件的漏极区。
多个第二导电类型的体区105形成于外延层103的上部。体区105经掺杂后具有与基片组成102相反的导电类型。举例来说，而非作出限制，体区105可以是P型，用于N型碳化硅基片组成102。多个第一导电类型的源极区107形成于每一多个体区105的上部内。可以视需要，在体区105中形成第二导电类型106的轻掺杂阱区，并在阱区106上部中形成源极区107。举例来说，而非作出限制，源极区107可以是N+类型，用于N型碳化硅基片组成和P型体区。符号N+类型的意思是它掺杂了较之于N型基片组成102浓度更高的掺杂剂。接触区108形成于源极区107中。对应于接触区108的部分源极区重掺杂有材料，以使其具有第二导电类型。在基片顶部形成绝缘层110。绝缘层可以是生长在碳化硅基片组成102顶上的二氧化硅(SiO2)。导电材料在集成功率器件100中形成每一金属氧化物半导体场效应晶体管器件的栅电极111。该导电材料可以是多晶硅或者技术领域中已知的某些其他导电材料。可以在导电层顶上创建第二绝缘层，并结合导电层111下方绝缘体。在不作出限制的情况下，第二绝缘层可以是于多晶硅层处生长的另一二氧化硅层，也可以是放置在导电层顶上的某些其他绝缘体。绝缘层和导电材料层中生成的孔可以使源极金属层112于接触区108处与源极区107产生欧姆接触。在图1A中，分别用点虚线和短划线指示通过绝缘体材料110和导电层111的开口。
体区105之间的开口有时被称为“JFET(结型场效应晶体管)”区域113。在某些实施方案中，结型场效应晶体管区域113具有较之于外延区更重的掺杂。可以通过注入来完成这件事。沟道区114形成于体区105表面，在结型场效应晶体管区域113和源极区107之间。将适当的电压施加于栅电极111时，会形成沟道区，以使金属氧化物半导体场效应晶体管在导通状态下运行。沟道区114使得电流从源极区流入漏极区。在该现有技术实施中，结型场效应晶体管区域113与接触区108并联运行。作为其结果，结型场效应晶体管区域113具有较长的平面尺寸(宽度)120和较短的平面尺寸(长度)121。长平面尺寸120跨越接触区108的宽度，且短平面尺寸121为两个接触区108之间的距离。结型场效应晶体管区域产生其节距紧密联系接触区节距的沟道区。该现有技术结型场效应晶体管区域和沟道区的配置受限于载流子迁移率，该迁移率无法通过更改布局得以改进。通过在该布局中减小沟道长度或增加沟道密度以降低沟道电阻，可导致较差的短路特性。
图2A按照本披露的所有方面，显示了具有源极镇流的平面金属氧化物半导体场效应晶体管功率器件。此处的沟道区已经过翻转，以将较长的平面尺寸(宽度)220将第一接触区250与第二接触区251相分离。接触区250、251的每一个都包含重掺杂有材料的一个或多个触点109，以使其具有第二导电类型。在体区205和阱区206之间形成结型场效应晶体管区域213。在适合于运行导通状态金属氧化物半导体场效应晶体管的电压被施加于电气绝缘的栅电极211时，沟道区214形成于体区205表面，在结型场效应晶体管区域213和源极区230之间。在图1A-1B中所示的器件中，结型场效应晶体管区域213可具有较之于外延区203更重的掺杂。
在图2A-2B中所示配置中，沟道的较短平面尺寸(长度)221将一个源极区230与另一个相分离。图2A-2B中所示配置的好处是：沟道区的节距与接触区的节距脱耦。该脱耦使得沟道区密度提高，同时不会相应提高接触区的密度，而这在现有技术布局中就会发生，例如图1A中所示。另外，由于沟道密度和接触密度脱耦，可以独立改变源极电阻和沟道电阻，从而导致短路特性的改进。
如图2B中显示的横截面示意图中所示，有多个结型场效应晶体管区域213。在相邻结型场效应晶体管区域213之间的体区205或者(可选)阱区206的上层中形成源极区230。如上所述，可以在每一体区205上方形成阱区206，且在基片组成的外延层203中形成体区。在结型场效应晶体管区域213、体区205、(可选)阱区206和定界源极区230的顶上形成绝缘层210。通过创建于绝缘层210顶上的导电层可形成栅电极211，并于栅电极211顶上形成第二绝缘层。最终可在绝缘体顶部创建源极金属层212。请注意：金属接触层并不与导电层或者源极层产生欧姆接触。不像普通的硅金属氧化物半导体场效应晶体管功率器件，绝缘层和导电层可形成于器件的所有区域顶上，接触区除外。在图2A中，分别用点虚线和短划线指示通过绝缘体材料210和栅电极211的开口。
图3A-3B按照本披露的所有方面，显示了对于传统型碳化硅金属氧化物半导体场效应晶体管功率器件设计的进一步改进。在本实施中，通过增加接触区之间的距离，提高了相对于图2A-2B的源极电阻，同时还增大了沟道区密度。接触区301(例如：第一接触区和第二接触区)交错排列或相互偏离，生成棋盘状图案。每一接触区301均由沟道间隙予以分离，后者要么具有较短的平面尺寸304，要么具有较长的平面尺寸303。此外，在这些实施中，结型场效应晶体管区域313仅在一侧由接触区界定在较短的平面尺寸中；正因如此，接触区301之间的距离303可能短于结型场效应晶体管区域313的全长，因而也短于相应沟道区域314的长度。按照本披露的附加方面问题，重掺杂有第一导电类型302的接触区部分的定向可以旋转，以致其并联于沟道区域304的较短平面尺寸。这些实施可以进一步微调源极区域电阻，同时还可提高沟道区域的密度。在图3A中，点虚线和短划线分别指示通过绝缘材料的开口和上覆导电层。
图4按照本披露的所有方面，显示了碳化硅金属氧化物半导体场效应晶体管集成器件的另一可选实施方案。在该实施方式中，通过在接触区301之间的源极区中形成间隙401，进一步提高源极区406的电阻。体区或者(可选)阱区402在接触区301之间连续，且对结型场效应晶体管区域作出界定。消除接触区之间的源极区可以实现沟道密度和源极的微调。在结型场效应晶体管区域413和源极区406之间形成沟道区域。间隙401中因而没有沟道，从而沟道密度会降低，导致器件短路特性获得净改进。在图4中，点虚线和短划线分别指示通过绝缘材料的开口和上覆导电层。
图5按照本披露的所有方面，描绘了碳化硅金属氧化物半导体场效应晶体管集成器件的另一可选实施方案。在该实施方式中，通过轻掺杂界定沟道区域于较长平面尺寸的区域中的源极区，提高源极区506的电阻。接触区501被给予重掺杂。界定接触区之间沟道区域506的源极区中的掺杂浓度经降低后可提高源极电阻。轻掺杂源极区显示出电阻增加，因为源极区中的载流子少了。在图5中，点虚线和短划线分别指示通过绝缘材料的开口和上覆导电层。
图6按照本披露的所有方面，显示了碳化硅金属氧化物半导体场效应晶体管集成器件的另一实施方式。本实施中界定沟道区域的源极区606的掺杂浓度在接触区之间逐渐减少。掺杂浓度可在重掺杂源极区606之间生成间隙。这些间隙可以是轻掺杂的第一导电类型源极区601。通过提高源极电阻逐渐减少重掺杂源极区，进一步改进器件短路特性，同时可以减小短路期间的电流。在图6中，点虚线和短划线分别指示通过绝缘材料的开口和上覆导电层。
在某些实施方案中，基片外延层中可形成肖特基二极管，并与源极区产生欧姆接触，如图7A和7B中所描绘。如图7A中所示，可以将肖特基二极管701放置在界定沟道区域的源极区中生成的间隙702中。体区和(可选)阱区可以在接触区301之间保持连续，并遵循肖特基触点的轮廓。在图7B中显示的可选实施方案中，肖特基触点可定位于两个邻近体区之间的开口顶上。体区或(可选)阱区703可沿肖特基触点701的界面保持连续，并在两个源极区之间跨越。在图7A和7B中，点虚线和短划线分别指示通过绝缘材料的开口和上覆导电层。
形成
图8A-8I按照本披露的所有方面，显示了具有源极镇流的碳化硅金属氧化物半导体场效应晶体管集成器件制作方法示例的步骤。如图8A中所描绘，制作从碳化硅晶体基片组成开始，该组成具有第一导电类型的重掺杂基片801和较轻掺杂的外延层802。重掺杂基片可以是例如具有1e17-1e20cm-3掺杂浓度的N+基片；轻掺杂外延层可以是例如具有1e13-1e17 cm-3掺杂浓度的N-层，其厚度为3-150μm。
如图8B中所示，于基片组成顶上生成第一掩膜803。对于该第一掩膜803进行放置后，应使得具有较长和较短平面尺寸的结型场效应晶体管区域可以通过图8B的俯视示意图看到。在举例来说而不是作出限制的情况下，可以对掩膜803进行定位，以生成结型场效应晶体管开口，其宽度在1μm和20μm之间，长度在0.5μm和5μm之间。这些尺寸大致对应于沟道区域的宽度和长度。可以通过沉积于基片组成表面的光刻胶或氧化物形成掩膜，也可以通过技术领域中已知的某些其他掩膜形成。应用离子注入，在掩膜的开放区中生成第二导电类型的体区804。第二导电类型的体区可以是例如P+体区，后者具有1e16-1e18 cm-3的掺杂浓度和0.5-1.5μm的层厚度。可以对掩膜布局进行配置，以使体区界定较长平面尺寸的沟道区域。掩膜布局中的开口可能具有这样的特性：开口之间留有1至2μm的空间。在某些实施方案中，第二导电类型805的轻掺杂阱区通过同一掩膜开口被注入于体区804顶上。该轻掺杂阱可以是例如P-阱区，具有约1e16-1e18 cm-3的掺杂浓度和约0.5-1.5μm的厚度。
第一掩膜803被清除，而创建源极区的第二掩膜806可生成于基片组成的表面，如图8D所示。在某些实施方案中，可以经由基片组成表面二氧化硅的沉积和图案蚀刻，或者经由沉积光刻胶并执行光刻以创建所需布局，来生成新的掩膜。然后可以将第一导电类型的源极区注入进体区804或者(可选)阱区805的上部。从而在器件激活的情况下，于结型场效应晶体管区域和源极区之间的基片区中生成沟道区域。沿结型场效应晶体管区域和源极区轮廓形成的沟道区域具有较长的平面尺寸和较短的平面尺寸。第一导电类型的源极区可以是例如N+源极区，具有1e18-1e21 cm-3的掺杂浓度。第二掩膜806中的开口在并联于沟道区域的类似柄部分中具有0.2至1μm的宽度，而在将成为接触区的区域中具有约4μm的宽度。从俯视示意图中可以看出，源极区807、体区804和(可选)阱区805并联于结型场效应晶体管区域的较长平面尺寸。掩膜806覆盖结型场效应晶体管区域和将形成沟道区域的区域整个表面。源极区807、体区804和(可选)阱区805还生成多个结型场效应晶体管区域之间接触区809的前体。接触区可以比沟道区域的较短平面尺寸更长，并与界定较长平面尺寸结型场效应晶体管区域的源极区807、体区804和(可选)阱区805产生欧姆接触。
为了完成接触区809，部分源极区807得到第二导电类型的掺杂(如图8E中描绘)，以产生与体区或者(可选)阱区的源极接触。掺杂有第二导电类型的源极区809部分可以是例如P+部分，具有1e18-1e21 cm-3的掺杂浓度。为形成该部分，第三掩膜810延伸越过覆盖除接触区809所需部分之外所有区域的基片组成表面。可以通过清除先前掩膜806并在基片组成表面生成新掩膜，或者添加掩膜材料至先前掩膜，实施掩膜810的形成。第三掩膜810可具有这样的特性：将成为接触区的区域上方的开口小于第二掩膜806中的开口，并经由开口之间的较大空间相隔离，如约5μm。将要成为体区或(可选)阱区源极接触的接触区部分掺杂有第二导电类型。在举例来说而不是作出限制的情况下，通过离子注入进行掺杂。
接触区的注入一经完成，就必须激活注入区。激活或者退火要求提升碳化硅基片组成至升高温度。在碳化硅基金属氧化物半导体场效应晶体管制作期间，掺杂剂注入的激活要求约1600℃的温度。
图8F显示绝缘层811的形成。在清除掩膜810之后，可于基片组成顶上生成绝缘层811。举例来说，绝缘层可以是生长或沉积于基片组成顶上的二氧化硅层。从俯视示意图中可以看出，在该步骤中，绝缘层811可覆盖整个基片组成。如图8G中所描绘，之后于绝缘层顶上生成导电层812。导电层812可以是技术领域中已知的任何导电材料，例如：多晶硅或者铝、钼、钨等金属。然后使导电层812和绝缘层811形成图案并得到蚀刻，显露出接触区813，如图8H所示。图案化蚀刻可在通向基片组成表面导电区的导体层和绝缘层中生成开口。该开口可具有0.5-3μm的节距。会有更多的绝缘体814，如掺杂硼磷的硅玻璃(BPSG)，覆盖导电层的上表面，同时使接触区813保持打开，如图8I所示。图8I俯视示意图中的绝缘层814和导电层812被清除，以显示底下阱区805、源极区807和接触区813的图案。在图8I中，点虚线和短划线分别指示通过绝缘层811、814和导电层812的开口。最终可以在接触区中放置源极金属，以生成源极金属触点；源极金属与接触区发生欧姆接触。源极金属可以是任何合适的金属，如镍、钛、铝或多种金属的合金。可以通过例如化学气相沉积(CVD)或者物理气相沉积(PVD)，沉积此类金属。
应当理解：可以通过图8A-8I中显示以及以上说明的制作方法，生成图1-7中描绘的源极区、体区、阱区和接触区布局。在制作步骤没有得到全面详细说明的情况下，技术领域中的一项普通技能认可：可以应用任何数目的通用制造技术，对此类碳化硅平面金属氧化物半导体场效应晶体管集成器件进行配置。
具有肖特基二极管的碳化硅平面金属氧化物半导体场效应晶体管集成器件的生成类似于普通碳化硅金属氧化物半导体场效应晶体管集成器件，如图8A-8C中所示。体区和(可选)阱区形成于区域815中，同时于此放置肖特基触点，如图8J中所示。源极区的布置遵循与图8D相同的工艺，在源极区807中布置间隙，同时于此布置肖特基触点816，如图8K中点虚线所示。肖特基接触区816应完全重叠结型场效应晶体管区域(或者阱开口)。肖特基区域816可以形成或不形成与源极区807的欧姆接触。在形成源极区之后，集成器件的形成遵循图8E-8G的工艺。如图8K中进一步显示，绝缘层从肖特基接触区816放置处被蚀刻掉。如短划线指示，导电层也从肖特基接触区816处被蚀刻掉，以确保导电层和肖特基接触之间没有导电接触。如图8I中说明，在导电层顶上形成绝缘体后，布置肖特基接触以生成肖特基二极管。通过在肖特基接触区816上形成肖特基势垒金属，生成肖特基接触。肖特基势垒金属应与沟道区域发生欧姆接触。肖特基势垒金属可包含钛/氮化钛(Ti/TiN)/硅化钛、镍(Ni)，并在肖特基接触区816中硅组成表面生长、沉积、得到快速热处理。于肖特基接触区中势垒金属和外延层之间界面处形成肖特基结。肖特基势垒金属形成肖特基二极管的阳极，基片组成形成肖特基二极管的阴极。源极金属可以穿过绝缘体中开口，接触源极区和势垒金属。
图9按照本披露的所有方面，显示了平面金属氧化物半导体场效应晶体管集成器件实施方式的四分之三视图。如所描绘，源极区901从接触区902向外延伸，以界定沟道区域910。于体区908和(可选)阱区907顶上形成源极区。体区908和(可选)阱区进一步围绕源极区901延伸，同时还界定沟道区域。从源极区处形成接触区，且接触区的部分903掺杂有第二导电类型。举例来说，接触区的该部分可以是P+接触区，并可确保体区处于和源极区一样的电位。绝缘层906覆盖大部分基片组成，且具有用于接触区902的孔。导电层905(例如：多晶硅)位于绝缘层顶上，并终止于接触区902之前，从而不至于和接触区902处源极金属911发生欧姆接触。另外，还在导电层904顶上以及接触区902和导电层904之间的间隙中形成绝缘层。该附加绝缘层可确保导电层与源极金属911隔离。
在运行期间，电流从源极金属911出发，通过接触区902，到达源极区901和掺杂有第二导电类型903的接触区部分。在运行期间，施加于导电层904的电压导致基片组成表面处载流子对准，使得电流从源极区901出发，通过体区908和(可选)阱区907，经由沟道区域914进入结型场效应晶体管区域913。然后，电流向下流经外延层909和基片910，到达漏极。
尽管已参照特定优先版本，相当详细地说明了本发明，也可以选用其他版本。因此，所附要求的宗旨和范围不应局限于此处包含的优先版本说明。反之，本发明的适用范围，应参照所附要求，连同其等效版本的全范围予以确定。
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Claims (20)

1.一种包含多个平面金属氧化物半导体场效应晶体管的集成器件，其特征在于，它包括：
a)第一导电类型的碳化硅基片组成；
b)多个与第一导电类型相反的第二导电类型的掺杂体区，形成在基片组成的上部；
c)多个第一导电类型的掺杂源极区，其中多个掺杂源极区的每一个形成于多个掺杂体区中每一个的上部；
d)第一接触区形成于多个掺杂源极区的第一源极区中，第二接触区形成于多个掺杂源极区的第二源极区中；其中第一接触区和第二接触区具有掺杂第二导电类型；其中第一接触区和第二接触区被结型场效应晶体管区域分离；其中结型场效应晶体管区域的一个平面尺寸要比另一个长；其中第一接触区和第二接触区被较长平面尺寸分离；其中结型场效应晶体管区域在对应于较长平面尺寸的至少一侧，被掺杂源极区和掺杂体区界定，且掺杂体区与至少一个接触区产生导电接触；
e)形成于碳化硅基片顶上的绝缘层；
f)形成于绝缘层上的导电层，具有对应于接触区上绝缘层基底部分中开口的开口。
2.如权利要求1所述的集成器件，其特征在于：第一接触区和第二接触区交错排列，且每一接触区具有相应的结型场效应晶体管区域；其中第一接触区和第二接触区之间的距离短于结型场效应晶体管区域较长平面尺寸的全长，但长于该区域的较短平面尺寸。
3.如权利要求2所述的集成器件，其特征在于：第一接触区的长度对应于第一结型场效应晶体管区域的较短平面尺寸，且第二接触区的长度对应于第二结型场效应晶体管区域的较短平面尺寸。
4.如权利要求2所述的集成器件，其特征在于：界定结型场效应晶体管区域的掺杂源极区轻掺杂有第二导电类型，且接触区重掺杂有第二导电类型。
5.如权利要求4所述的集成器件，其特征在于：界定结型场效应晶体管区域的掺杂源极区的掺杂浓度在第一接触区和第二接触区之间逐渐减小。
6.如权利要求5所述的集成器件，其特征在于：界定结型场效应晶体管区域的掺杂源极区的掺杂浓度提高至在接触区附近重掺杂的第二浓度。
7.如权利要求2所述的集成器件，其特征在于：形成界定结型场效应晶体管区域的掺杂源极区中的间隙，且掺杂体区在第一接触区和第二接触区之间保持连续。
8.如权利要求7所述的集成器件，其特征在于：肖特基接触形成于第一接触区和第二接触区之间掺杂源极区中的间隙。
9.如权利要求1所述的集成器件，其特征在于：肖特基接触形成于结型场效应晶体管区域中并完全重叠该区域。
10.如权利要求1所述的集成器件，其特征在于：
进一步包括在掺杂体区上部中形成第一导电类型的轻掺杂阱区，以及包括在阱区上部中形成掺杂源极区。
11.一种包含多个平面金属氧化物半导体场效应晶体管的集成器件的制作方法，其特征在于，包括：
a)提供第一导电类型的碳化硅基片组成；
b)形成第二导电类型的多个掺杂体区，其中多个掺杂体区形成在基片组成的上部，第二导电类型与第一导电类型相反；
c)形成第一导电类型的多个掺杂源极区，其中多个掺杂源极区中的每一个形成于多个掺杂体区中每一个的上部；
d)在多个掺杂源极区的第一源极区中形成第一接触区，在多个掺杂源极区的第二源极区中形成第二接触区；其中第一接触区和第二接触区分别具有掺杂第二导电类型的掺杂源极区部分；其中第一接触区和第二接触区经由结型场效应晶体管区域分离；其中结型场效应晶体管区域的一个平面尺寸长于另一个；其中第一接触区和第二接触区经由较长平面尺寸分离；其中结型场效应晶体管区域在对应于较长平面尺寸的至少一侧，被掺杂源极区和掺杂体区界定，且掺杂体区与至少一个接触区产生导电接触；
e)在碳化硅基片顶上形成绝缘层；
f)于绝缘层上形成导电层，具有对应于接触区上方绝缘基底部分中开口的开口。
12.如权利要求11所述的集成器件制作方法，其特征在于：第一接触区和第二接触区交错排列，且每一接触区具有相应的结型场效应晶体管区域；其中第一接触区和第二接触区之间的距离短于结型场效应晶体管区域较长平面尺寸的全长，但长于该区域的较短平面尺寸。
13.如权利要求12所述的集成器件制作方法，其特征在于：第一接触区的长度对应于第一结型场效应晶体管区域的较短平面尺寸，第二接触区的长度对应于第二结型场效应晶体管区域的较短平面尺寸。
14.如权利要求12所述的集成器件制作方法，其特征在于：界定结型场效应晶体管区域的掺杂源极区轻掺杂有第二导电类型，且接触区重掺杂有第二导电类型。
15.如权利要求14所述的集成器件制作方法，其特征在于：界定结型场效应晶体管区域的掺杂源极区的掺杂浓度在第一接触区和第二接触区之间逐渐减小。
16.如权利要求15所述的集成器件制作方法，其特征在于：界定结型场效应晶体管区域的掺杂源极区的掺杂浓度提高至在接触区附近重掺杂的第二浓度。
17.如权利要求12所述的集成器件制作方法，其特征在于：于界定结型场效应晶体管区域的掺杂源极区中形成间隙；其中掺杂体区在第一接触区和第二接触区之间保持连续。
18.如权利要求17所述的集成器件制作方法，其特征在于：于第一接触区和第二接触区之间掺杂源极区间隙中形成肖特基接触。
19.如权利要求11所述的集成器件制作方法，其特征在于：于结型场效应晶体管区域中形成肖特基接触，并完全重叠该区域。
20.如权利要求11所述的集成器件制作方法，其特征在于：
进一步包括在掺杂体区上部形成第一导电类型的轻掺杂阱区，以及包括在阱区上部形成掺杂源极区。
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