CN110828477A - 一种阵列基板、其制备方法及其显示面板 - Google Patents

一种阵列基板、其制备方法及其显示面板 Download PDF

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CN110828477A
CN110828477A CN201911029531.2A CN201911029531A CN110828477A CN 110828477 A CN110828477 A CN 110828477A CN 201911029531 A CN201911029531 A CN 201911029531A CN 110828477 A CN110828477 A CN 110828477A
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tft
layer
area
array substrate
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肖军城
艾飞
尹国恒
许勇
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to PCT/CN2019/129773 priority patent/WO2021082266A1/zh
Priority to US16/954,253 priority patent/US20220149085A1/en
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Abstract

本发明提供了一种TFT阵列基板、其制备方法及其显示面板。其中所述TFT阵列基板，其定义有第一区域和第二区域，其中所述第一区域上设置有第一TFT，所述第二区域上设置有第二TFT。其中所述第一TFT为顶栅型TFT，所述第二TFT为底栅型TFT，其中所述第一TFT的源漏极层采用的材料与所述第二TFT的栅极层所采用的材料一致。本发明提供了一种TFT阵列基板，其采用新型的膜层结构设计，使得其上设置的第一TFT和第二TFT在设计和制程工艺上能够得到很好的兼容，从而有效的减小两者所在阵列基板的制程风险。

Description

一种阵列基板、其制备方法及其显示面板
技术领域
本发明涉及平面显示技术领域，尤其是，其中的一种阵列基板、其制备方法及其显示面板。
背景技术
已知，随着显示技术的不断向前发展，新型的平面显示器已开始全面取代CRT显示器，成为市场上的主流显示设备。
而其中的液晶显示器(Liquid Crystal Display，LCD)因其自身所具有的高画质、省电、机身薄及应用范围广等优点，被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品，成为显示装置中的主流。
近年来LCD器件呈现出了高分辨率、窄边框和低功耗的发展趋势。为在有限的空间和电池容量下寻找更省电的办法，低温多晶氧化物Low Temperature Poly-Oxide(LTPO)显示技术应运而生。该技术为在显示面板的GOA区采用Low Temperature Poly-Silicon(LTPS)薄膜晶体管，在AA区采用氧化物薄膜晶体管，其中LTPS技术迁移率高、尺寸小、充电快可有效减小边框尺寸，而IGZO技术暗电流小、可低频驱动，从而同时实现窄边框和低功耗功能。
但是，对于LTPO型阵列基板而言，其上同时设置的LTPS TFT和Oxide TFT两者之间存在较多设计和制程工艺上的不兼容问题。例如，LTPS TFT中的SD制程中使用的Pre-Clean(HF溶液)溶液会蚀刻Oxide TFT中的IGZO层，LTPS TFT中的ILD层在完成后其内含有的大量残留的H会破坏Oxide TFT中的IGZO层的电性，以及LTPS TFT和Oxide TFT两者共用膜层的膜厚要求不一致以及因两者厚度不同而导致的深浅孔的蚀刻不同等等问题。
因此，确有必要来开发一种新型的TFT阵列基板，来克服现有技术中的缺陷。
发明内容
本发明的一个方面是提供一种TFT阵列基板，其采用新型的膜层结构设计，使得其上设置的LTPS(Low Temperature Poly-Silicon)TFT和Oxide TFT在设计和制程工艺上能够得到很好的兼容，从而有效的减小两者所在的LTPO型阵列基板的制程风险。
本发明采用的技术方案如下：
一种TFT阵列基板，其定义有第一区域和第二区域；其包括基板层，其中所述基板层在所述第一区域上设置有第一TFT，在所述第二区域上设置有第二TFT。其中所述第一TFT为顶栅型TFT，所述第二TFT为底栅型TFT，其中所述第一TFT的源漏极层采用的材料与所述第二TFT的栅极层所采用的材料一致。
进一步的，在不同实施方式中，其中所述第一TFT的源漏极层与所述第二TFT的栅极层是在制程中的同一工艺步骤中形成的。
进一步的，在不同实施方式中，其中所述第一区域为GOA区域，所述第一TFT为LTPS型TFT。
进一步的，在不同实施方式中，其中所述第二区域为显示区域(AA区)，所述第二TFT为氧化物半导体型TFT。
进一步的，在不同实施方式中，其中所述第二TFT中用作有源层(Active)的氧化物半导体层采用的材料包括In-Ga-Zn-O、In-Ga-O、Ga-Zn-O、In-Hf-Zn-O、In-Sn-Zn-O、In-Sn-O、In-Zn-O、Zn-Sn-O和In-Al-Zn-O等氧化物半导体材料中的一种。
进一步的，本发明的又一方面是提供一种本发明涉及的所述TFT阵列基板的制备方法，其包括以下步骤：
步骤S1、提供一基板层，其定义有第一区域和第二区域，于所述基板层的第一区域制备完成所述第一TFT；
步骤S2、于所述基板层的第二区域制备完成所述第二TFT；
其中，在所述步骤S1中，在进行所述第一TFT的源漏极层制备的同时，也进行所述第二TFT的栅极层的制备，进而使得两者在同一步骤中同时完成。也就是说，所述第一TFT的源漏极层和第二TFT的栅极层是同时完成的，其中在一个实施方式中，其可以是在所述基板上进行一导电层的沉积，然后对该导电层进行图案化，刻蚀后的结果是该导电层图案化后分别成为所述第一TFT的源漏极层和所述第二TFT的栅极层。
进一步的，在不同实施方式中，在所述步骤S1中，其中所述第一TFT的制备包括以下子步骤：
S11、于所述第一区域上制备Poly型有源层；
S12、于所述有源层上制备第一栅极绝缘层(GI)；
S13、于所述栅极绝缘层上制备用作栅极层(GE1)的第一金属层(M1)；
S14、于所述第一金属层上制备层间介质层(ILD)；以及
S15、于所述层间介质层上制备第二金属层(M2)用作源漏极层；
其中在所述步骤S15中，所述第二金属层是整层沉积在所述第一区域和第二区域上，对其进行图案化和刻蚀处理后，其会分别在所述第一区域形成所述第一TFT的源漏极层，而在所述第二区域则是形成用作所述第二TFT的栅极层(GE2)。
进一步的，在不同实施方式中，在所述步骤S2中，其中所述第二TFT的制备包括以下子步骤：
S21、于所述第一区域和第二区域上制备第二栅极绝缘层(GI2)，并于所述第二区域上的所述第二栅极绝缘层上制备用作有源层(Active)的半导体金属氧化物层；
S22、于所述第一区域和第二区域上制备蚀刻阻挡层(Etch Stop Layer，ESL)，其中所述蚀刻阻隔层在所述第二区域是设置在所述半导体金属氧化物层上；以及
S23、于所述第二区域的所述蚀刻阻隔层上制备作为所述第二TFT的源漏极层的第三金属层(M3)。
进一步的，在不同实施方式中，本发明涉及的所述TFT阵列基板的制备方法还包括步骤S3，其为进行所述TFT阵列基板包括的平坦层、公共电极层、钝化层和像素电极层的制备。
进一步的，本发明的又一方面是提供一种显示面板，其采用本发明涉及的所述TFT阵列基板。
进一步的，在不同实施方式中，其中所述显示面板优选为LCD显示面板。
相对于现有技术，本发明的有益效果是：本发明涉及的一种TFT阵列基板，其采用新型的工艺制程并结合新型的功能层结构设置，于所在玻璃基板上的不同区域向后进行两种不同类型的TFT制备，使得对于所述第一TFT的制备不会影响到对于所述第二TFT的制备，从而降低了整个所在TFT阵列基板的制程风险，进而提升了所在TFT阵列基板上的器件的稳定性。
进一步的，本发明采用的新型的功能层设置方案，也相应的优化了其所在TFT阵列基板的制程，其通过设置所述第一TFT的源漏极层采用的材料与所述第二TFT的栅极层采用的材料一致的方式，使得所述第一TFT和第二TFT的工艺制程在这一步骤中巧妙的衔接在一起，即所述第一TFT的源漏极层和第二TFT的栅极层在同一光罩(Mask)工艺步骤中通过对同一导电层图案化而同时完成，而不是所述两个类型的TFT的制备完全的前后独立分开进行；相应的，也节省了整个阵列基板制程工艺中的一个光罩(Mask)工艺，进而在一定程度上，既节省了本发明涉及的所述TFT阵列基板的整体制程步骤，又节省了其制备成本。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明的一个实施方式中提供的一种TFT阵列基板的制备方法，其步骤S1中的S11子步骤完成后的结构示意图；
图2为图1所述的TFT阵列基板的制备方法，其步骤S1中的S12子步骤完成后的结构示意图；
图3为图1所述的TFT阵列基板的制备方法，其步骤S1中的S13子步骤完成后的结构示意图；
图4为图1所述的TFT阵列基板的制备方法，其步骤S1中的S14子步骤完成后的结构示意图；
图5为图1所述的TFT阵列基板的制备方法，其步骤S1中的S15子步骤完成后的结构示意图；
图6为图1所述的TFT阵列基板的制备方法，其步骤S2中的S21子步骤完成后的结构示意图；
图7为图1所述的TFT阵列基板的制备方法，其步骤S2中的S22子步骤完成后的结构示意图；
图8为图1所述的TFT阵列基板的制备方法，其步骤S2中的S23子步骤完成后的结构示意图；以及
图9为图1所述的TFT阵列基板的制备方法，其步骤S3完成后的结构示意图。
具体实施方式
以下将结合附图和实施例，对本发明涉及的一种TFT阵列基板、其制备方法及其显示面板的技术方案作进一步的详细描述。
其中由于本发明同时涉及一种TFT阵列基板及其制备方法，为避免不必要的赘述，以下将结合本发明涉及的所述TFT阵列基板的制备方法对本发明涉及的所述TFT阵列基板的结构进行举例式说明。
本发明的一个实施方式提供了一种TFT阵列基板的制备方法，其包括以下步骤：
步骤S1、提供一基板层，其定义有第一区域100和第二区域200，于所述基板层的第一区域制备完成所述第一TFT。其中所述第一区域100优选为GOA区，所述第二区域200优选为显示区(AA区)，所述基板层具体可以包括玻璃基板层(Array Glass)101以及其上设置的缓冲层(Buffer)102，但不限于。
其具体实施包括以下子步骤：
S11、依次通过Mask 1和Mask 2工艺于所述第一区域100的缓冲层102上制备Poly型有源层103，完成后的结构图示请参阅图1所示；
S12、于所述有源层103上制备第一栅极绝缘层(GI)104，完成后的结构图示请参阅图2所示；
S13、通过Mask 3工艺于所述栅极绝缘层104上制备用作栅极层(GE1)的第一金属层(M1)105，完成后的结构图示请参阅图3所示；
S14、通过Mask 4工艺于所述第一金属层105上制备层间介质层(ILD)106，完成后的结构图示请参阅图4所示；以及
S15、通过Mask 5工艺于所述层间介质层上制备第二金属层(M2)用作所述第一TFT的源漏极层107，完成后的结构图示请参阅图5所示；
其中在所述步骤S15中，所述第二金属层是整层沉积在所述第一区域100和第二区域200上，对其进行图案化和刻蚀处理后，则分别在所述第一区域形成所述第一TFT的源漏极层107，而在所述第二区域则是形成用作所述第二TFT的栅极层(GE2)201。
步骤S2、于所述基板层的第二区域200制备完成所述第二TFT；
S21、通过Mask 6工艺于所述第一区域100和第二区域200上制备第二栅极绝缘层(GI2)202，并于所述第二区域200上的所述第二栅极绝缘层202上制备用作有源层(Active)的半导体金属氧化物层(IGZO)203，完成后的结构图示请参阅图6所示；
S22、通过Mask 7工艺于所述第一区域100和第二区域200上制备蚀刻阻挡层(EtchStop Layer，ESL)204,所述蚀刻阻隔层204在所述第二区域200是设置在所述半导体金属氧化物层203上，完成后的结构图示请参阅图7所示；以及
S23、通过Mask 8工艺于所述第二区域的所述蚀刻阻隔层204上制备作为所述第二TFT的源漏极层的第三金属层(M3)205，完成后的结构图示请参阅图8所示。
步骤S3、其为分别通过Mask 9～Mask 12工艺分别进行所述TFT阵列基板包括的平坦层(PLN)206、公共电极层(BITO)207、钝化层(PV)208以及像素电极层(ITO)209的制备，完成后的结构图示，请参阅图9所示。同时图9所示的阵列基板结构，也为本发明涉及的所述阵列基板的完整图示。
进一步的，本发明的又一方面是提供一种显示面板，其采用本发明涉及的所述TFT阵列基板。其中所述显示面板优选为LCD显示面板。
本发明涉及的一种TFT阵列基板，其采用新型的工艺制程并结合新型的功能层结构设置，于所在玻璃基板上的不同区域向后进行两种不同类型的TFT制备，使得对于所述第一TFT的制备不会影响到对于所述第二TFT的制备，从而降低了整个所在TFT阵列基板的制程风险，进而提升了所在TFT阵列基板上的器件的稳定性。
进一步的，本发明采用的新型的功能层设置方案，也相应的优化了其所在TFT阵列基板的制程，其通过设置所述第一TFT的源漏极层采用的材料与所述第二TFT的栅极层采用的材料一致的方式，使得所述第一TFT和第二TFT的工艺制程在这一步骤中巧妙的衔接在一起，即所述第一TFT的源漏极层和第二TFT的栅极层在同一光罩(Mask)工艺步骤中通过对同一导电层图案化而同时完成，而不是所述两个类型的TFT的制备完全的前后独立分开进行；相应的，也节省了整个阵列基板制程工艺中的一个光罩(Mask)工艺，进而在一定程度上，既节省了本发明涉及的所述TFT阵列基板的整体制程步骤，又节省了其制备成本。
本发明的技术范围不仅仅局限于上述说明中的内容，本领域技术人员可以在不脱离本发明技术思想的前提下，对上述实施例进行多种变形和修改，而这些变形和修改均应当属于本发明的范围内。

Claims (10)

1.一种TFT阵列基板，其定义有第一区域和第二区域；其特征在于，其包括基板层，其中所述基板层在所述第一区域上设置有第一TFT，在所述第二区域上设置有第二TFT；
其中所述第一TFT为顶栅型TFT，所述第二TFT为底栅型TFT；其中所述第一TFT的源漏极层采用的材料与所述第二TFT的栅极层采用的材料一致。
2.根据权利要求1所述的TFT阵列基板；其特征在于，其中所述第一TFT的源漏极层与所述第二TFT的栅极层是在同一工艺步骤中形成的。
3.根据权利要求1所述的TFT阵列基板；其特征在于，其中所述第一区域为GOA区域，所述第一TFT为LTPS型TFT。
4.根据权利要求1所述的TFT阵列基板；其特征在于，其中所述第二区域为显示区域，所述第二TFT为氧化物半导体型TFT。
5.根据权利要求4所述的TFT阵列基板；其特征在于，其中所述第二TFT中用作有源层的氧化物半导体层采用的材料包括In-Ga-Zn-O、In-Ga-O、Ga-Zn-O、In-Hf-Zn-O、In-Sn-Zn-O、In-Sn-O、In-Zn-O、Zn-Sn-O和In-Al-Zn-O等氧化物半导体材料中的一种。
6.一种制备根据权利要求1所述的TFT阵列基板的制备方法；其特征在于，其包括以下步骤：
步骤S1、提供一基板层，其定义有第一区域和第二区域，于所述基板层的第一区域制备完成所述第一TFT；以及
步骤S2、于所述基板层的第二区域制备完成所述第二TFT；
其中，在所述步骤S1中，在进行所述第一TFT的源漏极层制备的同时，也进行所述第二TFT的栅极层的制备，进而使得两者在同一步骤中完成。
7.根据权利要求6所述的制备方法；其特征在于，在所述步骤S1中，其中所述第一TFT的制备包括以下子步骤：
S11、于所述第一区域上制备Poly型有源层；
S12、于所述有源层上制备第一栅极绝缘层；
S13、于所述栅极绝缘层上制备用作栅极层的第一金属层；
S14、于所述第一金属层上制备层间介质层；以及
S15、于所述层间介质层上制备第二金属层用作源漏极层；
其中在所述步骤S15中，所述第二金属层是整层沉积在所述第一区域和第二区域上，对其进行图案化和刻蚀处理后，其会分别在所述第一区域形成所述第一TFT的源漏极层，而在所述第二区域则是形成用作所述第二TFT的栅极层。
8.根据权利要求6所述的制备方法；其特征在于，在所述步骤S2中，其中所述第二TFT的制备包括以下子步骤：
S21、于所述第一区域和第二区域上制备第二栅极绝缘层，并于所述第二区域上的所述第二栅极绝缘层上制备用作有源层的半导体金属氧化物层；
S22、于所述第一区域和第二区域上制备蚀刻阻挡层，其中所述蚀刻阻隔层在所述第二区域是设置在所述半导体金属氧化物层上；以及
S23、于所述第二区域的所述蚀刻阻隔层上制备作为所述第二TFT的源漏极层的第三金属层。
9.根据权利要求6所述的制备方法；其特征在于，其还包括步骤S3，其为进行所述TFT阵列基板包括的平坦层、公共电极层、钝化层和像素电极层的制备。
10.一种显示装置；其特征在于，其包括根据权利要求1所述的TFT阵列基板。
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