CN110797404B - 一种rc-igbt半导体器件 - Google Patents

一种rc-igbt半导体器件 Download PDF

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CN110797404B
CN110797404B CN201910994404.XA CN201910994404A CN110797404B CN 110797404 B CN110797404 B CN 110797404B CN 201910994404 A CN201910994404 A CN 201910994404A CN 110797404 B CN110797404 B CN 110797404B
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Abstract

本发明公开了一种RC‑IGBT半导体器件,在1个半导体衬底形成有IGBT和FWD,IGBT具有p型基极层和n型漂移层和多个沟槽栅极结构,栅电极穿过p型基极层,p型基极层由栅电极分成多个间隔区域;在间隔区域中,p型基极层上表面设置有p+发射极区和n+发射极区,n+发射极及p型基极层的侧壁均与沟槽侧壁外表面相接触;FWD从上到下设置有多个虚拟沟道、p型基极层,虚拟沟道间隔穿过p型基层,并且虚拟沟道的底部到达衬底,在FWD的虚拟沟道与IGBT的栅电极之间的p型基极层上表面设置有p+阳极层;在FWD部分的n型漂移层的背面形成的多个间隔的深n+阴极区以及设置在深n+阴极区域间隔之间的浅p+阴极区。本发明实现了无振荡的内置FWD的RC‑IGBT半导体器件。

Description

一种RC-IGBT半导体器件
技术领域
本发明属于电力半导体技术领域,具体涉及一种RC-IGBT半导体器件。
背景技术
IGBT(Insulated Gate Bipolar Transistor),绝缘栅双极型晶体管,可视为双极型大功率晶体管与功率场效应晶体管的复合。IGBT是由BJT(双极型三极管)和MOS(绝缘栅型场效应管)组成的复合全控型电压驱动式功率半导体器件,兼有MOSFET的高输入阻抗和GTR的低导通压降两方面的优点。通过提供晶体管基极电流使IGBT导通;反之,若提供反向门极电压则可消除沟道、使IGBT因流过反向门极电流而关断。
IGBT集GTR通态压降小、载流密度大、耐压高和功率MOSFET驱动功率小、开关速度快、输入阻抗高、热稳定性好的优点于一身,因此备受人们青睐。它的研制成功为提高电力电子装置的性能,特别是为逆变器的小型化、高效化、低噪化提供了有利条件,使其能够用于机车列车、电动汽车列车和混合动力电动汽车。太阳能和风能等可再生能源领域的增长导致了对大功率IGBT的需求。
然而,变换器/逆变器技术的快速开关速度有可能由于高的di/dt、dv/dt而引起电磁干扰。所有电力电子设备都会产生并发出有害的电信号(EMI噪声),从而导致其他电气/电子设备性能下降。它们产生高频传导和辐射的EMI噪声,并由于具有高dv/dt的开关波形的形状边缘而产生畸变线电流。不良的电磁干扰效应包括对无线系统(无线电、电视、移动、数据传输)的干扰、生物医学设备的故障、电动汽车和电动汽车中的ABS制动系统和电子控制系统。
由于IGBT模块在几百纳秒的时间内接通和断开几百个电压和电流,因此IGBT模块的高dv/dt和di/dt很容易产生传导发射和辐射发射。这些高的dv/dt和di/dt是由IGBT的关断波形和内置FWD的反向恢复波形造成的。
如图1所示是传统RC-IGBT器件的半桥电路电流电压与反向恢复波形,从图中可以看得出,当IGBT开关速度较高,IGBT关断时及FWD反向恢复时产生很高的di/dt,由于模块周围的接线的电感就产生了关断浪涌电压。图中示出了IGBT关断时的动作波形,关断浪涌电压因IGBT关断时主电路电流急剧变化在主电路分布电感上就会产生较高的电压。内置式FWD在IGBT关断时产生较高的尖峰电压并在FWD反向恢复时电压产生振荡。图1(c)显示了FWD快速反向恢复的波形形式,而快速波形导致了恢复阶段结束时由于高di/dt而产生的电流振荡。
因此在不牺牲任何IGBT模块性能的前提下,如何在IGBT的关断阶段避免高的di/dt和dv/dt引起的电压和电流的振荡是本领域要解决的技术问题。
发明内容
本发明所要解决的技术问题是在不牺牲任何IGBT模块性能的前提下,如何在IGBT的关断阶段避免高的di/dt和dv/dt引起的电压和电流的振荡,提供一种RC-IGBT半导体器件。
为解决上述技术问题,本发明采用以下技术方案:
提供1.一种RC-IGBT半导体器件,在1个半导体衬底形成有IGBT和FWD,其特征在于,IGBT具有:
p型基极层和n型漂移层,所述p型基极层形成在n型漂移层的表面;
多个沟槽栅极结构,每个所述沟槽栅极结构包括在所述衬底上的沟槽和经由绝缘膜位于所述沟槽中的导电膜以及IGBT元件的多晶硅栅电极和栅氧化层;所述衬底上的所述沟槽内设置有SiO2栅氧层,SiO2栅氧层上沉积有多晶硅;所述栅电极穿过所述p型基极层,所述p型基极层由所述栅电极分成多个间隔区域;
在所述间隔区域中,所述p型基极层上表面设置有p+发射极区和n+发射极区,所述p+发射极区与所述N+发射极区并排设置且所述N+发射极区设置在p+发射极区的两侧;n+发射极区设置在所述间隔区域的表面部分中,所述n+发射极及p型基极层的侧壁均与沟槽侧壁外表面相接触,所述n+发射极区和p+发射极区均与发射极电极电耦合;
所述n型漂移层底部具有n型电场阻止层;n型电场阻止层背面与p+集电极区相接触,所述p+集电极区与集电极电极电耦合;
FWD具有:从上到下设置有多个虚拟沟道、p型基极层,他们形成在n型漂移层的表面;所述虚拟沟道经由作为信号线而彼此共同耦合在一起与发射极电极相连;
虚拟沟道间隔穿过p型基层,并且虚拟沟道的底部到达衬底;在FWD的虚拟沟道与IGBT的栅电极之间的p型基层上表面也设置有p+阳极层;
在FWD部分的n型漂移层的背面形成的多个间隔的深n+阴极区以及设置在深n+阴极区域间隔之间的浅p+阴极区,所述n+阴极区和p+阴极区与所述集电电极电连接。本发明通过这样设计实现低寄生电容,获得低集电极发射极饱和压降VCE(sat)和大短路电流安全工作区。
优选地,所述n+发射极区具有所述高于所述衬底的杂质浓度。
进一步地,在发射极区的p型基极层下方且在IGBT的栅电极和FWD的虚拟沟道之间设置N型半导体阻挡层。
作为N阱的N型半导体阻挡层设置在发射极区和作为p阱的p型基极层下方且在IGBT的栅电极和FWD的虚拟沟道之间,在IGBT导通时防止释放空穴。因此降低了导通状态电压Von和正向电压,避免了栅电极中的电位的影响。此外由于n型半导体层不接触沟槽的侧壁,因此抑制了沟槽附近场的增大,从而提高了击穿电压。
进一步地,在FWD部分的阳极部分的正下方设置了寿命控制区,所述寿命控制区在深n+阴极区和浅p+阴极区的上方。
再进一步地,所述寿命控制区采用氦离子注入的方式形成。
再进一步地,所述半导体器件起始材料为不锈钢,具有对氦离子的屏蔽能力,材料厚度为100μm~200μm,接着进行了光致抗蚀层压工艺,并进行了曝光和显影;之后,材料被化学腐蚀;最后,采用扩散连接技术连接两个蚀刻的不锈钢掩。
发明所达到的有益效果:
本发明实现低寄生电容,获得低集电极发射极饱和压降VCE(sat)和大短路电流安全工作区;
本发明降低了导通状态电压Von和正向电压,避免了栅电极中的电位的影响。此外由于n型半导体层不接触沟槽的侧壁,因此抑制了沟槽附近场的增大,从而提高了击穿电压。
本发明采用了一种寿命控制技术,并采用了新的阴极结构来实现无振荡的内置FW。
附图说明
图1是传统RC-IGBT器件的半桥电路电流电压与反向恢复波形,其中1(a)是半桥电路,1(b)是IGBT的电流和电压,1(c)是快速反向恢复;
图2是FWD反向恢复时的电压和电流振荡示意图;
图3(a)是FWD反向恢复时的典型反向恢复波形态;图3(b)是FWD反向恢复时的随时间变化的空穴载流子密度;
图4是IGBT关断瞬态时的载波分布示意图;
图5是本发明具体实施例RC-IGBT的横截面示意图;
图6是本发明具体实施例RC-IGBT的横截面示意图;
图7是本发明具体实施例RC-IGBT的横截面示意图;
图8是本发明具体实施例RC-IGBT的横截面示意图;
图中标记:1:FWD;2:IGBT;3:n+阴极区;4:n型电场阻止层;5:n型漂移层;6:寿命控制区;7:栅电极;8:p+集电极区;9:集电极电极;10:p+阴极区;11:n型半导体阻挡层;12:发射极电极;13:虚拟沟道;14:绝缘膜;15:p+阳极区;16:p型基极层;17:n+发射极区;18:p+发射极区。
具体实施方式
下面结合附图对本发明作进一步描述。以下实施例仅用于更加清楚地说明本发明的技术方案,而不能以此来限制本发明的保护范围。
实施方式1
图5是表示本发明的实施方式1涉及的半导体器件的剖视图。
该半导体器件适用于电动汽车和混合动力车的逆变器模块中的功率切换器件。该半导体装置在1个半导体衬底形成有IGBT2(Insulated Gate Bipolar Transistor)即绝缘栅双极晶体管和FWD1(Free Wheeling Diode)即续流二极管的RC-IGBT2。在此,半导体的衬底的厚度方法垂直于衬底,并且将垂直于厚度方向的一个方向定义为衬底的平行方向。平行方向平行于集电极区域和阴极区域的布置方向。衬底包括在其中形成IGBT2和FWD1的区域。衬底由具有N-导电类型的杂质浓度为1×1014cm-3的单晶体硅制成的。在衬底的表面部分形成作为p阱的P型基极层16。
在n+发射极区17中刻蚀形成沟槽作为槽,使得沟槽穿透p型基极层16,且沟槽的底部到达衬底。在沟槽的内壁上形成绝缘膜14。经由绝缘膜14在沟槽中填充多晶硅膜。多晶硅膜具有1×1020cm-3的杂质浓度。多晶硅膜提供栅电极7。包括多个栅电极7,它们经由作为栅极布线的信号线而彼此共同耦合在一起。经由信号线将驱动信号从栅极焊盘输入到每个栅电极7,从而将预定电压施加到每个栅电极7,于是,栅电极7具有相同的电位。每个栅电极7沿着垂直于厚度方向和平行方向的方向衍生,使得栅电极7在整个基极层上延伸。
半导体衬底不限于由硅形成,也可以由与硅相比带隙宽的宽带隙半导体形成。宽带隙半导体为例如碳化硅、氮化镓类材料或者金刚石。由这样的宽带隙半导体形成的半导体装置的耐电压性、容许电流密度高,因此能够小型化。
图5的器件中IGBT2具有:p型基极层16和n型漂移层5,p型基极层16形成在n型漂移层5的表面;
还包括多个沟槽栅极结构,每个沟槽栅极结构包括在衬底上的沟槽和经由绝缘膜14位于沟槽中的导电膜以及IGBT2元件的多晶硅栅电极7和栅氧化层;栅电极7穿过p型基极层16,p型基极层16由栅电极7分成多个间隔区域;
在间隔区域中,p型基极层16上表面设置有p+发射极区18和n+发射极区17,p+发射极区18与N+发射极区17并排设置且N+发射极区17设置在p+发射极区18的两侧;n+发射极区17设置在间隔区域的表面部分中,n+发射极及p型基极层16的侧壁均与沟槽侧壁外表面相接触,n+发射极区17具有所述高于所述衬底的杂质浓度;n+发射极区17与发射极电极电耦合;
n型漂移层5底部具有n型电场阻止层4;n型电场阻止层4背面与p+集电极区8相接触,p+集电极区8与集电极电极9电耦合连接。IGBT2的表面侧的MOS构造而言,通过栅极施加电压,从而经过沟道将电子供给至n型漂移层5。
FWD1具有:从上到下设置有多个虚拟沟道13、p型基层,他们形成在n型漂移层5的表面;所述虚拟沟道13包括在所述衬底上的沟槽和经由绝缘膜14位于所述沟槽中的导电膜;虚拟沟道13间隔穿过p型基层,并且虚拟沟道13的底部到达衬底,虚拟沟道13之间的p型基层上表面还设置有p+阳极层,虚拟沟道13经由作为信号线而彼此共同耦合在一起与发射极电极相连;在FWD1的虚拟沟道13与IGBT2的栅电极7之间的p型基层上表面也设置有p+阳极层。这样设计实现低寄生电容,获得低集电极发射极饱和压降VCE(sat)和大短路电流安全工作区。
n型漂移层5,n型漂移层5设置在FWD1的阳极结构和阴极结构之间,在n型漂移层5的背面形成的多个深n+阴极区3以及设置在深n+阴极区3之间的浅p+阴极区10。
衬底上的所述沟槽内设置有SiO2栅氧层,SiO2栅氧层上沉积有多晶硅。
在具体实施例中,发射极电极采用AI-Si-Cu合金;集电极电极采用的金属材料为AuGe/Ni/Ag/Au金属层。
实施方式二
在实施方式一的基础上,在发射极区的p型基极层16下方且在IGBT2的栅电极7和FWD1的虚拟沟道13之间设置N型半导体阻挡层11(如图6所示)。
作为N阱的N型半导体阻挡层11设置在发射极区和作为p阱的p型基极层16下方且在IGBT2的栅电极7和FWD1的虚拟沟道13之间,在IGBT2导通时防止释放空穴。因此降低了导通状态电压Von和正向电压,避免了栅电极7中的电位的影响。此外由于n型半导体层不接触沟槽的侧壁,因此抑制了沟槽附近场的增大,从而提高了击穿电压。
N型半导体阻挡层11位于IGBT2的p基极层和FWD1的虚拟沟槽之间的P型阳极之间的下方。N型半导体阻挡层11在IGBT2部分起到空穴载流子存储,导致低集电极发射极饱和压降VCE(sat),并在FWD1部分起到发射极电极的空穴载流子屏障。N-空穴势垒层可以将FWD1部分的虚拟沟道13与发射极电极连接起来。
IGBT2的沟槽栅结构与FWD1的虚拟沟道13之间是独立的。对于传统的RC-IGBT2来说,虚拟沟道13栅和发射极电极之间是不能连接的因为空穴很容易进入到发射极,这意味着没有空穴存储在n空穴势垒下。增加的N型半导体阻挡层11作为空穴势垒导致低寄生电容,并且虚拟沟道13单元能够在短路、较低的集电极发射极饱和压降VCE(sat)和高速IGBT2下实现较低的饱和电流。
实施方式三
在实施方式一的基础上,在FWD1部分的阳极部分的正下方设置了寿命控制区6,所述寿命控制区6在深n+阴极区3和浅p+阴极区10的上方。
利用图3详细描述了快速恢复产生的噪声振荡问题。
在恢复阶段,由于阳极区下的寿命控制区6,n-漂移层5中的低存储载流子密度位于阳极区下方,因此耗尽层迅速扩展到阴极中的n缓冲层。传统的RC-IGBT2中的FWD1由于在N区有一个较大的存储的载流子,显示出相对缓慢的耗尽扩展速度,从而导致较高的峰值恢复电流,存储的电子将流向阴极区域,因此最好经接触n+区域进入阴极。
当耗尽层开始靠近具有n-电场阻止层和深n+阴极是,内部pnp+晶体管的增益将增加并触发从浅p+阴极区10的空穴注入。该空穴电流量增加从存储的过剩载流子产生的反向恢复电流,此外,还将减缓阴极浅p+阴极区域10下方过剩载流子的耗尽。从峰值反向电流相位后的恢复阶段,完全提取了n+阴极下存储载流子,电场在阴极区穿透到n+电场阻止层。在传统的FWD1会突然关断并引起广泛的振荡。
在本实施例中,由于注入的空穴电流和p+区域下方的剩余存储的载流子,不会发生振荡,这两种载流子都使恢复电流缓慢下降到零。
N型半导体层,防止空穴经由沟槽和N型半导体层之间的界面释放到基极层。于是镜像电容小,并且有效地积累了载流子。
实施方式三
基于以上分析,在实施方式一的基础上,本实施方式在FWD1部分的阳极部分的正下方设置了寿命控制区6,所述寿命控制区6在深n+阴极区3和浅p+阴极区10的上方(如图7所示)。
实施方式四
基于以上分析,在实施方式二的基础上,本实施方式在FWD1部分的阳极部分的正下方设置了寿命控制区6,所述寿命控制区6在深n+阴极区3和浅p+阴极区10的上方(如图8所示)。
在以上实施方式基础上,所述寿命控制区6采用氦离子注入的方式形成。首先研究内置式FWD1反向恢复时和IGBT2关断时的载流子分布随时间的变化,如图3和图4所示。从仿真研究和理论考虑来看,在N漂移区实现少量载流子以实现快速恢复,而在低通态电压降下实现大量的存储载流子是低损耗前馈的必要条件。简而言之,反馈恢复时间反向恢复时间trr和通态电压降vf之间存在一种权衡关系。振荡产生的机理可以解释为,如前所述,由于快速反向恢复,所有快速FWD1都可能产生过大的电流和电压振荡。如图3(b)所示,存储在n-漂移区的空穴载流子从p+阳极区15显著减少到n+阴极区3,随着电压的增加,损耗扩展。为了获得更高的击穿电压,应设计尽可能薄的n-层厚度,以降低通态电压降。一般来说,当接近击穿电压时,耗尽层被设计成刚好穿透N+阴极层。但是,如图3(a)所示的tf说明了恢复阶段,当时的耗尽层接近n+阴极区3域,剩余的载流子非常小,因为耗尽层已经穿透了图3(b)所示的n+阴极区3域,剩余载流子数目很小,很容易导致尖峰电压,如图3(a)所述,从而导致振荡发生。从这一考虑可以说,载流子的分布在p+阳极区15附近应该较小,在N-阴极附近应该较大。峰值恢复电流通过后,当恢复电流接近0时,出现较高的di/dt。因此,当接近恢复电流相位tf时,产生高的di/dt,实现无振荡内置的FWD1对产生N+阴极区3附近的载流子是至关重要的。如前所述,新生成的载波会导致软反向恢复。因此,没有振荡的内置式FWD1能够实现。为了实现这一目标,本发明采用了一种寿命控制技术,并采用了新的阴极结构来实现无振荡的内置FWD1。图4显示了IGBT2的n-漂移区载流子剖面随时间的变化,利用沟道电场阻止层IGBT2已经是新了高IGBT2性能。传统的IGBT2模块在电机控制应用中需要外部的FWD1寿命控制。
在FWD1中,阳极和n型漂移层5的载流子注入效率是由氦离子的局部寿命控制来调整的。
在以上实施方式基础上,采用用于屏蔽氦离子注入的掩模工艺。一般来说,IGBT区域的宽度为100~200μm,而FWD区域的宽度为50~100μm,因此必须采用μm级掩蔽技术。
所述半导体器件起始材料为不锈钢,具有对氦离子的屏蔽能力,材料厚度为100μm~200μm,接着进行了光致抗蚀层压工艺,并进行了曝光和显影;之后,材料被化学腐蚀;最后,采用扩散连接技术连接两个蚀刻的不锈钢掩。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明技术原理的前提下,还可以做出若干改进和变形,这些改进和变形也应视为本发明的保护范围。

Claims (5)

1.一种RC-IGBT半导体器件,在1个半导体衬底形成有IGBT和FWD,其特征在于,IGBT具有:p型基极层和n型漂移层,所述p型基极层形成在n型漂移层的表面;
多个沟槽栅极结构,每个所述沟槽栅极结构包括在所述衬底上的沟槽和经由绝缘膜位于所述沟槽中的导电膜以及IGBT元件的多晶硅栅电极和栅氧化层;
所述衬底上的所述沟槽内设置有SiO2栅氧层,SiO2栅氧层上沉积有多晶硅;
所述栅电极穿过所述p型基极层,所述p型基极层由所述栅电极分成多个间隔区域;
在所述间隔区域中,所述p型基极层上表面设置有p+发射极区和n+发射极区,所述p+发射极区与所述n+发射极区并排设置且所述n+发射极区设置在p+发射极区的两侧;
n+发射极区设置在所述间隔区域的表面部分中,所述n+发射极及p型基极层的侧壁均与沟槽侧壁外表面相接触,所述n+发射极区和p+发射极区均与发射极电极电耦合;
所述n型漂移层底部具有n型电场阻止层;
n型电场阻止层背面与p+集电极区相接触,所述p+集电极区与集电极电极电耦合;
FWD具有:从上到下设置有多个虚拟沟道、p型基极层,他们形成在n型漂移层的表面;所述虚拟沟道经由作为信号线而彼此共同耦合在一起与发射极电极相连;
虚拟沟道间隔穿过p型基层,并且虚拟沟道的底部到达衬底,在FWD的虚拟沟道与IGBT的栅电极之间的p型基层上表面也设置有p+阳极层;
在FWD部分的n 型漂移层的背面形成的多个间隔的n+阴极区以及设置在n+阴极区间隔之间的p+阴极区,所述n+阴极区的深度大于p+阴极区的深度,所述n+阴极区和p+阴极区与集电极电极电连接;
在发射极区的p型基极层下方且在IGBT的栅电极和FWD的虚拟沟道之间设置N型半导体阻挡层;
在FWD部分的阳极部分的正下方设置了寿命控制区,所述寿命控制区在深n+阴极区和浅p+阴极区的上方。
2.根据权利要求1所述的一种RC-IGBT半导体器件,其特征在于,所述n+发射极区具有高于所述衬底的杂质浓度。
3.根据权利要求1所述的一种RC-IGBT半导体器件,其特征在于,所述寿命控制区采用氦离子注入的方式形成。
4.根据权利要求3所述的一种RC-IGBT半导体器件,其特征在于,所述半导体器件起始材料为不锈钢材料,具有对氦离子的屏蔽能力,接着进行了光致抗蚀层压工艺,并进行了曝光和显影;之后,材料被化学腐蚀;最后,采用扩散连接技术连接两个蚀刻的不锈钢掩。
5.根据权利要求4所述的一种RC-IGBT半导体器件,其特征在于,所述不锈钢材料厚度为100μm~200μm。
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