CN110634885B - 阵列基板及其制备方法 - Google Patents

阵列基板及其制备方法 Download PDF

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CN110634885B
CN110634885B CN201910768489.XA CN201910768489A CN110634885B CN 110634885 B CN110634885 B CN 110634885B CN 201910768489 A CN201910768489 A CN 201910768489A CN 110634885 B CN110634885 B CN 110634885B
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尹炳坤
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Wuhan China Star Optoelectronics Technology Co Ltd
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Abstract

本发明提供一种阵列基板及其制备方法，包括基板、缓冲层、若干薄膜晶体管、有机层以及第一电极。通过将弯折区相邻薄膜晶体管之间设置一通孔，所述通孔贯穿所述钝化层、所述栅极绝缘层以及所述第一金属走线，能有效的缓和所述钝化层以及所述栅极绝缘层的应力。同时垂直于弯折方向的第一金属走线上形成所述镂空孔，所述楼空孔由所述通孔贯穿形成，所述镂空孔被有机层填充，所述镂空孔中的有机层能有效阻挡金属线中裂纹的扩展，降低所述第一金属线整根断裂风险。

Description

阵列基板及其制备方法
技术领域
本发明涉及显示领域，尤其是涉及一种阵列基板及其制备方法。
背景技术
相对于平面显示而言，曲面显示具有更广的视角，可以减少近距离观看的失真度，并且可以实现显示产品的差异化。然而显示屏弯曲时膜层应力较大，在现有设计，容易在显示屏弯曲时造成膜层断裂并影响显示效果。
由于阵列基板的阵列基板侧的膜层金属线、绝缘层以及透明电极均为较脆的无机材料，在液晶显示屏较小曲率半径弯折时易发生断裂影响显示效果。特别是金属线断裂会造成亮线或暗线等不良，影响阵列基板显示。
因此，急需提供一种新的阵列基板及其制备方法，用以减少阵列基板弯折时候产生的应力，进而提高阵列基板的可靠性。
发明内容
本发明的目的在于，提供一种阵列基板及其制备方法，通过将弯折区相邻薄膜晶体管之间设置一通孔，所述通孔贯穿薄膜晶体管，能有效的缓和无机层之间的应力，减少阵列基板弯折时候产生的应力，进而提高阵列基板的可靠性。
为了可以达到上述目的，本发明提供一种阵列基板，包括显示区以及至少一弯折区；所述阵列基板包括：基板；缓冲层，设于所述基板上；薄膜晶体管层，设于所述缓冲层远离所述基板上，所述薄膜晶体管层包括第一金属走线，所述薄膜晶体管层中形成有若干个薄膜晶体管，在相邻两个薄膜晶体管之间具有至少一通孔，所述通孔贯穿所述第一金属走线直至所述缓冲层表面；有机层，设于所述薄膜晶体管层上并且填充所述通孔；其中，所述通孔对应所述弯折区。
进一步地，所述有机层的材料为光刻胶；所述缓冲层的材料包括氮化硅或氧化硅。
进一步地，所述第一金属走线设于所述缓冲层远离所述基板的一侧；所述薄膜晶体管层还包括：栅极绝缘层，设于所述第一金属走线上；半导体层，设于所述栅极绝缘层远离所述第一金属走线的一侧；第二金属走线，设于所述半导体层以及所述栅极绝缘层上；钝化层，设于所述第二金属走线、所述半导体层以及所述栅极绝缘层上。
进一步地，在所述弯折区，所述第一金属走线具有若干镂空孔，所述镂空孔由所述通孔贯穿所述第一金属走线形成。
进一步地，所述镂空孔的形状包括圆形或方形；所述镂空孔均匀分布于所述第一金属走线上。
进一步地，所述镂空孔的直径为3～5um。
进一步地，所述基板包括玻璃基板以及透明基层，所述透明基层设于所述玻璃基板靠近所述缓冲层的一侧。
进一步地，所述半导体层的材料为铟镓锌氧化物；所述第二金属走线包括源极走线以及漏级走线；所述源极走线以及所述漏级走线分别连接所述半导体层。
进一步地，还包括一第一电极，设于所述有机层上，所述第一电极连接所述第二金属走线。
本发明还提供一种阵列基板的制备方法，包括如下步骤：提供玻璃基板，在所述玻璃基板上涂布透明基层，并通过预烤、固烤制备形成基板，所述基板具有至少一弯折区以及显示区；沉积缓冲层于所述基板上；沉积第一金属走线于所述缓冲层远离所述基板的一侧；沉积栅极绝缘层于所述第一金属走线上；沉积半导体层于所述栅极绝缘层远离所述第一金属走线的一侧；沉积第二金属走线于所述半导体层以及所述栅极绝缘层上；沉积钝化层于所述第二金属走线、所述半导体层以及所述栅极绝缘层上；在所述弯折区，形成至少一通孔，所述通孔贯穿所述钝化层、所述栅极绝缘层以及所述第一金属走线直至所述缓冲层表面；形成有机层于所述钝化层上以及所述通孔中；沉积第一电极于所述有机层上，所述第一电极连接所述第二金属走线。
本发明的有益效果是：本发明提供一种阵列基板及其制备方法，通过将弯折区相邻薄膜晶体管之间设置一通孔，所述通孔贯穿所述钝化层、所述栅极绝缘层以及所述第一金属走线，能有效的缓和所述钝化层以及所述栅极绝缘层的应力。同时垂直于弯折方向的第一金属走线上形成所述镂空孔，所述楼空孔由所述通孔贯穿形成，所述镂空孔被有机层填充，所述镂空孔中的有机层能有效阻挡金属线中裂纹的扩展，降低所述第一金属线整根断裂风险。
附图说明
下面结合附图和实施例对本发明作进一步的描述。
图1为本发明提供的阵列基板的结构示意图；
图2为本发明提供的阵列基板的剖面图；
图3为本发明提供的第一金属走线的结构示意图；
阵列基板100；
显示区110；弯折区120；
基板101；缓冲层102；薄膜晶体管层103；
有机层104；第一电极105；玻璃基板1011；
透明基层1012；第一金属走线1031；栅极绝缘层1032；
半导体层1033；第二金属走线1034；钝化层1035；
通孔106；镂空孔1031a；薄膜晶体管107。
具体实施方式
以下是各实施例的说明是参考附加的图式，用以例示本发明可以用实施的特定实施例。本发明所提到的方向用语，例如上、下、前、后、左、右、内、外、侧等，仅是参考附图式的方向。本发明提到的元件名称，例如第一、第二等，仅是区分不同的元部件，可以更好的表达。在图中，结构相似的单元以相同标号表示。
本文将参照附图来详细描述本发明的实施例。本发明可以表现为许多不同形式，本发明不应仅被解释为本文阐述的具体实施例。本发明提供这些实施例是为了解释本发明的实际应用，从而使本领域其他技术人员能够理解本发明的各种实施例和适合于特定预期应用的各种修改方案。
在本发明的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本发明中的具体含义。
如图1所示，本发明提供一种阵列基板100，所述阵列基板100可以为曲面显示。所述阵列基板100包括显示区110以及弯折区120；所述显示区110以及弯折区120都可以进行画面显示。
在本实施例中，本发明阵列基板100具有两个弯折区120，所述显示区110设于两个弯折区120之间。本发明阵列基板100能够提供曲面显示，具有更广的视角，可以减少近距离观看的失真度。
如图2所示，所述阵列基板100包括：基板101、缓冲层102、若干薄膜晶体管103、有机层104以及第一电极105。
所述基板101包括玻璃基板1011以及透明基层1012。
所述透明基层1012设于所述玻璃基板1011靠近所述缓冲层102的一侧。所述透明基层1012的材料为聚酰亚胺。
所述基板101通过在所述玻璃基板1011上涂布聚酰亚胺透明液，并通过预烤以及固烤制备形成。
所述缓冲层102设于所述基板101上；所述缓冲层102的材料包括氮化硅或氧化硅。所述缓冲层102通过化学气相沉积法形成。
所述薄膜晶体管层103设于所述缓冲层102远离所述基板101上。所述薄膜晶体管层103中形成有若干个薄膜晶体管107，在所述弯折区120，相邻薄膜晶体管107之间具有至少一通孔106，所述通孔106贯穿所述薄膜晶体管层中107的所述第一金属走线1031直至所述缓冲层102表面。所述通孔106对应所述弯折区120。
所述薄膜晶体管层103包括：第一金属走线1031、栅极绝缘层1032、半导体层1033、第二金属走线1034以及钝化层1035。
所述第一金属走线1031设于所述缓冲层102远离所述基板101的一侧。所述第一金属走线1031通过物理气相沉积法形成，并通过曝光、显影及蚀刻工艺制作所述第一金属走线1031图案。
如图3所示，在所述弯折区120，所述第一金属走线1031具有若干镂空孔1031a。
所述镂空孔1031a的形状为圆形或方形或；所述镂空孔1031a均匀分布于所述第一金属走线1031上。所述镂空孔1031a由所述通孔106贯穿所述第一金属走线1031形成。
本发明所述镂空孔1031a的形状为圆形，单行分布于所述第一金属走线1031上，所述镂空孔1031a的数量并未作出限制。所述镂空孔1031a的直径为3～5um，所述镂空孔1031a直径越大，填充有机层的材料越多，所述弯折区120可以承受更大的应力。
所述栅极绝缘层1032设于所述第一金属走线1031上。所述栅极绝缘层1032通过化学气相沉积法形成。
所述半导体层1033设于所述栅极绝缘层1032远离所述第一金属走线1031的一侧；所述半导体层1033的材料为铟镓锌氧化物。
所述半导体层1033通过物理气相沉积法形成，并通过曝光、显影及蚀刻工艺制作所述半导体层1033图案。
所述第二金属走线1034设于所述半导体层1033以及所述栅极绝缘层1032上；所述第二金属走线1034包括源极走线以及漏级走线；所述源极走线以及所述漏级走线分别连接所述半导体层1033。
所述第二金属走线1034通过物理气相沉积法形成，并通过曝光、显影及蚀刻工艺制作所述第二金属走线1034图案。
所述钝化层1035设于所述第二金属走线1034、所述半导体层1033以及所述栅极绝缘层1032上。
所述钝化层1035通过化学气相法形成，并曝光、显影及蚀刻。
所述有机层104设于所述薄膜晶体管层103上并且填充所述通孔106；所述有机层104的材料为有机光阻。
所述有机层104采用狭缝式涂布法形成，所述有机层104会填充所述通孔106，通过曝光、显影、烘烤及灰化形成有机层104图案。
所述第一电极105设于所述有机层104上，所述第一电极105连接所述第二金属走线1034。所述第一电极105的材料为氧化铟锡。
所述第一电极105通过物理气相沉积法形成，并通过曝光、显影及蚀刻制作所述第一电极105的图案。
本发明通过将弯折区120相邻薄膜晶体管107之间设置一通孔106，所述通孔106贯穿所述钝化层1035、所述栅极绝缘层1032以及所述第一金属走线1031，能有效的缓和所述钝化层1035以及所述栅极绝缘层1032的应力。同时垂直于弯折方向的第一金属走线1031上形成所述镂空孔1031a，所述楼空孔由所述通孔106贯穿形成，所述镂空孔1031a被有机层104填充，所述镂空孔1031a中的有机层104能有效阻挡金属线中裂纹的扩展，降低所述第一金属线整根断裂风险。
请参照图2，本发明还提供一种阵列基板的制备方法，包括如下步骤S1～S6。
S1)提供玻璃基板1011，在所述玻璃基板1011上涂布透明基层1012，并通过预烤、固烤制备形成基板101，所述基板包括显示区110以及至少一弯折区120。
S2)沉积缓冲层102于所述基板101上；所述缓冲层102的材料包括氮化硅或氧化硅。所述缓冲层102的沉积方式包括化学气相沉积法。
S3)沉积第一金属走线1031于所述缓冲层102上；所述第一金属走线1031通过物理气相沉积法形成，并通过曝光、显影及蚀刻工艺制作所述第一金属走线1031图案。
S4)沉积栅极绝缘层1032于所述第一金属走线1031上；所述栅极绝缘层1032通过化学气相沉积法形成。
S5)沉积半导体层1033于所述栅极绝缘层1032远离所述第一金属走线1031的一侧；所述半导体层1033通过物理气相沉积法形成，并通过曝光、显影及蚀刻工艺制作所述半导体层1033图案。
S6)沉积第二金属走线1034于所述半导体层1033以及所述栅极绝缘层1032上；所述第二金属走线1034通过物理气相沉积法形成，并通过曝光、显影及蚀刻工艺制作所述第二金属走线1034图案。
S7)沉积钝化层1035于所述第二金属走线1034、所述半导体层1033以及所述栅极绝缘层1032上。所述钝化层1035通过化学气相法形成，并曝光、显影及蚀刻。
S8)如图3所示，在所述弯折区120，形成至少一通孔106，所述通孔106所述钝化层1035、所述栅极绝缘层1032以及所述第一金属走线1031直至所述缓冲层102表面。
在所述弯折区120，所述第一金属走线1031具有若干镂空孔1031a。
所述镂空孔1031a的形状为圆形或方形或；所述镂空孔1031a均匀分布于所述第一金属走线1031上。所述镂空孔1031a由所述通孔106贯穿所述第一金属走线1031形成。
S9)形成有机层104于所述钝化层1035上以及所述通孔106中。所述有机层104采用狭缝式涂布法形成，所述有机层104会填充所述通孔106，通过曝光、显影、烘烤及灰化形成有机层104图案。
S10)沉积第一电极105于所述有机层104上，所述第一电极105连接所述第二金属走线1034。所述第一电极105通过物理气相沉积法形成，并通过曝光、显影及蚀刻制作所述第一电极105的图案。
应当指出，对于经充分说明的本发明来说，还可具有多种变换及改型的实施方案，并不局限于上述实施方式的具体实施例。上述实施例仅仅作为本发明的说明，而不是对发明的限制。总之，本发明的保护范围应包括那些对于本领域普通技术人员来说显而易见的变换或替代以及改型。

Claims (8)

1.一种阵列基板，其特征在于，包括显示区以及至少一弯折区，所述显示区以及弯折区都可以进行画面显示；所述阵列基板包括：
基板；
缓冲层，设于所述基板上；
薄膜晶体管层，设于所述缓冲层远离所述基板上，所述薄膜晶体管层包括第一金属走线，所述薄膜晶体管层中形成有若干个薄膜晶体管，在相邻两个薄膜晶体管之间具有至少一通孔，所述通孔贯穿所述第一金属走线直至所述缓冲层表面；
有机层，设于所述薄膜晶体管层上并且填充所述通孔；
其中，所述通孔对应所述弯折区；
所述第一金属走线设于所述缓冲层远离所述基板的一侧；
所述薄膜晶体管层还包括：
栅极绝缘层，设于所述第一金属走线上；
半导体层，设于所述栅极绝缘层远离所述第一金属走线的一侧；
第二金属走线，设于所述半导体层以及所述栅极绝缘层上；
钝化层，设于所述第二金属走线、所述半导体层以及所述栅极绝缘层上。
2.根据权利要求1所述的阵列基板，其特征在于，
所述有机层的材料为光刻胶；
所述缓冲层的材料包括氮化硅或氧化硅。
3.根据权利要求1所述的阵列基板，其特征在于，
在所述弯折区，所述第一金属走线具有若干镂空孔，所述镂空孔由所述通孔贯穿所述第一金属走线形成。
4.根据权利要求3所述的阵列基板，其特征在于，
所述镂空孔的形状包括圆形或方形；
所述镂空孔均匀分布于所述第一金属走线上。
5.根据权利要求3所述的阵列基板，其特征在于，
所述镂空孔的直径为3～5um。
6.根据权利要求1所述的阵列基板，其特征在于，
所述基板包括玻璃基板以及透明基层，所述透明基层设于所述玻璃基板靠近所述缓冲层的一侧。
7.根据权利要求1所述的阵列基板，其特征在于，
所述半导体层的材料为铟镓锌氧化物；
所述第二金属走线包括源极走线以及漏级走线；
所述源极走线以及所述漏级走线分别连接所述半导体层。
8.根据权利要求1所述的阵列基板，其特征在于，还包括一第一电极，设于所述有机层上，所述第一电极连接所述第二金属走线。
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