CN106876260B - 一种闸电极结构及其制造方法和显示装置 - Google Patents
一种闸电极结构及其制造方法和显示装置 Download PDFInfo
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Abstract
本发明显示技术领域,公开了一种闸电极结构及其制造方法包括:在基板的一侧表面上形成缓冲层;在缓冲层上形成凹槽,凹槽贯穿缓冲层;在凹槽中形成闸电极,且闸电极的上表面与缓冲层的上表面位于同一平面上;在闸电极的上表面及缓冲层的上表面上形成绝缘层;在绝缘层的上表面形成与闸电极相对而置的半导体层;在半导体层的上表面和/或绝缘层的上表面上形成与半导体层部分交叠的数据线。还公开了一种显示装置,该显示装置包括了闸电极结构。由于绝缘层可以在一个平面上形成。消除了闸电极因自身高度、形状或者闸电极轮廓角等问题对绝缘层在闸电极边缘处覆盖率的影响,大大降低了数据线成膜时在闸电极和数据线交叉处产生断线的情况。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种闸电极结构及其制造方法和显示装置。
背景技术
随着科技的发展,电子产品越来越普及,尤其是电脑电视走进了千家万户。这些各类电子产品上安装了大量的电子显示设备,电子显示设备在各个领域都有广泛的应用。目前,薄膜晶体管液晶显示器(Thin Film Transistor-Liquid Crystal Display,简称TFT-LCD)显示屏使用的越来越广泛,其中用于TFT-LCD显示屏的薄膜晶体管(Thin FilmTransistor,简称TFT)玻璃基板上的电路布局通常有闸电极(又称扫描线或GATE)与数据线(又称DATA),有相互交叉的情况。当形成闸电极的过程中出现异常,尤其是闸电极轮廓角度过大,使后续形成绝缘层的时候,很容易在闸电极轮廓角度过大的地方覆盖率不佳。从而使得后续数据线成膜的时候,在闸电极和数据线交叉处非常容易出现断线,如此以来数据线中传输的讯号将会中断,严重影响了产品的合格率。
发明内容
本发明的目的在于提供一种闸电极结构及其制造方法和显示面板,旨在解决现有技术中,数据线很容易在闸电极与数据线的交叉处出现断线的问题。
本发明提供了一种闸电极结构制造方法,包括如下步骤:
提供一基板,在所述基板的一侧表面上形成缓冲层;
在所述缓冲层上形成凹槽,所述凹槽贯穿所述缓冲层;
在所述凹槽中形成闸电极,且所述闸电极的上表面与所述缓冲层的上表面位于同一平面上;
在所述闸电极的上表面及所述缓冲层的上表面上形成绝缘层;
在所述绝缘层的上表面形成与所述闸电极相对而置的半导体层;
在所述半导体层的上表面和/或所述绝缘层的上表面上形成与所述半导体层部分交叠的数据线。
可选地,所述凹槽通过光刻工艺形成。
进一步地,所述光刻的步骤包括:
在所述缓冲层的上表面涂布光阻;
在所述光阻的上方设置光罩和光源;
开启所述光源,所述光源发出光线透过所述光罩将部分所述光阻曝光;
将被曝光后的所述光阻显影;
腐蚀被曝光的所述光阻,并腐蚀位于被曝光的所述光阻与所述基板之间的缓冲层;
清洗所述基板,将所述光阻和所述缓冲层清除干净。
进一步地,所述闸电极结构制造方法还包括如下步骤:
在所述光阻和所述凹槽的上表面沉积形成闸电极导电层;
剥离所述光阻。
可选地,剥离所述光阻的方法为:使用去光阻液腐蚀所述光阻。
可选地,所述缓冲层、所述绝缘层和所述半导体层的形成方法为化学气相沉积工艺。
可选地,所述缓冲层和所述绝缘层采用的材料包括:氮化硅。
可选地,所述闸电极和所述数据线采用的材料包括:铝或钼。
本发明还提供了一种闸电极结构,包括:
基板;
缓冲层,形成于所述基板的侧表面上,所述缓冲层上设置有贯穿于所述缓冲层的凹槽;
闸电极,形成于所述凹槽内,且所述缓冲层的上表面与所述闸电极的上表面位于同一平面;
绝缘层,形成于所述缓冲层的上表面和所述闸电极的上表面;
半导体层,形成于所述绝缘层的上表面且与所述闸电极相对而置;
数据线,形成于所述绝缘层的上表面和/或者所述半导体层的上表面上,且与所述半导体层部分交叠。
本发明还提供了一种显示装置,包括所述闸电极结构及多个像素,所述闸电极结构电性连接于所述多个像素。
基于上述技术方案,本发明中提出的闸电极结构及其制造方法和显示装置,在基板上形成有缓冲层,在所述缓冲层上形成有凹槽,在所述凹槽中形成有闸电极,且闸电极的上表面与缓冲层的上表面在同一平面上。在闸电极的上表面和缓冲层的上表面上再形成绝缘层,在绝缘层上再形成半导体层和数据线,如此,绝缘层是在一个平面上形成的,而不再受到闸电极轮廓角度的影响,从而大大降低了数据线与闸电极交叉处的断线概率,从而提升了产品的合格率。
附图说明
图1为本发明实施例提出的缓冲层示意图;
图2为本发明实施例提出涂布光阻的示意图;
图3为本发明实施例提出光刻的示意图;
图4为本发明实施例提出形成闸电极的示意图;
图5为本发明实施例提出去除光阻的示意图;
图6为本发明实施例提出形成绝缘层的示意图;
图7为本发明实施例提出的闸电极结构示意图;
图8为本发明提出的闸电极结构制造方法的实施例的制作流程图;
图9为本发明提出的光刻方法的实施例的制作流程图;
图10为本发明提出的形成闸电极方法的实施例的制作流程图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
需要说明的是,当元件被称为“固定于”或“设置于”另一个元件,它可以直接在另一个元件上或可能同时存在居中元件。当一个元件被称为是“连接于”另一个元件,它可以是直接连接到另一个元件或者可能同时存在居中元件。
另外,还需要说明的是,本发明实施例中的左、右、上、下等方位用语,仅是互为相对概念或是以产品的正常使用状态为参考的,而不应该认为是具有限制性的。以下结合具体实施例对本发明的实现进行详细的描述。
如图1图10所示,本发明提供了一种闸电极结构及其制造方法,该闸电极制造方法为:在步骤S1中,准备基板1,在基板1的一基板侧表面11上形成缓冲层2,在步骤S2中,在缓冲层上表面21上形成凹槽3,凹槽3贯穿缓冲层2,在步骤S3中,在凹槽3中形成闸电极5,且闸电极上表面51与缓冲层上表面21在同一平面P,在步骤S4中,在闸电极上表面51与缓冲层上表面21上形成绝缘层6,在步骤S5中,在绝缘层6的绝缘层上表面61上形成与闸电极5相对而置的半导体层8,在步骤S6中,在半导体层8上和/或绝缘层6上形成与闸电极5交叉的数据线71。
闸电极上表面51与缓冲层上表面21在同一平面P,绝缘层6可以在一个平面P上形成,因此消除了闸电极5因自身高度、形状或者闸电极5轮廓角等问题对绝缘层6在闸电极5边缘处覆盖率造成的影响,大大降低了数据线71成膜时在闸电极5和数据线71交叉处产生断线的情况。提高了产品的合格率。
在本发明实施例中,上述缓冲层2形成于上述基板1的一个侧表面上,在其他实施例中,缓冲层2还可以在基板1的两个侧面或者其他位置,此处不作唯一限定。
在本发明实施例中,制作上述闸电极5以及闸电极5周边的上述缓冲层2采用的方法是先形成缓冲层2,然后在缓冲层2上形成上述凹槽3,其中凹槽3贯穿缓冲层2,并在凹槽3中形成闸电极5,在其他实施例中,可以采用其他的顺序,比如可以先形成闸电极5,然后再在闸电极5周边的同侧基板11上形成缓冲层2,或者缓冲层2和闸电极5直接分别单独分区域在基板1上形成,此处不作唯一限定。
在本发明实施例中,上述闸电极上表面51和上述缓冲层上表面21在同一个平面P,如此,则上述绝缘层6可以形成在一个平面P上,使上述半导体层8和上述数据线71可以直接形成于一个平面上,减少了闸电极5的形状或者轮廓角度对数据线71的影响。在其他实施例中,闸电极上表面51和缓冲层上表面21不一定完全在一个平面P上,可以有一定的相对高度差,比如闸电极5的上表面51到基板1的距离小于缓冲层上表面21到基板1的距离,形成一个“凹”字形,半导体层8形成于“凹”字形的凹起(附图未标示)中,如果半导体层上表面83到上述基板1的距离与上述缓冲层2上的绝缘层上表面61到基板1的距离相同,则会使得半导体层上表面83和缓冲层2上的绝缘层上表面61在一个平面上,如此,则数据线71会形成在一个平面上,也减少了数据线71在闸电极5交叉处出现断线的情况;同样,还可以为闸电极5的上表面51到基板1的距离大于缓冲层上表面21到基板1的距离,形成一个“凸”字形,半导体层8形成于“凸”字形的凸起中,此处不作唯一限定。
在本发明实施例中,上述绝缘层6形成于上述闸电极上表面51和上述缓冲层上表面21上,如此,起到了绝缘的作用,也作为半导体层8和数据线71的基底。在其他实施例中,绝缘层6还可以只是沉积在闸电极上表面51上,而闸电极以外的区域使用上述缓冲层2来实现绝缘功能,当然也可以采用其他方式来进行绝缘,只要能够使得上述闸电极5和上述半导体层8之间实现绝缘的目的。此处不作唯一限定。
在本发明实施例中,上述半导体层8包括了第一半导体层81和第二半导体层82,其中第一半导体层81沉积的材料是非晶硅,第二半导体层82沉积的材料是高浓度掺杂的N型非晶硅,同时,半导体层8与上述闸电极5有部分交叠,如此,闸电极才可以控制半导体层中上述数据线71与源极72之间电流的通断。当然,在其他实施例中,还可以使用其他材料形成半导体层,只要能够实现闸电极5的开关功能即可,此处不作唯一限定。
在本发明实施例中,上述数据线71和上述源极72形成于上述绝缘层6的上表面61或者上述半导体层8的上表面83上,且与闸电极5交叉。其中,数据线71和源极72与闸电极5交叉的区域即为闸电极5控制数据线71和源极72之间电流的位置。
进一步地,在本发明实施例中,上述凹槽3是通过光刻的方法形成的,如此,可在上述缓冲层2上利用光刻来生成用于上述闸电极5的上述凹槽3,十分简单,成本低廉。当然在其他实施例中,还可以是使用其他可以在缓冲层2上形成凹槽3的方法,比如激光雕刻等,此处不作唯一限定。其中,该光刻的方法还可以使用到生成数据线71的工序中。形成数据线71的步骤包括:第一步:形成数据线71导电层;第二步:采用光刻的方法将数据线71和源极72以外的导电层去掉。同样,只要能够形成数据线71,并不局限于使用光刻,此处不作唯一限定。
进一步地,在本发明实施例中,上述光刻的步骤包括:在步骤S10中,在缓冲层2的上表面21涂布光阻F;在步骤S20中,在光阻F上方设置光罩(附图未标出)和光源(附图未标出);在步骤S30中,开启光源,光源透过光罩将部分光阻F曝光;在步骤S40中,将被曝光的光阻F显影;在步骤S50中,腐蚀掉被曝光显影的部分光阻F并腐蚀位于被曝光的光阻F与基板1之间的缓冲层2;在步骤S60中,清洗基板1,将被腐蚀的光阻F和被腐蚀的缓冲层2清除干净。其中,将光阻F均匀涂布在缓冲层2上,光罩设置在光阻F上方,经过显影和腐蚀,将凹槽3处的缓冲层2腐蚀掉,最后将基板1清洗干净,从而形成了凹槽3。
可选地,被曝光的光阻F区域可以被腐蚀,没有被曝光的光阻F区域不能被腐蚀。在其他实施例中,还可以选择其他类型的光阻,比如没有被曝光的光阻F区域可以被腐蚀。同时,还可以减少上述光刻中的步骤或者增加一些其他步骤,只要能够实现在缓冲层2上形成凹槽3即可,此处不作唯一限定。
进一步地,在本发明实施例中,形成上述闸电极5的步骤包括:在步骤S100中,在上述光阻F和上述凹槽3的上表面上形成上述闸电极5以及上述导电层4;在步骤S200中,剥离光阻F。其中,在光阻F和凹槽3的上表面形成导电层4,则凹槽3中填充有导电层充当闸电极5。剥离光阻F,则可以将光阻F上的导电层4一起剥离,从而达到了去掉除位于光阻F上的导电层4的目的。当然,在其他实施例中,还可以采用其他的方法形成闸电极5。比如直接在基板1上沉积导电层,然后经过光刻腐蚀掉闸电极5以外的导电层,然后再在导电层周边的同侧基板11上形成缓冲层2,同样可以达到目的。只要其他的方法可以达到在闸电极5周围的同侧基板11上形成有缓冲层2即可,此处不作唯一限定。
进一步地,在本发明实施例中,剥离上述光阻F的方法为:使用去光阻液腐蚀光阻F。使用去光阻液,将光阻F去除后,同时也将沉积于光阻F上的导电层4去除,方便快捷。当然,在其他实施例中,还可以为使用其他能够使光阻F和沉积于光阻F上表面的导电层4去除的方法,此处不作唯一限定。
进一步地,在本发明实施例中,形成缓冲层2、绝缘层6和半导体层8的方法为化学气相沉积,采用化学气相沉积,较为简单且价格低廉的方式来形成缓冲层2、绝缘层6和半导体层8。当然,在其他实施例中,还可以采用其他的方式来沉积缓冲层2、绝缘层6和半导体层8,此处不作唯一限定。
可选地,在本发明实施例中,缓冲层2和绝缘层6采用的材料包括:氮化硅。如此,则可以获得有效的绝缘效果。当然,在其他实施例中,还可以为其他材料。只要能够获得绝缘的效果,以及在闸电极5加上或者去掉电压的时候,能够实现闸电极5的开关功能即可。
可选地,在本发明实施例中,闸电极5和数据线71采用的材料包括:铝或钼。铝和钼有较好的导电性以及具有容易沉积的特性,可以为降低生产成本和成产难度。在其他实施例中,闸电极5和数据线71并不局限于铝或钼,只要能够形成导电性良好的闸电极5和数据线71即可。同时,闸电极5和数据线71并不局限于只是一种材料沉积而成,可能是多种或者多层,比如闸电极5可以先沉积铝然后沉积钼,数据线71可以先沉积钼,然后沉积铝,最后沉积钼,只要能够让闸电极5和数据线71容易导电即可,此处沉积顺序不作唯一限定。
本发明实施例还提出一种闸电极结构(附图未标示),包括:基板1;形成于基板1的侧表面上11的缓冲层2,缓冲层2上设置有贯穿于缓冲层2的凹槽3;形成于凹槽3内的闸电极5,且缓冲层2的上表面21与闸电极5的上表面51位于同一平面P;形成于缓冲层2的上表面21和闸电极5的上表面51的绝缘层2;形成于绝缘层6的上表面61且与闸电极5相对而置的半导体层8;形成于绝缘层6的上表面61和/或者半导体层8的上表面83上,且与闸电极5交叉的数据线71。基板1上形成闸电极5,在闸电极5的周围同侧基板侧表面11上形成有缓冲层2,且缓冲层上表面21与闸电极上表面51在同一平面P,则可以将绝缘层6沉积在一个平面P上,由于半导体层8沉积到平面P的绝缘层6上,且数据线71形成于绝缘层上表面61和半导体层上表面83上,则闸电极5的形状,外轮廓角对数据线71没有影响。从而消除了常规技术中,闸电极5的形状和外轮廓角对数据线71的影响,尤其是避免数据线71与闸电极5的交叉处73发生断裂。当然,也避免了源极72与闸电极5桥接处74容易断裂的情况。
本发明实施例还提出一种显示装置(附图未标示),该显示装置包括闸电极结构。基板1上形成闸电极5,在闸电极5的周围同侧基板侧表面11上形成有缓冲层2,且缓冲层上表面21与闸电极上表面51在同一平面P,则可以将绝缘层6沉积在一个平面P上,由于半导体层8沉积到平面P的绝缘层6上,且数据线71形成于绝缘层上表面61和半导体层上表面83上,则闸电极5的形状,外轮廓角对数据线71没有影响。从而消除了常规技术中,闸电极5的形状和外轮廓角对数据线71的影响,尤其是避免数据线71与闸电极5的交叉处73发生断裂。当然,也避免了源极72与闸电极5桥接处74容易断裂的情况。该显示装置还包括多个像素(附图未标示),闸电极结构电性连接于多个像素。其中,显示装置可以为液晶显示器,在液晶显示器内部设置有闸电极结构和多个像素电极,闸电极结构电性连接于多个像素电极,当然在其他实施例中,还可以为其他的显示设备,此处不作唯一限定。
以上所述实施例,仅为本发明具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到各种等效的修改、替换和改进等等,这些修改、替换和改进都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以权利要求的保护范围为准。
Claims (7)
1.闸电极结构制造方法,其特征在于,包括如下步骤:
提供一基板,在所述基板的一侧表面上形成用于缓冲所述基板所受应力的缓冲层;
在所述缓冲层上形成凹槽,所述凹槽贯穿所述缓冲层;
在所述凹槽中形成闸电极,且所述闸电极的上表面与所述缓冲层的上表面位于同一平面上;
在所述闸电极的上表面及所述缓冲层的上表面上形成绝缘层;
在所述绝缘层的上表面形成与所述闸电极相对而置的半导体层;
在所述半导体层的上表面和/或所述绝缘层的上表面上形成与所述半导体层部分交叠的数据线;
所述凹槽通过光刻工艺形成;
所述光刻的步骤包括:
在所述缓冲层的上表面涂布光阻;
在所述光阻的上方设置光罩和光源;
开启所述光源,所述光源发出光线透过所述光罩将部分所述光阻曝光;
将被曝光后的所述光阻显影;
腐蚀被曝光的所述光阻,并腐蚀位于被曝光的所述光阻与所述基板之间的缓冲层;
清洗所述基板,将所述光阻和所述缓冲层清除干净;
还包括如下步骤:
在所述光阻和所述凹槽的上表面沉积形成闸电极导电层;
剥离所述光阻。
2.如权利要求1所述的闸电极结构制造方法,其特征在于,剥离所述光阻的方法为:使用去光阻液腐蚀所述光阻。
3.如权利要求1所述的闸电极结构制造方法,其特征在于,所述缓冲层、所述绝缘层和所述半导体层的形成方法为化学气相沉积工艺。
4.如权利要求1所述的闸电极结构制造方法,其特征在于,所述缓冲层和所述绝缘层采用的材料包括:氮化硅。
5.如权利要求1所述的闸电极结构制造方法,其特征在于,所述闸电极和所述数据线采用的材料包括:铝或钼。
6.闸电极结构,其特征在于,包括:
基板;
缓冲层,形成于所述基板的侧表面上并用于缓冲所述基板所受应力,所述缓冲层上设置有贯穿于所述缓冲层的凹槽;
闸电极,形成于所述凹槽内,且所述缓冲层的上表面与所述闸电极的上表面位于同一平面;
绝缘层,形成于所述缓冲层的上表面和所述闸电极的上表面;
半导体层,形成于所述绝缘层的上表面且与所述闸电极相对而置;
数据线,形成于所述绝缘层的上表面和/或者所述半导体层的上表面上,且与所述半导体层部分交叠。
7.显示装置,其特征在于,包括如权利要求6所述的闸电极结构及多个像素,所述闸电极结构电性连接于所述多个像素。
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03159174A (ja) * | 1989-11-16 | 1991-07-09 | Sanyo Electric Co Ltd | 液晶表示装置 |
CN1652003A (zh) * | 2005-03-22 | 2005-08-10 | 广辉电子股份有限公司 | 一种薄膜晶体管与液晶显示器的制造方法 |
CN1740882A (zh) * | 2005-09-27 | 2006-03-01 | 广辉电子股份有限公司 | 液晶显示器的阵列基板及其制造方法 |
CN101093848A (zh) * | 2006-06-22 | 2007-12-26 | 三菱电机株式会社 | Tft阵列衬底及其制造方法 |
CN101677058A (zh) * | 2008-09-19 | 2010-03-24 | 北京京东方光电科技有限公司 | 薄膜构造体的制造方法 |
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Publication number | Priority date | Publication date | Assignee | Title |
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WO2002067335A1 (fr) * | 2001-02-19 | 2002-08-29 | International Business Machines Corporation | Structure de transistor en couches minces, procede de fabrication d'une structure de transistor en couches minces, et dispositif d'affichage utilisant une structure de transistor en couches minces |
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03159174A (ja) * | 1989-11-16 | 1991-07-09 | Sanyo Electric Co Ltd | 液晶表示装置 |
CN1652003A (zh) * | 2005-03-22 | 2005-08-10 | 广辉电子股份有限公司 | 一种薄膜晶体管与液晶显示器的制造方法 |
CN1740882A (zh) * | 2005-09-27 | 2006-03-01 | 广辉电子股份有限公司 | 液晶显示器的阵列基板及其制造方法 |
CN101093848A (zh) * | 2006-06-22 | 2007-12-26 | 三菱电机株式会社 | Tft阵列衬底及其制造方法 |
CN101677058A (zh) * | 2008-09-19 | 2010-03-24 | 北京京东方光电科技有限公司 | 薄膜构造体的制造方法 |
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