CN110622284A - 通过化学蚀刻去除选择性沉积缺陷 - Google Patents
通过化学蚀刻去除选择性沉积缺陷 Download PDFInfo
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- 230000007547 defect Effects 0.000 title claims abstract description 36
- 230000008021 deposition Effects 0.000 title claims description 18
- 238000003486 chemical etching Methods 0.000 title description 4
- 230000004888 barrier function Effects 0.000 claims abstract description 69
- 239000000758 substrate Substances 0.000 claims abstract description 56
- 238000000034 method Methods 0.000 claims abstract description 55
- 239000000463 material Substances 0.000 claims description 45
- 229910044991 metal oxide Inorganic materials 0.000 claims description 23
- 150000004706 metal oxides Chemical class 0.000 claims description 23
- 150000001875 compounds Chemical class 0.000 claims description 20
- 239000002243 precursor Substances 0.000 claims description 19
- 229910052736 halogen Inorganic materials 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 14
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 239000003989 dielectric material Substances 0.000 claims description 6
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 6
- 125000001153 fluoro group Chemical group F* 0.000 claims 1
- 238000000151 deposition Methods 0.000 abstract description 21
- 239000010410 layer Substances 0.000 description 51
- 239000013545 self-assembled monolayer Substances 0.000 description 30
- 239000002094 self assembled monolayer Substances 0.000 description 24
- 239000010408 film Substances 0.000 description 14
- 239000000126 substance Substances 0.000 description 13
- 125000005647 linker group Chemical group 0.000 description 10
- 239000004020 conductor Substances 0.000 description 9
- 238000011282 treatment Methods 0.000 description 9
- 239000003505 polymerization initiator Substances 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 5
- 239000000376 reactant Substances 0.000 description 5
- OZAIFHULBGXAKX-UHFFFAOYSA-N 2-(2-cyanopropan-2-yldiazenyl)-2-methylpropanenitrile Chemical compound N#CC(C)(C)N=NC(C)(C)C#N OZAIFHULBGXAKX-UHFFFAOYSA-N 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 230000010354 integration Effects 0.000 description 4
- 230000005855 radiation Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical group [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 3
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 3
- 239000002253 acid Substances 0.000 description 3
- 150000001298 alcohols Chemical class 0.000 description 3
- 150000001299 aldehydes Chemical class 0.000 description 3
- 150000001412 amines Chemical class 0.000 description 3
- 150000001735 carboxylic acids Chemical class 0.000 description 3
- 238000005137 deposition process Methods 0.000 description 3
- 229910052731 fluorine Inorganic materials 0.000 description 3
- 239000011737 fluorine Substances 0.000 description 3
- 125000000524 functional group Chemical group 0.000 description 3
- 238000007306 functionalization reaction Methods 0.000 description 3
- 150000004820 halides Chemical class 0.000 description 3
- 150000002367 halogens Chemical class 0.000 description 3
- 238000001459 lithography Methods 0.000 description 3
- 150000001336 alkenes Chemical class 0.000 description 2
- 150000001345 alkine derivatives Chemical class 0.000 description 2
- 125000003118 aryl group Chemical group 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 239000006227 byproduct Substances 0.000 description 2
- 125000004432 carbon atom Chemical group C* 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 125000000753 cycloalkyl group Chemical group 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 238000009832 plasma treatment Methods 0.000 description 2
- 229920002635 polyurethane Polymers 0.000 description 2
- 239000004814 polyurethane Substances 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- 238000007669 thermal treatment Methods 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- 125000004169 (C1-C6) alkyl group Chemical group 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- DRSHXJFUUPIBHX-UHFFFAOYSA-N COc1ccc(cc1)N1N=CC2C=NC(Nc3cc(OC)c(OC)c(OCCCN4CCN(C)CC4)c3)=NC12 Chemical compound COc1ccc(cc1)N1N=CC2C=NC(Nc3cc(OC)c(OC)c(OCCCN4CCN(C)CC4)c3)=NC12 DRSHXJFUUPIBHX-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910020751 SixGe1-x Inorganic materials 0.000 description 1
- 150000001408 amides Chemical class 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 150000001913 cyanates Chemical class 0.000 description 1
- 238000003795 desorption Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- NLFBCYMMUAKCPC-KQQUZDAGSA-N ethyl (e)-3-[3-amino-2-cyano-1-[(e)-3-ethoxy-3-oxoprop-1-enyl]sulfanyl-3-oxoprop-1-enyl]sulfanylprop-2-enoate Chemical compound CCOC(=O)\C=C\SC(=C(C#N)C(N)=O)S\C=C\C(=O)OCC NLFBCYMMUAKCPC-KQQUZDAGSA-N 0.000 description 1
- 238000010574 gas phase reaction Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 125000001183 hydrocarbyl group Chemical group 0.000 description 1
- 239000003999 initiator Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000012948 isocyanate Substances 0.000 description 1
- IQPQWNKOIGAROB-UHFFFAOYSA-N isocyanate group Chemical group [N-]=C=O IQPQWNKOIGAROB-UHFFFAOYSA-N 0.000 description 1
- 150000002513 isocyanates Chemical class 0.000 description 1
- 150000002540 isothiocyanates Chemical class 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 150000002825 nitriles Chemical class 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 150000002978 peroxides Chemical class 0.000 description 1
- 238000004375 physisorption Methods 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 125000006239 protecting group Chemical group 0.000 description 1
- 238000010526 radical polymerization reaction Methods 0.000 description 1
- 150000003254 radicals Chemical class 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000006557 surface reaction Methods 0.000 description 1
- 238000009210 therapy by ultrasound Methods 0.000 description 1
- 238000005979 thermal decomposition reaction Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 150000003567 thiocyanates Chemical class 0.000 description 1
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/3105—After-treatment
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- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
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Abstract
本发明描述了一种将膜选择地沉积在相对于第二基板表面的第一基板表面上的方法。该方法包括:使基板暴露于阻隔分子,以于该第一表面上选择性沉积阻隔层。于该第二表面上选择性形成层并于该阻隔层上形成该层的缺陷。从该第一表面上的该阻隔层去除该缺陷。
Description
技术领域
本公开内容的实施方式一般地涉及一种使用自组装单层的膜的选择性沉积的强化方法。尤其是,本公开内容的实施方式涉及一种通过化学蚀刻从选择性沉积的膜去除缺陷的方法。
背景技术
半导体工业在追求器件的微型化面临许多挑战,包括快速达成纳米级特征。这样的挑战包括制造复合器件,经常使用多个微影术及蚀刻步骤。此外,半导体工业针对图案化复合结构需要高成本EUV的低成本替代方案。为了维持器件微型化的节奏并使芯片制造成本较低,选择性沉积已显示出前景。有可能通过简化整合方案来去除昂贵的微影术步骤。
材料的选择性沉积能够以各种方式完成。例如:一些处理可能会基于其表面化学而对表面具有固有的选择性。这些处理相当罕见,且一般需要具有表面能截然不同的表面,例如金属及介电质等。
在表面相似(SiO2与Si-H末端或SiN)的情形下,该表面可通过利用如下的表面处理来选择性阻隔:所述表面处理选择性与一个表面反应而不与另一个表面反应,而有效地阻隔在随后的ALD或CVD工艺期间的任何表面反应。
自组装单层(SAM)为一种能够在多个材料表面上选择性沉积的方法。理想情形下,在SAM钝化期间,SAM完美地覆盖形成于所有介电质表面上,并100%阻隔来自后续沉积步骤的金属氧化物沉积,而使得金属氧化物仅在导体/金属表面上生长。然而,该SAM单层以作为沉积时间与循环数的函数的渐近的厚度来生长,而使提供100%阻隔金属氧化物的理想SAM极为难以实现。
此外,在经高密度封装的SAM表面上过量的SAM前驱物的暴露可能会导致液滴缺陷。结果,少量金属氧化物可能会在SAM钝化表面上生长,留下许多小的金属氧化物缺陷。这样的金属氧化物缺陷可能会对随后的SAM去除及掩模去除工艺造成影响。
因此,本领域中需要一种用以去除缺陷的方法,该缺陷作为保护选择性沉积工艺的SAM的一部分而形成。
发明内容
本公开内容的一或多种实施方式针对一种选择性沉积膜的方法。提供具有第一材料及第二材料的基板,该第一材料具有第一表面,该第二材料具有第二表面。使该基板暴露于阻隔化合物中,以相对于该第二表面而于该第一表面上选择性沉积阻隔层,该阻隔化合物包含至少一种阻隔分子。相对于该第一表面而于该第二表面上选择性形成层并于该第一表面上的该阻隔层上产生包含该层的缺陷。从该第一表面上的该阻隔层去除该缺陷。
本公开内容的另一实施方式针对一种选择性沉积膜的方法。提供具有第一材料及第二材料的基板,该第一材料包含介电质且具有第一表面,该第二材料包含导体且具有第二表面。使该基板暴露于阻隔化合物,以相对于该第二表面而于该第一表面上选择性沉积阻隔层,该阻隔化合物包含至少一种阻隔分子。相对于该第一表面而于该第二表面上选择性形成层并于该阻隔层上形成该层的缺陷。使该基板暴露于缺陷去除工艺达预定时间量,以从该阻隔层去除该缺陷,该缺陷去除工艺包含金属-卤素前驱物。
本公开内容的其它实施方式针对一种选择性沉积膜的方法。提供具有第一材料及第二材料的基板,该第一材料包含介电质,该第二材料包含导体。使该基板暴露于阻隔化合物,以相对于该导体而于该介电质上选择性沉积阻隔层,该阻隔化合物包含至少一种阻隔分子。相对于该介电质而于该导体上选择性形成层。形成该层会使缺陷在该阻隔层上生长。使该基板暴露于缺陷去除工艺达预定时间量,以从该阻隔层去除该缺陷。该缺陷去除工艺包含在热处理中暴露于金属-卤素前驱物达预定时间量,该金属-卤素前驱物包含WClx、HfClx、NbClx或RuClx中的一或多种、或是金属卤氧化物,式中,x为1至6。
附图说明
以上简要概述本公开内容的上述详述特征可以被详细理解的方式、以及本公开内容的更特定描述,可通过参照实施方式来获得,一些实施方式绘示于所附图式中。然而,应注意的是,所附图式仅绘示本公开内容的典型的实施方式,因此不应被视为对本公开内容的范围的限制,因为本公开内容可容许其它等同有效的实施方式。
图1图示本公开内容的一或多种实施方式的处理方法。
具体实施方式
本公开内容的一或多种实施方式提供一种干式化学蚀刻方法,以从促进选择性沉积的SAM有效率地去除缺陷。本公开内容的一些实施方式有利地提供一种处理整合的方法,以改善选择性沉积工艺。一些实施方式有利地提供一种SAM或掩模去除处理的改善方法。
如本说明书及所附权利要求中所使用的,术语”基板”及”晶片”能够互换使用,两者均表示处理会对其产生作用的表面或一部分的表面。本发明所属技术领域的技术人员亦能够理解,提及基板亦能够仅表示一部分的该基板,除非上下文有明确说明。此外,提及沉积在基板上能够意指裸基板及具有沉积或形成在其上的一或多种膜或特征的基板。
如本文中所使用的,“基板”表示在制造过程期间在其上进行膜处理的任何基板或形成在基板上的材料表面。举例而言,取决于应用,能够在其上进行处理的基板表面包括:材料,诸如硅、氧化硅、应变硅、绝缘体上硅(SOI)、经碳掺杂的氧化硅、氮化硅、经掺杂的硅、锗、砷化镓、玻璃、蓝宝石;以及其它材料,诸如金属、金属氮化物、金属合金及其它导电材料。基板包括但不限于半导体晶片。可使基板暴露于预处理工艺以抛光、蚀刻、还原、氧化、羟基化(或以其它方式产生或接枝目标化学部分以赋予化学功能性)、退火和/或烘烤该基板表面。除了直接在该基板本身的表面上进行膜处理以外,本公开内容中,如以下更详细地公开的,所公开的膜处理步骤中的任一种亦可在基板上所形成的底层上进行,且术语”基板表面”旨在包括像上下文指称的这样的底层。因此,例如:已在基板表面上沉积膜/层或部分的膜/层,在该处新沉积膜/层的暴露出的表面会变成该基板表面。所提供的基板表面包含何种物质将取决于要沉积何种薄膜、以及所使用的特别的化学物质。一或多种实施方式中,该第一基板表面可包含金属、金属氧化物、或H封端的SixGe1-x,该第二基板表面可包含含Si介电质,反之亦然。一些实施方式中,基板表面可包含特定功能性(例如-OH、-NH等)。
如本说明书及所附权利要求中所使用的,术语”反应性气体”、”前驱物”、”反应物”及其类似术语能够互换使用来意指一种包括对基板表面具有反应性的物种的气体。例如:第一”反应性气体”可容易吸附在基板的表面且能够用于与第二反应性气体进一步进行化学反应。
近数十年来,半导体界已尝试通过以替代方案取代微影术,以改善集成电路(IC)处理,该替代方案能够使成本更低、处理时间更短及特征尺寸更小。这些替代物中的许多是归于”选择性沉积”覆盖的范围。一般而言,选择性沉积表示一种处理,其在目标基板材料上的净沉积速率较其它基板材料更高,而使在该目标基板材料上达成期望的膜厚度,且在其它基板材料上的沉积较少或可忽略不计(其中“可忽略不计”是由处理限制而限定)。
本公开内容的实施方式并入一种阻隔层,其典型地称为自组装单层(SAM)。自组装单层(SAM)由吸附在表面上的自发组装的有机分子有序地排列所组成。这些分子的典型地包括:一或多种对基板具有亲和力的部分(头部基团)、及相对较长、惰性、线性的烃基部分(尾部基团)。
在此情形下,SAM形成是经由下述来发生:在表面分子头部基团快速吸附、及经由范德瓦尔斯(van der Waals)交互作用来使分子尾部基团彼此缓慢结合。选择SAM前驱物而使该头部基团在沉积期间与待阻隔的该基板材料选择性反应。然后进行沉积,并能够经由热分解(及任何副产物脱附)或与整合兼容的灰化处理来去除该SAM。已在许多系统中证实能够经由这种SAM的理想的形成及使用来成功选择性沉积;然而,成功实质上受限于溶液基底的SAM形成方法(亦即湿式功能化)。湿式功能化方法不仅与真空基底的整合方案不兼容,而且亦经常需要在SAM形成后进行超音波处理,以消除经物理吸附的SAM前驱物。此事实显示:成功的选择性SAM形成(于其中一个基板上相对于另一个基板上)无法单独依赖该功能化处理以产生无物理吸附的整体选择性化学吸附结果。
参照图1,本公开内容的一或多种实施方式针对一种选择性沉积的处理方法100。提供具有第一材料110及第二材料120的基板105。第一材料110具有第一表面112,第二材料120具有第二表面122。
一些实施方式中,该第一材料包含金属氧化物或介电材料且该第二材料包含金属或硅。一些实施方式中,该第一材料实质上由氧化硅组成。
一些实施方式中,该第二材料包含金属氧化物或介电材料且该第一材料包含金属或硅。一些实施方式中,该第二材料实质上由氧化硅组成。
如本说明书及所附权利要求中所使用的,术语”实质上由…组成”意指大于等于约95%、98%、99%的特定材料为所述材料。
使第一表面112暴露于阻隔化合物,以越过第二表面122来于第一表面112上选择性沉积阻隔层130。使该阻隔层暴露于聚合起始剂,以形成网状阻隔层135。该阻隔化合物包含至少一种阻隔分子。阻隔分子具有通式A-L-Z,式中A为反应性头部基团,L为连结基,Z为反应性尾部基团。
如以上述方式所使用般,该”头部基团”为与第一表面112结合的化学部分且该”尾部基团”为远离第一表面112延伸出的化学部分。
一些实施方式中,该第一材料包含金属氧化物或介电材料且A选自由(R2N)(3-a)R’aSi-、X3Si-及(RO)3Si-所组成的群组,式中,每个R及R’独立地选自C1-C6烷基、C1-C6环烷基及C1-C6芳基,a为0至2的整数,每个X独立地选自卤素。
一些实施方式中,该第一材料包含金属或硅且A选自由(HO)2OP-、HS-及H3Si-所组成的群组。
以上所列的反应性头部基团之中的一些在与连结基L连接的单一个反应性头部基团中包含多于一个反应性部分(例如H3Si-可与表面键结多达三次)。一些实施方式中,A选自小于以上所列的反应性部分的数目的反应基且与多于一个的连结基L连结。这些实施方式中,该连结基可相同或不同。这些实施方式中,该尾部基团可相同或不同。
该阻隔化合物能够以单一个化合物或依序暴露的多个化合物的形式传送至该基板以形成阻隔层130。一些实施方式中,第一表面112暴露于单一个化合物,该单一个化合物以有序或半有序的方式组装在表面上。
一些实施方式中,L为–(CH2)n–且n为4~18的整数。一些实施方式中,该连结基可分支。一些实施方式中,该连结基可经取代。一些实施方式中,该连结基可为不饱和。一些实施方式中,该连结基可包含环烷基或芳基。
一些实施方式中,该连结基L包含小于18个碳原子。一些实施方式中,该连结基包含小于17、16、15、14、13、12、11、10、9、8、7、6或5个碳原子。
一些实施方式中,Z为包含选自以下项中的一或多种反应性部分的基团:烯类、炔类、醇类、羧酸类、醛类、酰卤类、胺类、酰胺类、氰酸酯类、异氰酸酯类、硫氰酸酯、异硫氰酸酯类或腈类。
一些实施方式中,该阻隔分子包含多于一个反应性部分。一些实施方式中,A与多于一个每个经反应性尾部基团所封端的连结基连结,而使阻隔分子包含多于一个反应性部分。一些实施方式中,L经分支,而使阻隔分子包含多于一个反应性部分。
一些实施方式中,该阻隔分子包含大于一个反应性部分且该反应性部分是以直线的模式配置。一些实施方式中,Z包含大于一个反应性部分且该反应性部分是以分支的模式配置。
如以上述方式所使用的,以直线的模式配置的反应性部分配置于阻隔分子内,而使其配置于相同碳链内。换言之,反应性部分以末端对末端来配置。如以上述方式所使用的,以分支的模式配置的反应性部分配置于阻隔分子内,而使其配置于不同碳链内。换言之,反应性部分并非以末端对末端来配置。一些实施方式中,该反应性部分可被介于其中的原子隔开但仍被认为是末端对末端。
例如:化合物I含有一个反应性部分。化合物II及III含有两个反应性部分。化合物II具有以直线的模式配置的反应性部分。化合物III具有以分支的模式配置的反应性部分。
一些实施方式中,该尾部基团经由相对较慢的范德瓦尔斯交互作用来彼此结合。一些实施方式中,该尾部基团能够相同或不同,而能够形成均质或非均质的SAM。一些实施方式中,该阻隔化合物包含至少两个不同的阻隔分子,而形成均质的SAM。
一些实施方式中,使阻隔层130暴露于聚合起始剂以形成网状阻隔层135。该聚合起始剂能够为任何适合的处理,包括但不限于:化学反应、UV光曝光、电子束曝光、和/或热。一些实施方式中,该聚合起始剂包含放射线处理、热处理、等离子体处理或化学处理之中的一或多种。一些实施方式中,该放射线处理包含使该阻隔层暴露于在约150nm至约900nm的范围内的UV-可见光放射线。一些实施方式中,该等离子体处理包含由远程等离子体源、直接等离子体源、微波等离子体或这些等离子体源的组合所产生的等离子体。一些实施方式中,该化学处理包含使该阻隔层暴露于一或多种化学反应物。一些实施方式中,该聚合起始剂实质上由放射线处理或热处理组成。这些实施方式中,该网状阻隔层不通过使该阻隔层暴露于化学反应物来形成。
一些实施方式中,该聚合起始剂包含化学处理,该化学处理包含选自过氧化物、有机金属错合物或偶氮双异丁腈(AIBN)的自由基起始剂。不受理论所束缚,这些实施方式中,该阻隔层经由自由基聚合来形成网状阻隔层。一些实施方式中,该化学处理包含使该阻隔层暴露于具有多个功能基团(functional groups)的化学反应物中。一些实施方式中,该化学处理包含使该阻隔层暴露于具有多个功能基的胺类或醇类。
不受理论所束缚,反应基与聚合起始剂进行反应会形成网状阻隔层。例如:利用UV、热、化学反应物或等离子体来使烯类或炔类进行反应可能会产生碳基底聚合物。羧酸类、醛类或酰卤类与胺类进行反应可能会产生聚酰胺类。异氰酸基与醇类进行反应可能会产生聚胺酯类(polyurethane)。羧酸类、醛类或酰卤类与醇类进行反应可能会产生聚酯类。
在形成阻隔层(不论是网状或非网状)后,越过网状阻隔层135来于第二材料120的第二表面122上选择性形成层125。该阻隔层提供保护基以防止下述情形或使下述情形减少到最小:层125沉积在第一表面112上。一些实施方式中,层125的材料与第二材料120不同。一些实施方式中,层125的材料与第二材料120相同。
不受理论所束缚,该阻隔化合物与该基板的气相反应会受到阻隔分子以及更高挥发性或更高蒸气压所促进。一些实施方式中,该阻隔化合物在25℃具有大于或等于约0.1mmHg、0.2mmHg、0.3mmHg、0.4mmHg、0.5mmHg、0.6mmHg、0.7mmHg、0.8mmHg、0.9mmHg、1mmHg、5mmHg、10mmHg、50mmHg、100mmHg、200mmHg、300mmHg、400mmHg、或500mmHg的蒸气压。
一些实施方式中,在于第二材料120上选择性沉积层125后,从该第一表面去除该阻隔层。一些实施方式中,通过氧化来从该表面去除该阻隔层。一些实施方式中,从该表面对该阻隔层进行蚀刻。一些实施方式中,使该阻隔层溶于适合的溶剂(例如乙醇)中。
一些实施方式中,基板含有导体及介电质表面两者,且形成SAM钝化层,然后是金属氧化物沉积。于SAM表面(亦即该阻隔层)上形成金属氧化物缺陷,并同时在导体表面上沉积连续的金属氧化物。
一些实施方式中,由缺陷去除工艺来去除形成于该SAM表面的该缺陷。该缺陷去除工艺中,使该基板暴露于含金属及卤素的前驱物,该前驱物会通过形成挥发性副产物来蚀刻去除该金属氧化物缺陷。大部分或所有金属氧化物缺陷能够由此方法来去除。
一些实施方式中,该缺陷去除工艺为热处理。如以上述方式所使用的,热处理不会使该基板暴露于等离子体或远程等离子体。
一些实施方式中,该金属-卤素前驱物亦对该连续的金属氧化物层进行蚀刻。当该金属-卤素前驱物亦对该连续金属氧化物层进行蚀刻时,相较于高度相同的缺陷,该金属氧化物层的膜蚀刻速率因暴露表面积较少而更加降低。平稳连续的金属氧化物层上的金属蚀刻可使对下部的导体所造成的影响减少至最小或无影响。
适合缺陷去除的金属-卤素前驱物包括但不限于:WClx、HfClx、NbClx、RuClx,式中,x在1至6之范围内。一些实施方式中,该金属-卤素前驱物包含卤氧化物(例如WOCl4)。一些实施方式中,该金属-卤素前驱物实质上不包含氟。如以此方式所使用的,术语”实质上不包含氟”意指以原子为基准计,该金属-卤素前驱物的卤素含量小于等于约5%、2%、或1%氟。
在该缺陷去除工艺期间,该基板温度能够在约150℃至约550℃的范围内。一些实施方式中,该基板温度在约300℃至约500℃的范围内。
一些实施方式中,该缺陷去除工艺包含等向性蚀刻工艺扬。该等向性蚀刻工艺是通过该基板暴露于该金属-卤素前驱物的时间量来控制。一些实施方式中,该缺陷的去除包含使该基板暴露于金属-卤素前驱物达预定时间量。
尽管本文中已参照特定的实施方式来描述本公开内容,但应理解的是,这些实施方式仅是对本公开内容的原理及应用的说明。本发明所属技术领域的技术人员明显可知,在不背离本公开内容的精神及范围的情况下能够对本发明的方法及装置做出各种修饰及变更。因此,旨在使本公开内容包括在所附权利要求及其等效形式范围内的修饰及变更。
Claims (15)
1.一种选择性沉积的方法,所述方法包含:
提供具有第一材料及第二材料的基板,所述第一材料具有第一表面,所述第二材料具有第二表面;
使所述基板暴露于阻隔化合物,以相对于所述第二表面而于所述第一表面上选择性沉积阻隔层,所述阻隔化合物包含至少一种阻隔分子;
相对于所述第一表面而于所述第二表面上选择性形成一层并于所述第一表面上产生包含所述层的缺陷;及
从所述第一表面上的所述阻隔层去除所述缺陷。
2.如权利要求1所述的方法,其中,从所述第一表面去除所述缺陷包含:使所述基板暴露于金属-卤素前驱物达预定时间量。
3.如权利要求2所述的方法,其中,所述金属-卤素前驱物包含WClx、HfClx、NbClx或RuClx中的一或多种,式中,x为1至6。
4.如权利要求2所述的方法,其中,所述金属-卤素前驱物包含金属卤氧化物。
5.如权利要求2所述的方法,其中,所述金属-卤素前驱物实质上不包含氟原子。
6.如权利要求2所述的方法,其中,去除所述缺陷包含热处理。
7.如权利要求1所述的方法,其中,所述第一材料包含金属氧化物或介电材料,且所述第二材料包含金属或硅。
8.如权利要求6所述的方法,其中,所述第一材料实质上由氧化硅组成。
9.如权利要求1所述的方法,其中,所述第二材料包含金属氧化物或介电材料,且所述第一材料包含金属或硅。
10.如权利要求8所述的方法,其中,所述第二表面实质上由氧化硅组成。
11.如权利要求1所述的方法,其中,所述膜包含金属氧化物。
12.如权利要求11所述的方法,其中,所述金属氧化物为蚀刻中止层或掩模层。
13.如权利要求1所述的方法,其中,所述阻隔分子包含大于一个反应性部分。
14.如权利要求13所述的方法,其中,所述反应性部分是以直线或分支的模式配置。
15.如权利要求1所述的方法,其中,所述阻隔化合物包含至少两种不同的阻隔分子。
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