CN110571226B - 一种显示面板及其制备方法 - Google Patents

一种显示面板及其制备方法 Download PDF

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CN110571226B
CN110571226B CN201910836523.2A CN201910836523A CN110571226B CN 110571226 B CN110571226 B CN 110571226B CN 201910836523 A CN201910836523 A CN 201910836523A CN 110571226 B CN110571226 B CN 110571226B
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CN110571226A (zh
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肖辉
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US16/625,722 priority patent/US11309341B2/en
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Abstract

本发明提供一种显示面板及其制备方法,显示面板包括基板、设置于基板上的遮光层、覆盖遮光层的缓冲层、设置于缓冲层上的有源层、层叠设置于有源层上的栅极绝缘层以及栅极金属层、设置于缓冲层上且覆盖栅极金属层的层间介质层、设置于层间介质层上的第二金属层;其中,有源层包括有源岛,有源岛包括导体层以及与栅极绝缘层对应并接触的半导体层,导体层上设置有保护层。利用铝原子与铟镓锌氧化物中的氧原子的相互扩散作用,在导体层的表面生成的结构致密的三氧化二铝保护层,保护导体化后的导体层,使导体层免受后续制程的影响;同时三氧化二铝具有高阻值的特性,可有效提高存储电容的单位面积电容,满足高解析度要求。

Description

一种显示面板及其制备方法
技术领域
本发明涉及显示技术领域,尤其涉及一种显示面板及其制备方法。
背景技术
在显示面板行业,目前Oxide TFT(氧化物薄膜晶体管)中,由IGZO(indiumgallium zinc oxide,铟镓锌氧化物)制成的半导体层的部分被导体化,当后续热制程时间增加时,半导体层中被导体化的部分有阻抗升高的问题。
发明内容
本发明提供一种显示面板,以解决当后续热制程时间增加时,半导体层中被导体化的部分有阻抗升高的技术问题。
为解决上述问题,本发明提供的技术方案如下:
一种显示面板,包括:
基板;
设置于所述基板上的遮光层;
设置于所述基板上且覆盖所述遮光层的缓冲层;
设置于所述缓冲层上的有源层;
层叠设置于所述有源层上的栅极绝缘层以及栅极金属层;
设置于所述缓冲层上且覆盖所述栅极金属层的层间介质层;
设置于所述层间介质层上的第二金属层,所述第二金属层包括源漏金属层;
层叠设置于所述层间介质层上的钝化层和平坦层;
层叠设置于所述平坦层上的阳极金属层、发光层和阴极金属层;
其中,所述有源层包括有源岛,所述有源岛包括导体层以及与所述栅极绝缘层对应并接触的半导体层,所述导体层上设置有保护层,所述源漏金属层穿过所述保护层与所述导体层接触连接。
进一步的,所述栅极金属层上也设置有覆盖所述栅极金属层的保护层。
进一步的,所述遮光层包括第一金属极板,所述有源层还包括与所述有源岛相互独立的介电层,所述介电层的位置与所述第一金属极板相对应,所述第二金属层还包括设置在所述介电层上且与所述源漏金属层相互独立的第二金属极板。
进一步的,所述介电层上也设置有覆盖所述介电层的保护层。
进一步的,所述层间介质层上设置有开孔,所述第二金属极板位于所述开孔中。
进一步的,所述保护层为三氧化二铝保护层。
本发明还提供一种显示面板的制备方法,包括以下步骤:
S10、在基板上形成遮光层以及覆盖所述遮光层的缓冲层,所述遮光层包括第一金属极板;
S20、在所述缓冲层上形成图案化的有源层,所述有源层包括有源岛和与所述有源岛相互独立的介电层,所述介电层的位置与所述第一金属极板相对应;
S30、在所述有源岛上依次层叠形成栅极绝缘层和栅极金属层;
S40、对所述有源岛露出所述栅极绝缘层的部分进行导体化,形成导体层,并形成覆盖所述导体层的保护层;
S50、形成覆盖所述有源层以及所述栅极金属层的层间介质层;
S60、在所述层间介质层和所述介电层上形成第二金属层,并对所述第二金属层进行图案化处理,以形成与所述导体层接触连接的源漏金属层以及与所述源漏金属层相互独立的第二金属极板,所述第二金属极板设置在所述介电层上,以与所述第一金属极板形成存储电容;
S70、在所述层间介质层上层叠形成钝化层以及平坦层;
S80、在所述平坦层上依次层叠形成阳极金属层、发光层和阴极金属层。
进一步的,所述步骤S40包括:
S41、在所述有源岛露出所述栅极绝缘层的部分上由铝或/和氧化铝形成薄膜;
S42、在有氧的环境中对薄膜进行热退火,使铝分子扩散到所述有源岛露出所述栅极绝缘层的部分中,以使有源岛露出所述栅极绝缘层的部分形成导体层,同时有源岛中的氧原子扩散到薄膜中,以在所述导体层上形成保护层,所述保护层为三氧化二铝保护层。
进一步的,在所述导体层上形成保护层的同时,在所述栅极金属层和所述介电层上也形成保护层。
进一步的,所述步骤S60包括:
S61、在所述层间介质层上与所述第一金属极板对应的位置处形成开孔,以露出所述介电层;
S62、在所述层间介质层和所述介电层上形成第二金属层;
S63、对所述第二金属层进行图案化处理,以形成与所述导体层接触连接的源漏金属层以及与所述源漏金属层相互独立的第二金属极板,所述第二金属极板设置在所述介电层上,以与所述第一金属极板形成存储电容。
本发明的有益效果为:利用铝原子与铟镓锌氧化物中的氧原子的相互扩散作用,达到使铟镓锌氧化物由半导体变成导体,从而形成导体层,同时在导体层的表面生成的结构致密的三氧化二铝保护层,保护导体化后的导体层,使导体层免受后续制程的影响;同时三氧化二铝具有高阻值的特性,可有效提高存储电容的单位面积电容,满足高解析度要求。
附图说明
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明具体实施方式中显示面板的结构示意图;
图2为本发明具体实施方式中显示面板的制备步骤示意图;
图3至图7为本发明具体实施方式中显示面板的制备流程示意图。
附图标记:
10、基板;21、第一金属极板;30、缓冲层;40、有源层;41、有源岛;411、导体层;42、介电层;50、栅极绝缘层;60、栅极金属层;70、层间介质层;71、开孔;81、源漏金属层;82、第二金属极板;101、钝化层;102、平坦层;103、阳极金属层;104、发光层;105、阴极金属层;106、像素定义层;107、保护层。
具体实施方式
以下各实施例的说明是参考附加的图示,用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语,例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。在图中,结构相似的单元是用以相同标号表示。
本发明针对现有的显示面板中,当后续热制程时间增加时,半导体层中被导体化的部分有阻抗升高的技术问题。本发明可以解决上述问题。
一种显示面板,如图1所示,包括基板10、设置于所述基板10上的遮光层、设置于所述基板10上且覆盖所述遮光层的缓冲层30、设置于所述缓冲层30上的有源层40、层叠设置于所述有源层40上的栅极绝缘层50以及栅极金属层60、设置于所述缓冲层30上且覆盖所述栅极金属层60的层间介质层70、设置于所述层间介质层70上的第二金属层、层叠设置于所述层间介质层70上的钝化层101和平坦层102,以及,层叠设置于所述平坦层102上的阳极金属层103、发光层104和阴极金属层105。
其中,所述平坦层102上还设置有像素定义层106,所述像素定义层106上设置有像素开口,所述发光层104位于所述像素开口中。
其中,所述有源层40包括有源岛41,所述有源岛41包括导体层411以及与所述栅极绝缘层50对应并接触的半导体层411,所述导体层411的表面上设置有覆盖所述导体层411的保护层107;所述第二金属层包括源漏金属层81,所述源漏金属层81穿过所述保护层107与所述导体层411接触连接。
通过保护层107覆盖所述导体层411,起到隔热的作用,防止后续热制程使导体层411的阻抗升高,使导体层411免受后续热制程的影响,提高导体层411的热稳定性。
具体的,所述遮光层包括第一金属极板21,所述有源层40还包括与所述有源岛41相互独立的介电层42,所述介电层42的位置与所述第一金属极板21相对应,所述第二金属层还包括设置在所述介电层42上且与所述源漏金属层81相互独立的第二金属极板82。
所述第一金属极板21与所述第二金属极板82形成存储电容,利用有源层40的部分充当存储电容的介电材料。
进一步的,所述栅极金属层60的表面和所述介电层42的表面均覆盖有保护层107。
利用保护层107保护栅极金属层60,同时利用保护层107和有源层40同时充当存储电容的介电材料,有效提升存储电容的单位面积电容,进而满足高解析度的需求。
具体的,所述有源层40的制成材料为铟镓锌氧化物,所述保护层107为三氧化二铝保护层107。
利用结构致密的三氧化二铝保护层107可以保护导体化后的导体层411,使其免受后制程的影响,提高导体层411的稳定性,同时三氧化二铝具有高阻值的特性,可有效提高存储电容的单位面积电容,满足高解析度要求。
具体的,所述层间介质层70上设置有开孔71,所述第二金属极板82位于所述开孔71中。
根据上述显示面板,本发明还提供一种显示面板的制备方法,如图2所示,包括以下步骤:
S10、在基板10上形成遮光层以及覆盖所述遮光层的缓冲层30,所述遮光层包括第一金属极板21;
S20、在所述缓冲层30上形成图案化的有源层40,所述有源层40包括有源岛41和与所述有源岛41相互独立的介电层42,所述介电层42的位置与所述第一金属极板21相对应;
S30、在所述有源岛41上依次层叠形成栅极绝缘层50和栅极金属层60;
S40、对所述有源岛41露出所述栅极绝缘层50的部分进行导体化,形成导体层411,并形成覆盖所述导体层411的保护层107;
S50、形成覆盖所述有源层40以及所述栅极金属层60的层间介质层70;
S60、在所述层间介质层70和所述介电层42上形成第二金属层,并对所述第二金属层进行图案化处理,以形成与所述导体层411接触连接的源漏金属层81以及与所述源漏金属层81相互独立的第二金属极板82,所述第二金属极板82设置在所述介电层42上,以与所述第一金属极板21形成存储电容;
S70、在所述层间介质层70上层叠形成钝化层101以及平坦层102;
S80、在所述平坦层102上依次层叠形成阳极金属层103、发光层104和阴极金属层105。
具体的,所述步骤S40包括:
S41、在所述有源岛41露出所述栅极绝缘层50的部分上由铝或/和氧化铝形成薄膜;
S42、在有氧的环境中对薄膜进行热退火,使铝分子扩散到所述有源岛41露出所述栅极绝缘层50的部分中,以使有源岛41露出所述栅极绝缘层50的部分形成导体层411,同时有源岛41中的氧原子扩散到薄膜中,以在所述导体层411上形成保护层107,所述保护层107为三氧化二铝保护层107。
所述有源层40的制成材料为铟镓锌氧化物,利用铝原子与铟镓锌氧化物中氧原子的相互扩散作用,达到使铟镓锌氧化物由半导体变成导体,从而形成导体层411,同时在导体层411的表面生成的结构致密的三氧化二铝保护层107,可以保护导体化后的导体层411,使导体层411免受后续热制程的影响。
进一步的,在所述导体层411上形成保护层107的同时,在所述栅极金属层60和所述介电层42上也形成保护层107。
具体的,所述步骤S60包括:
S61、在所述层间介质层70上与所述第一金属极板21对应的位置处形成开孔71,以露出所述介电层42;
S62、在所述层间介质层70和所述介电层42上形成第二金属层;
S63、对所述第二金属层进行图案化处理,以形成与所述导体层411接触连接的源漏金属层81以及与所述源漏金属层81相互独立的第二金属极板82,所述第二金属极板82设置在所述介电层42上,以与所述第一金属极板21形成存储电容。
三氧化二铝具有高阻值的特性,可有效提高存储电容的单位面积电容,满足高解析度要求。
参见图3至图7,图3至图7为显示面板的制备流程示意图。
如图3所示,在基板10上形成遮光层后,对所述遮光层进行图案化处理,形成第一金属极板21后,形成覆盖所述遮光层的缓冲层30。
如图4所示,在所述缓冲层30上形成有源层40,并对所述有源层40进行图案化处理,形成有源岛41以及位置与所述第一金属极板21相对应并与所述有源岛41相互独立的介电层42后,在所述有源岛41上依次层叠形成栅极绝缘层50和栅极金属层60。
如图5所示,利用铝或/和氧化铝靶材用溅射的方式,或者利用ALD机台形成覆盖有源层40以及栅极金属层60的薄膜,并在有氧环境下进行热褪火,使铝原子扩散到有源层40中,形成导体层411,同时有源层40中的氧原子扩散到薄膜中,形成三氧化二铝保护层107。
如图6所示,利用氧化硅材料形成覆盖所述有源层40以及所述栅极金属层60的层间介质层70。
如图7所示,在层间介质层70上形成用于源漏金属层81与导体层411连接的孔洞,并去除与所述孔洞对应位置处的保护层107,以便于源漏金属层81与导体层411连接,同时在层间介质层70上形成开孔71,以露出所述介电层42。
随后,在所述层间介质层70上形成填充孔洞和开孔71的第二金属层,并对所述第二金属层进行图案化处理,以形成与所述导体层411接触连接的源漏金属层81以及与所述源漏金属层81相互独立的第二金属极板82。
随后,在所述层间介质层70上形成覆盖第二金属层的钝化层101,在所述钝化层101上形成平坦层102。
随后,在所述平坦层102上形成像素定义层106和与所述源漏金属层81中的漏极接触连接的阳极金属层103后,在阳极金属层103上形成发光层104和阴极金属层105。
本发明的有益效果为:利用铝原子与铟镓锌氧化物中的氧原子的相互扩散作用,达到使铟镓锌氧化物由半导体变成导体,从而形成导体层411,同时在导体层411的表面生成的结构致密的三氧化二铝保护层107,保护导体化后的导体层411,使导体层411免受后续制程的影响;同时三氧化二铝具有高阻值的特性,可有效提高存储电容的单位面积电容,满足高解析度要求。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (6)

1.一种显示面板,其特征在于,包括:
基板;
设置于所述基板上的遮光层;
设置于所述基板上且覆盖所述遮光层的缓冲层;
设置于所述缓冲层上的有源层;
层叠设置于所述有源层上的栅极绝缘层以及栅极金属层;
设置于所述缓冲层上且覆盖所述栅极金属层的层间介质层;
设置于所述层间介质层上的第二金属层,所述第二金属层包括源漏金属层;
层叠设置于所述层间介质层上的钝化层和平坦层;
层叠设置于所述平坦层上的阳极金属层、发光层和阴极金属层;
其中,所述有源层包括有源岛,所述有源岛包括导体层以及与所述栅极绝缘层对应并接触的半导体层,所述导体层上设置有保护层,所述源漏金属层穿过所述保护层与所述导体层接触连接;所述遮光层包括第一金属极板,所述有源层还包括与所述有源岛相互独立的介电层,所述介电层的位置与所述第一金属极板相对应,所述第二金属层还包括设置在所述介电层上且与所述源漏金属层相互独立的第二金属极板,所述介电层上也设置有覆盖所述介电层的保护层,所述保护层为三氧化二铝保护层。
2.根据权利要求1所述的显示面板,其特征在于,所述栅极金属层上也设置有覆盖所述栅极金属层的保护层。
3.根据权利要求1所述的显示面板,其特征在于,所述层间介质层上设置有开孔,所述第二金属极板位于所述开孔中。
4.一种显示面板的制备方法,其特征在于,包括以下步骤:
S10、在基板上形成遮光层以及覆盖所述遮光层的缓冲层,所述遮光层包括第一金属极板;
S20、在所述缓冲层上形成图案化的有源层,所述有源层包括有源岛和与所述有源岛相互独立的介电层,所述介电层的位置与所述第一金属极板相对应;
S30、在所述有源岛上依次层叠形成栅极绝缘层和栅极金属层;
S40、对所述有源岛露出所述栅极绝缘层的部分进行导体化,形成导体层,并形成覆盖所述导体层的保护层,在所述导体层上形成保护层的同时,在所述栅极金属层和所述介电层上也形成保护层,所述保护层为三氧化二铝保护层;
S50、形成覆盖所述有源层以及所述栅极金属层的层间介质层;
S60、在所述层间介质层和所述介电层上形成第二金属层,并对所述第二金属层进行图案化处理,以形成与所述导体层接触连接的源漏金属层以及与所述源漏金属层相互独立的第二金属极板,所述第二金属极板设置在所述介电层上,以与所述第一金属极板形成存储电容;
S70、在所述层间介质层上层叠形成钝化层以及平坦层;
S80、在所述平坦层上依次层叠形成阳极金属层、发光层和阴极金属层。
5.根据权利要求4所述的显示面板的制备方法,其特征在于,所述步骤S40包括:
S41、在所述有源岛露出所述栅极绝缘层的部分上由铝或/和氧化铝形成薄膜;
S42、在有氧的环境中对薄膜进行热退火,使铝分子扩散到所述有源岛露出所述栅极绝缘层的部分中,以使有源岛露出所述栅极绝缘层的部分形成导体层,同时有源岛中的氧原子扩散到薄膜中,以在所述导体层上形成保护层。
6.根据权利要求4所述的显示面板的制备方法,其特征在于,所述步骤S60包括:
S61、在所述层间介质层上与所述第一金属极板对应的位置处形成开孔,以露出所述介电层;
S62、在所述层间介质层和所述介电层上形成第二金属层;
S63、对所述第二金属层进行图案化处理,以形成与所述导体层接触连接的源漏金属层以及与所述源漏金属层相互独立的第二金属极板,所述第二金属极板设置在所述介电层上,以与所述第一金属极板形成存储电容。
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Publication number Priority date Publication date Assignee Title
KR100282233B1 (ko) * 1998-12-09 2001-02-15 구본준 박막트랜지스터 및 그 제조방법
JP4731715B2 (ja) * 2000-04-19 2011-07-27 株式会社半導体エネルギー研究所 発光装置の作製方法
US6706544B2 (en) 2000-04-19 2004-03-16 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and fabricating method thereof
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TWI401802B (zh) 2005-06-30 2013-07-11 Samsung Display Co Ltd 薄膜電晶體板及其製造方法
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CN103199113B (zh) * 2013-03-20 2018-12-25 京东方科技集团股份有限公司 薄膜晶体管及其制备方法、阵列基板、显示装置
JP6374221B2 (ja) * 2013-06-05 2018-08-15 株式会社半導体エネルギー研究所 半導体装置
CN103646966B (zh) * 2013-12-02 2016-08-31 京东方科技集团股份有限公司 一种薄膜晶体管、阵列基板及其制备方法、显示装置
KR102124025B1 (ko) * 2013-12-23 2020-06-17 엘지디스플레이 주식회사 유기발광다이오드 표시장치 및 그 제조방법
US10026797B2 (en) * 2014-11-10 2018-07-17 Lg Display Co., Ltd. Organic light-emitting diode display having multi-mode cavity structure
CN105514116B (zh) * 2015-12-03 2018-08-14 深圳市华星光电技术有限公司 Tft背板结构及其制作方法

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