CN110476239A - 使用反应性退火的间隙填充 - Google Patents

使用反应性退火的间隙填充 Download PDF

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CN110476239A
CN110476239A CN201880021521.1A CN201880021521A CN110476239A CN 110476239 A CN110476239 A CN 110476239A CN 201880021521 A CN201880021521 A CN 201880021521A CN 110476239 A CN110476239 A CN 110476239A
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A·B·玛里克
P·曼纳
江施施
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Abstract

用于无缝间隙填充的方法包括:通过PECVD来形成可流动膜;以反应性退火将可流动膜退火以形成经退火的膜;以及将可流动膜或经退火的膜硬化以固化此膜。可使用更高级硅烷与等离子体来形成可流动膜。反应性退火可使用甲硅烷或更高级硅烷。UV硬化或其他硬化可用于固化可流动膜或经退火的膜。

Description

使用反应性退火的间隙填充
技术领域
本发明总体涉及沉积薄膜的方法。具体地,本发明涉及形成具有低氢含量的间隙填充膜的工艺。
背景技术
在微电子器件制造中,对于许多应用需要填充具有大于10∶1的深宽比(AR)的窄沟槽而没有孔洞。一种应用是用于浅沟槽隔离(STI)。对于此应用,膜需要在整个沟槽为高品质的(例如,具有小于2的湿蚀刻速率比率)而具有非常低的泄漏。随着结构的尺寸缩小以及深宽比增加,沉积的可流动膜的后硬化方法变得困难。造成膜在整个填充的沟槽具有变化的组成。
非晶硅已广泛地使用在半导体制造工艺中作为牺牲层,因为非晶硅可提供相对于其他膜(例如氧化硅、非晶碳等)的良好蚀刻选择性。随着半导体制造中降低的临界尺寸(CD),对于先进晶片制造来说,填充高深宽比间隙变得越来越敏感。现行金属置换栅极工艺涉及炉多晶硅或非晶硅虚拟栅极。由于工艺的性质,接缝形成在Si虚拟栅极的中间。此接缝可能在后工艺期间被打开并造成结构失效。
可沉积可流动膜以填满沟槽而不形成接缝。沉积的可流动膜具有高氢成分,其影响膜密度与品质。各种硬化方法可降低氢成分并改进膜品质;然而,孔洞发生在经硬化的膜中。因此,需要可在高深宽比结构中提供无缝膜生长的用于间隙填充的方法。
发明内容
本发明的一个或多个实施例针对的是处理方法,所述处理方法包括:提供其上具有至少一个特征的基板表面。至少一个特征从基板表面延伸一深度到底表面。至少一个特征具有由第一侧壁与第二侧壁界定的宽度。可流动膜形成在基板表面以及至少一个特征的第一侧壁、第二侧壁和底表面上。可流动膜填充特征而基本上无接缝形成。退火可流动膜以形成经退火的膜。硬化经退火的膜以固化此膜并形成基本上无缝的间隙填充。
本发明的额外实施例针对的是处理方法,所述处理方法包括:提供其上具有至少一个特征的基板表面。至少一个特征从基板表面延伸一深度到底表面。至少一个特征具有由第一侧壁与第二侧壁界定的宽度以及大于或等于约25∶1的深宽比。可流动硅膜通过PECVD形成在基板表面以及至少一个特征的第一侧壁、第二侧壁和底表面上。可流动膜填充特征而基本上无接缝形成。用后处理工艺来处理可流动膜以形成经退火的膜。硬化经退火的膜以固化此膜并形成基本上无缝的间隙填充。
本发明的进一步实施例针对的是处理方法,所述处理方法包括:提供其上具有至少一个特征的基板表面,所述至少一个特征从基板表面延伸一深度到底表面。至少一个特征具有由第一侧壁和第二侧壁界定的宽度以及大于或等于约25∶1的深宽比。可流动硅膜通过PECVD工艺形成在基板表面以及至少一个特征的第一侧壁、第二侧壁和底表面上。可流动膜填充特征而基本上无接缝形成。PECVD工艺包括多晶硅前驱物和包括等离子体气体的等离子体。多晶硅前驱物包括二硅烷、三硅烷、四硅烷、新戊硅烷(neopentasilane)或环己硅烷(cyclohexasilane)中的一者或多者。等离子体气体包括He、Ar、Kr、H2、N2、O2、O3或NH3中的一者或多者。等离子体具有小于或等于约200W的功率。PECVD工艺发生在小于或等于约100℃的温度。可流动膜暴露于后处理工艺,所述后处理工艺包括暴露于在退火温度与退火压力下的退火反应物。退火反应物包括甲硅烷或二硅烷中的一者或多者。退火温度在约100℃至约400℃的范围中。退火压力在约100T至约500T的范围中。经退火的膜暴露于UV硬化以固化此膜并形成基本上无缝的间隙填充。
附图简单说明
为了本发明的上述特征可被详细地理解,通过参照实施例可获得简短总结于上的本发明的更明确的说明,某些实施例示出在附图中。然而,将注意到附图仅示出本发明的典型实施例,且因此不被当作限制本发明的范围,因为本发明可允许其他同等有效的实施例。
图1示出根据本发明的一个或多个实施例的基板特征的截面图;
图2示出其上具有可流动膜的图1的基板特征的截面图;以及
图3显示其上具有经退火的膜的图1的基板特征的截面图。
具体实施方式
在说明本发明的数个示例性实施例之前,将理解到本发明不局限于在接下来的描述中阐明的构建或工艺步骤的细节。本发明可为其他实施例且以各种方式实施或执行。
在此使用“基板”指称任何基板或形成在基板上的材料表面,在所述基板上在制造工艺期间可执行膜处理。例如,其上可执行处理的基板表面包括以下材料,诸如硅、氧化硅、应变硅、绝缘体上硅(SOI)、碳掺杂氧化硅、非晶硅、掺杂硅、锗、砷化镓、玻璃、蓝宝石和任何其他材料,诸如金属、金属氮化物、金属合金和其他导电材料,这取决于应用。基板包括而不限制于半导体晶片。基板可暴露于预处理工艺以抛光、蚀刻、还原、氧化、羟基化、退火、UV硬化、电子束硬化和/或烘烤基板表面。除了直接在基板本身表面上的膜处理,在本发明中,任何公开的膜处理步骤也可如之后更详细公开的那样对形成在基板上的下层执行,且术语“基板表面”意于包括上下文中所指示的此下层。因此,例如在膜/层或部分膜/层已沉积在基板表面之上的情况中,新沉积的膜/层的被暴露的表面变成基板表面。
本公开内容的实施例提供在具有小尺寸的高深宽比(AR)结构中沉积膜(例如,非晶硅)的方法。某些实施例有利地提供涉及可在群集工具环境中执行的循环沉积处理工艺的方法。某些实施例有利地提供无缝高品质非晶硅膜以填满具有小尺寸的高AR沟槽。
本公开内容的一个或多个实施例针对的是沉积能填充具有小于20nm临界尺寸(CD)的高深宽比结构(例如,AR>8∶1)的可流动非晶硅膜的处理。可以用低温(例如,<100℃)的等离子体增强化学气相沉积(PECVD)使用聚硅烷前驱物沉积此膜。处理的等离子体功率可保持低于约200W或300W以降低反应动力并获得无雾度膜。也可通过控制热交换器温度而控制腔室主体温度。二硅烷、三硅烷、四硅烷、新戊硅烷或环己硅烷是可使用的典型聚硅烷。可执行诸如UV硬化之类的后沉积处理以稳定此膜。工艺的实施例允许通过将烃以及氮源添加到可流动Si工艺而制备可流动SiC与SiCN膜。此外,通过将适合的金属前驱物添加至可流动硅工艺,也可沉积可流动金属硅化物(WSi、TaSi、NiSi)。
图1示出具有特征110的基板100的部分截面图。附图显示出具有单个特征的基板以用于说明的目的;然而,本领域技术人员将理解到可以存在超过一个特征。特征110的形状可为任何合适形状,包括但不限于沟槽以及圆柱通孔。如就此使用,术语“特征”意指任何有意的表面不规则。特征的合适示例包括但不限于具有顶部、两个侧壁和底部的沟槽,以及具有顶部和两个侧壁的尖峰。特征可具有任何合适的深宽比(特征的深度对特征的宽度的比率)。在某些实施例中,深宽比大于或等于约5∶1、10∶1、15∶1、20∶1、25∶1、30∶1、35∶1或40∶1。
基板100具有基板表面120。至少一个特征110形成在基板表面120中的开口。特征110从基板表面120延伸深度D到底表面112。特征110具有第一侧壁114和第二侧壁116,所述第一侧壁114和第二侧壁116界定特征110的宽度W。由侧壁和底部所形成的开放区域也可称为间隙。
本公开内容的一个或多个实施例针对的是处理方法,其中提供其上具有至少一个特征的基板表面。如就此使用,术语“提供”意指基板放置到用于进一步处理的位置或环境。
如图2所示,可流动膜150形成在基板表面120以及至少一个特征100的第一侧壁114、第二侧壁116和底表面112上。可流动膜150填充至少一个特征110,以使基本上无接缝形成。接缝是形成在特征中的间隙,位于特征110的侧壁之间但不一定在中间。如就此使用,术语“基本上无接缝”意指形成在侧壁之间的膜中的任何间隙小于侧壁的截面积的约1%。
可流动膜150可通过任何合适工艺形成。在某些实施例中,通过等离子体增强化学气相沉积(PECVD)完成形成可流动膜。换言之,通过等离子体增强化学气相沉积工艺可沉积可流动膜。
某些实施例的PECVD工艺包括将基板表面暴露于反应气体。反应气体可包括一种或多种物质的混合物。例如,反应气体可包括硅前驱物以及等离子体气体。等离子体气体可为任何合适气体,其可被点燃以形成等离子体和/或可作为前驱物的载体或稀释剂。
在某些实施例中,硅前驱物包括更高级硅烷,也被称为多晶硅物质,且被称为多晶硅前驱物。某些实施例的多晶硅前驱物包括二硅烷、三硅烷、四硅烷、新戊硅烷和/或环己硅烷中的一者或多者。在一个或多个实施例中,多晶硅前驱物包括四硅烷。在某些实施例中,多晶硅前驱物主要由四硅烷构成。如就此使用,术语“主要由…构成”意指反应气体的硅物质在摩尔基础(molar basis)上是由约95%或更多的指定物质所构成。例如,主要由四硅烷构成的多晶硅前驱物意指反应气体的硅物质在摩尔基础上大于或等于约95%的四硅烷。
在某些实施例中,等离子体气体包括He、Ar、H2、Kr、N2、O2、O3或NH3中的一者或多者。某些实施例的等离子体气体用作反应气体中的反应物质(例如,多晶硅物质)的稀释剂或载气。
等离子体可被产生或点燃在处理腔室内(例如,直接等离子体)或者可被产生在处理腔室之外并被流入处理腔室(例如,远程等离子体)。等离子体功率可被维持在足够低的功率以防止多晶硅物质还原还原至硅烷和/或最小化或防止膜中的雾度形成。在某些实施例中,等离子体功率小于或等于约300W。在一个或多个实施例中,等离子体功率小于或等于约250W、200W、150W、100W、50W或25W。在某些实施例中,等离子体功率在约10W至约200W的范围中、或约25W至约175W的范围中、或约50W至约150W的范围中。
可流动膜150可在任何合适温度下形成。在某些实施例中,可流动膜150形成在温度在约-100℃至约50℃的范围中、或约-75℃至约40℃的范围中、或约-50℃至约25℃的范围中、或约-25℃至约0℃的范围中。温度可保持为低的,以维持装置的热预算形成。在某些实施例中,形成可流动膜发生在小于约50℃、40℃、30℃、20℃、10℃、0℃、-10℃、-20℃、-30℃、-40℃、-50℃、-60℃、-70℃、-80℃或-90℃的温度。
可流动膜150可在任何合适压力下形成。在某些实施例中,用于形成可流动膜150的压力在约0.5T至约50T的范围中、或约0.75T至约25T的范围中、或约1T至约10T的范围中、或约2T至约8T的范围中、或约3T至约6T的范围中。
可通过改变反应气体的成分来调整可流动膜的成分。在某些实施例中,可流动膜包括SiN、SiO、SiC、SiOC、SiON、SiCON中的一者或多者。为了形成含氧膜,反应气体可包括例如氧、臭氧或水中的一者或多者。为了形成含氮膜,反应气体可包括例如氨、联氨、NO2或N2中的一者或多者。为了形成含碳膜,反应气体可包括例如丙烯和乙炔中的一者或多者。本领域技术人员将理解到其他物质的组合可被包括在反应气体混合物中以改变可流动膜的成分。
在某些实施例中,可流动膜包括金属硅化物。反应气体混合物可包括例如包括钨、钽或镍中的一者或多者的前驱物。可包括其他金属前驱物以改变可流动膜的成分。
参照图3,在可流动膜150形成之后,可用反应性退火工艺来处理可流动膜150以防止在最终间隙填充膜中的孔洞形成。可流动膜150可在退火条件下暴露于反应气体以形成经退火的膜155。用反应性退火处理可流动膜150也可被称为后处理。如就此使用,述语“后处理”指称在可流动膜150的形成之后发生的工艺。当使用各种反应物来调整可流动膜150的成分时,可流动膜的处理致使可流动膜的成分的改变或可流动膜中的原子的相对百分率的改变。例如,若可流动膜150在原子基础上是80%的Si、20%的N,则处理可得到在原子基础上是50%的Si、50%的N的膜。在某些实施例中,暴露于反应性退火工艺造成相较于退火前的可流动膜150具有较低氢含量的膜。在某些实施例中,相对于可流动膜150中的含量,氢含量被降低了大于或等于约30%、40%、50%、60%、70%、80或90%。
反应性退火工艺包括在合适的退火温度和退火压力下将基板暴露于退火反应物。某些实施例的退火反应物包括硅化合物。在一个或多个实施例中,退火反应物包括甲硅烷、二硅烷、三硅烷或更高级硅烷(即,具有多于三个硅原子)中的一者或多者。在某些实施例中,退火反应物与稀释剂或载气共流动。例如,退火反应物可包括在氩载气中的硅烷。在某些实施例中,载气也是反应性的且有助于硬化可流动膜150而不形成孔洞。在某些实施例中,退火反应物包括与使用在可流动膜150的形成中的前驱物相同的硅物质。在某些实施例中,退火反应物包括不同于使用在可流动膜150的形成中的反应物的物质。
某些实施例的反应性退火在没有等离子体的情况下发生。在某些实施例中,在反应性退火工艺期间可产生等离子体。可使用退火反应物或不同于退火反应物的后处理等离子体物质来形成等离子体。例如,退火反应物可与稀释剂或载气流动,稀释剂或载气用于点燃等离子体(例如,氩)。退火反应物可连续地流动或脉冲进入处理腔室。
在某些实施例的反应性退火期间的退火温度在约100℃至约500℃的范围中、或约100℃至约400℃的范围中、或约125℃至约375℃的范围中、或约150℃至约350℃的范围中、或约175℃至约325℃的范围中、或约200℃至约300℃的范围中。在某些实施例中,退火温度大于或等于约100℃、150℃、200℃、250℃、300℃、350℃、400℃、450℃℃或500℃。
在反应性退火工艺期间的退火压力可在约100T至约500T的范围中、或约150T至约450T的范围中、200T至约400T。在某些实施例中,反应性退火期间的退火压力大于或等于约50T、100T、150T、200T、250T、300T或350T。
在可流动膜150或经退火的膜155的形成之后,膜被硬化以固化可流动膜150或经退火的膜155并形成基本上无缝的间隙填充。在某些实施例中,通过将膜暴露于UV硬化工艺而硬化可流动膜150或经退火的膜155。UV硬化工艺可发生在约10℃至约550℃范围中的温度。UV硬化处理可发生持续任何必要的合适时段,以充分地固化可流动膜150或经退火的膜155。在某些实施例中,UV硬化发生持续小于或等于约10分钟、9分钟、8分钟、7分钟、6分钟、5分钟、4分钟、3分钟、2分钟或1分钟。
在某些实施例中,硬化可流动膜150或经退火的膜155包括暴露于等离子体或电子束。等离子体暴露以硬化此膜包括与PECVD等离子体分离的等离子体或后处理等离子体。等离子体物质和处理腔室可为相同或不同的,且等离子体硬化可为不同于PECVD工艺或后处理等离子体的步骤。在某些实施例中,后处理等离子体在同一时间处理和硬化可流动膜150以形成硬化的经退火的膜155。
本公开内容的某些实施例提供具有低氢含量的硬化间隙填充膜。在某些实施例中,在硬化此膜之后,间隙填充膜具有小于或等于约10原子百分比的氢含量。在某些实施例中,硬化膜具有的氢含量小于或等于约5原子百分比、4原子百分比、3原子百分比、2原子百分比或1原子百分比。
根据一个或多个实施例,在形成此层之前和/或之后,基板经受处理。此处理可在相同的腔室或在一个或多个单独的处理腔室中执行。在某些实施例中,基板从第一腔室移动到单独的第二腔室以用于进一步处理。基板可直接从第一腔室移动至单独的处理腔室,或基板可从第一腔室移动至一个或多个转移腔室,且接着移动至单独的处理腔室。因此,处理设备可包括与转移腔室连通的多个腔室。此种设备也被称为“群集工具”或“群集系统”等。
大体上,群集工具是模块系统,所述模块系统包括执行包括以下各种功能的多个腔室:基板中心找寻和定位、除气、退火、沉积和/或蚀刻。根据一个或多个实施例,群集工具至少包括第一腔室和中央转移腔室。中央转移腔室可容纳机器人,所述机器人可在处理腔室与装载锁定腔室之间和处理腔室与装载锁定腔室之中传送基板。转移腔室通常维持在真空条件下并提供用于将基板从一个腔室传送至另一腔室和/或传送至定位在群集工具的前端的装载锁定腔室的中间阶段。可适用于本发明的两种公知的群集工具为两者可从加州圣克拉拉的应用材料公司获得。然而,为了执行本文所述工艺的特定步骤的目的,腔室的确切布置和组合可改变。可使用的其他处理腔室包括但不限于:循环层沉积(CLD)、原子层沉积(ALD)、化学气相沉积(CVD)、物理气相沉积(PVD)、蚀刻、预清洁、化学清洁、诸如RTP之类的热处理、等离子体氮化、除气、定位、羟化以及其他基板工艺。通过在群集工具上的腔室中实施工艺,可避免大气杂质对于基板的表面污染,而没有在沉积后续膜之前的氧化。
根据一个或多个实施例,基板在由一腔室移动至下一腔室时持续在真空或“装载锁定”条件下且不暴露于周围空气。转移腔室因而在真空下且在真空压力下被“抽气(pumpdown)”。惰性气体可存在于处理腔室或转移腔室中。在某些实施例中,惰性气体用作净化气体以移除一些或全部的反应物。根据一个或多个实施例,净化气体在沉积腔室的出口处被注入以阻止反应物从沉积腔室移动至转移腔室和/或额外处理腔室。因此,惰性气体的流动在腔室的出口处形成气幕。
基板可在单个基板沉积腔室中处理,其中单个基板在另一基板被处理之前被载入、处理及卸载。基板也可以以连续方式被处理,类似于输送器系统,其中多个基板单独地载入腔室的第一部分,移动通过腔室并从腔室的第二部分卸载。腔室和相关输送器系统的形状可形成直路径或弯曲路径。此外,处理腔室可为旋转料架,其中多个基板围绕中心轴移动并在整个旋转料架路径上暴露于沉积、蚀刻、退火、清洁等工艺。
在处理期间,基板可被加热或冷却。此加热或冷却可通过任何合适方式完成,包括但不限于改变基板支撑件的温度以及使被加热的或被冷却的气体流动到基板表面。在某些实施例中,基板支撑件包括加热器/冷却器,所述加热器/冷却器可被控制以传导地改变基板温度。在一个或多个实施例中,正被使用的气体(反应气体或惰性气体)被加热或冷却以局部地改变基板温度。在某些实施例中,加热器/冷却器定位在腔室内邻近于基板表面以对流地改变基板温度。
基板在处理期间也可为固定的或被旋转。旋转的基板可连续地旋转或分步地旋转。例如,基板可在整个工艺中旋转,或基板可在暴露于不同反应或净化气体之间少量地旋转。在处理期间旋转基板(连续地或逐步地)可有助于通过最小化例如气体流动几何中局部变动的效应来产生更均匀的沉积或蚀刻。
在此说明书中参照“一个实施例(one embodiment)”、“某些实施例”、“一个或多个实施例”或“一实施例(an embodiment)”意指关于此实施例描述的特定特征、结构、材料或特性被包括在本发明的至少一个实施例中。因此,在本说明书的各处出现的短语“在一个或多个实施例中”、”在某些实施例中”、“在一个实施例中(in one embodiment)”或“在一实施例中(in an embodiment)”并不一定指称本发明的相同实施例。此外,特定的特征、结构、材料或特性可以以任何合适的方式组合在一个或多个实施例中。
尽管在此已参照特定实施例来说明本发明,但是将理解到这些实施例仅说明本发明的原理和应用。在不背离本发明的精神和范围的情况下,可对本发明的方法和设备进行各种修改和改变,这对于本领域技术人员来说是显而易见的。因此,意于本发明包括在所附权利要求及其等效物的范围内的修改和改变。

Claims (15)

1.一种处理方法,包括以下步骤:
提供基板表面,所述基板表面上具有至少一个特征,所述至少一个特征从所述基板表面延伸一深度至底表面,所述至少一个特征具有由第一侧壁和第二侧壁界定的宽度;
在所述基板表面以及所述至少一个特征的所述第一侧壁、所述第二侧壁和所述底表面上形成可流动膜,所述可流动膜填充所述特征而基本上无接缝形成;以及
退火所述可流动膜以形成经退火的膜;以及
硬化所述经退火的膜以固化所述膜并形成基本上无缝的间隙填充。
2.如权利要求1所述的处理方法,其中形成所述可流动膜包括等离子体增强化学气相沉积(PECVD)。
3.如权利要求2所述的处理方法,其中所述PECVD包括多晶硅前驱物以及等离子体,所述等离子体包括等离子体气体。
4.如权利要求3所述的处理方法,其中所述多晶硅前驱物包括以下项中的一者或多者:二硅烷、三硅烷、四硅烷、新戊硅烷或环己硅烷。
5.如权利要求3所述的处理方法,其中所述等离子体气体包括He、Ar、Kr、H2、N2、O2、O3或NH3中的一者或多者。
6.如权利要求5所述的处理方法,其中所述等离子体具有小于约300W的功率。
7.如权利要求5所述的处理方法,其中所述等离子体是直接等离子体。
8.如权利要求1所述的处理方法,其中形成所述可流动膜发生在小于约100℃的温度。
9.如权利要求1所述的处理方法,其中硬化所述经退火的膜包括UV硬化。
10.如权利要求9所述的处理方法,其中所述UV硬化发生在约10℃至约550℃的范围中的温度。
11.如权利要求1所述的处理方法,其中硬化所述经退火的膜包括将所述经退火的膜暴露于与所述PECVD等离子体分开的等离子体和/或电子束。
12.如权利要求3所述的处理方法,其中所述可流动膜包括SiN、SiO、SiC、SiOC、SiON、SiCON中的一者或多者。
13.如权利要求12所述的处理方法,其中所述PECVD进一步包括丙烯、乙炔、氨、氧、臭氧或水中的一者或多者。
14.如权利要求1所述的处理方法,其中退火所述可流动膜包括在退火温度和退火压力下将所述可流动膜暴露于退火反应物。
15.如权利要求14所述的处理方法,其中所述退火反应物包括甲硅烷或二硅烷中的一者或多者。
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Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10622214B2 (en) 2017-05-25 2020-04-14 Applied Materials, Inc. Tungsten defluorination by high pressure treatment
CN111095513B (zh) 2017-08-18 2023-10-31 应用材料公司 高压高温退火腔室
US10276411B2 (en) 2017-08-18 2019-04-30 Applied Materials, Inc. High pressure and high temperature anneal chamber
EP4321649A3 (en) 2017-11-11 2024-05-15 Micromaterials LLC Gas delivery system for high pressure processing chamber
CN111432920A (zh) 2017-11-17 2020-07-17 应用材料公司 用于高压处理系统的冷凝器系统
WO2019173006A1 (en) 2018-03-09 2019-09-12 Applied Materials, Inc. High pressure annealing process for metal containing materials
US10950429B2 (en) 2018-05-08 2021-03-16 Applied Materials, Inc. Methods of forming amorphous carbon hard mask layers and hard mask layers formed therefrom
US10748783B2 (en) 2018-07-25 2020-08-18 Applied Materials, Inc. Gas delivery module
WO2020117462A1 (en) 2018-12-07 2020-06-11 Applied Materials, Inc. Semiconductor processing system
US11901222B2 (en) 2020-02-17 2024-02-13 Applied Materials, Inc. Multi-step process for flowable gap-fill film
WO2023114870A1 (en) * 2021-12-17 2023-06-22 Lam Research Corporation High pressure plasma inhibition
WO2023159012A1 (en) * 2022-02-15 2023-08-24 Lam Research Corporation High pressure inert oxidation and in-situ annealing process to improve film seam quality and wer

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4900591A (en) * 1988-01-20 1990-02-13 The United States Of America As Represented By The Secretary Of The Air Force Method for the deposition of high quality silicon dioxide at low temperature
JPH1131683A (ja) * 1997-07-14 1999-02-02 Sony Corp 半導体装置の製造方法
US6171945B1 (en) * 1998-10-22 2001-01-09 Applied Materials, Inc. CVD nanoporous silica low dielectric constant films
JP2002057121A (ja) * 2001-05-21 2002-02-22 Toshiba Corp 半導体装置及びその製造方法
US20090061647A1 (en) * 2007-08-27 2009-03-05 Applied Materials, Inc. Curing methods for silicon dioxide thin films deposited from alkoxysilane precursor with harp ii process
US20090298257A1 (en) * 2008-05-30 2009-12-03 Asm Japan K.K. Device isolation technology on semiconductor substrate
US20120161405A1 (en) * 2010-12-20 2012-06-28 Mohn Jonathan D System and apparatus for flowable deposition in semiconductor fabrication
US8278224B1 (en) * 2009-09-24 2012-10-02 Novellus Systems, Inc. Flowable oxide deposition using rapid delivery of process gases
US20140213070A1 (en) * 2013-01-25 2014-07-31 Applied Materials, Inc. Low shrinkage dielectric films
US20150056821A1 (en) * 2013-08-22 2015-02-26 Asm Ip Holding B.V. Method for Forming SiOCH Film Using Organoaminosilane Annealing
US20150303056A1 (en) * 2012-06-12 2015-10-22 Novellus Systems, Inc. Conformal deposition of silicon carbide films
US20160322229A1 (en) * 2015-05-01 2016-11-03 Applied Materials, Inc. Methods for selective deposition of metal silicides via atomic layer deposition cycles

Family Cites Families (64)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3670277B2 (ja) 1991-05-17 2005-07-13 ラム リサーチ コーポレーション 低い固有応力および/または低い水素含有率をもつSiO▲X▼フィルムの堆積法
US5344792A (en) 1993-03-04 1994-09-06 Micron Technology, Inc. Pulsed plasma enhanced CVD of metal silicide conductive films such as TiSi2
JPH08222554A (ja) * 1994-12-14 1996-08-30 Sony Corp プラズマを利用した成膜装置およびその方法
US5800878A (en) 1996-10-24 1998-09-01 Applied Materials, Inc. Reducing hydrogen concentration in pecvd amorphous silicon carbide films
US6284050B1 (en) 1998-05-18 2001-09-04 Novellus Systems, Inc. UV exposure for improving properties and adhesion of dielectric polymer films formed by chemical vapor deposition
US6168837B1 (en) 1998-09-04 2001-01-02 Micron Technology, Inc. Chemical vapor depositions process for depositing titanium silicide films from an organometallic compound
US6399489B1 (en) 1999-11-01 2002-06-04 Applied Materials, Inc. Barrier layer deposition using HDP-CVD
US6475930B1 (en) 2000-01-31 2002-11-05 Motorola, Inc. UV cure process and tool for low k film formation
US6582777B1 (en) 2000-02-17 2003-06-24 Applied Materials Inc. Electron beam modification of CVD deposited low dielectric constant materials
US6614181B1 (en) 2000-08-23 2003-09-02 Applied Materials, Inc. UV radiation source for densification of CVD carbon-doped silicon oxide films
US6632478B2 (en) * 2001-02-22 2003-10-14 Applied Materials, Inc. Process for forming a low dielectric constant carbon-containing film
US6926926B2 (en) 2001-09-10 2005-08-09 Applied Materials, Inc. Silicon carbide deposited by high density plasma chemical-vapor deposition with bias
US6756085B2 (en) 2001-09-14 2004-06-29 Axcelis Technologies, Inc. Ultraviolet curing processes for advanced low-k materials
US7056560B2 (en) 2002-05-08 2006-06-06 Applies Materials Inc. Ultra low dielectric materials based on hybrid system of linear silicon precursor and organic porogen by plasma-enhanced chemical vapor deposition (PECVD)
US6936551B2 (en) 2002-05-08 2005-08-30 Applied Materials Inc. Methods and apparatus for E-beam treatment used to fabricate integrated circuit devices
US7186630B2 (en) 2002-08-14 2007-03-06 Asm America, Inc. Deposition of amorphous silicon-containing films
US6693050B1 (en) 2003-05-06 2004-02-17 Applied Materials Inc. Gapfill process using a combination of spin-on-glass deposition and chemical vapor deposition techniques
JP2005223268A (ja) 2004-02-09 2005-08-18 Seiko Epson Corp 薄膜トランジスタの製造方法、ディスプレイの製造方法及びディスプレイ
US7582555B1 (en) 2005-12-29 2009-09-01 Novellus Systems, Inc. CVD flowable gap fill
US7524735B1 (en) * 2004-03-25 2009-04-28 Novellus Systems, Inc Flowable film dielectric gap fill process
US20050272220A1 (en) 2004-06-07 2005-12-08 Carlo Waldfried Ultraviolet curing process for spin-on dielectric materials used in pre-metal and/or shallow trench isolation applications
US7157327B2 (en) 2004-07-01 2007-01-02 Infineon Technologies Ag Void free, silicon filled trenches in semiconductors
US7422776B2 (en) 2004-08-24 2008-09-09 Applied Materials, Inc. Low temperature process to produce low-K dielectrics with low stress by plasma-enhanced chemical vapor deposition (PECVD)
US8980769B1 (en) 2005-04-26 2015-03-17 Novellus Systems, Inc. Multi-station sequential curing of dielectric films
US20060251827A1 (en) 2005-05-09 2006-11-09 Applied Materials, Inc. Tandem uv chamber for curing dielectric materials
US8110493B1 (en) 2005-12-23 2012-02-07 Novellus Systems, Inc. Pulsed PECVD method for modulating hydrogen content in hard mask
US20070277734A1 (en) * 2006-05-30 2007-12-06 Applied Materials, Inc. Process chamber for dielectric gapfill
US7297376B1 (en) 2006-07-07 2007-11-20 Applied Materials, Inc. Method to reduce gas-phase reactions in a PECVD process with silicon and organic precursors to deposit defect-free initial layers
US7888273B1 (en) * 2006-11-01 2011-02-15 Novellus Systems, Inc. Density gradient-free gap fill
CN101589459A (zh) 2007-01-26 2009-11-25 应用材料股份有限公司 用于层间介电气隙的pevcd沉积牺牲聚合物薄膜的紫外光固化
KR100888186B1 (ko) 2007-08-31 2009-03-10 주식회사 테스 절연막 형성 방법
US7541297B2 (en) * 2007-10-22 2009-06-02 Applied Materials, Inc. Method and system for improving dielectric film quality for void free gap fill
US8357435B2 (en) 2008-05-09 2013-01-22 Applied Materials, Inc. Flowable dielectric equipment and processes
US8557712B1 (en) 2008-12-15 2013-10-15 Novellus Systems, Inc. PECVD flowable dielectric gap fill
US8980382B2 (en) 2009-12-02 2015-03-17 Applied Materials, Inc. Oxygen-doping for non-carbon radical-component CVD films
US8741788B2 (en) 2009-08-06 2014-06-03 Applied Materials, Inc. Formation of silicon oxide using non-carbon flowable CVD processes
US20130022745A1 (en) 2009-08-14 2013-01-24 American Air Liquide, Inc. Silane blend for thin film vapor deposition
US8466067B2 (en) 2009-10-05 2013-06-18 Applied Materials, Inc. Post-planarization densification
US8329587B2 (en) 2009-10-05 2012-12-11 Applied Materials, Inc. Post-planarization densification
US20110151677A1 (en) * 2009-12-21 2011-06-23 Applied Materials, Inc. Wet oxidation process performed on a dielectric material formed from a flowable cvd process
US8318584B2 (en) 2010-07-30 2012-11-27 Applied Materials, Inc. Oxide-rich liner layer for flowable CVD gapfill
KR101736246B1 (ko) 2010-09-14 2017-05-17 삼성전자주식회사 비휘발성 메모리 소자 및 이의 제조방법
US8450191B2 (en) 2011-01-24 2013-05-28 Applied Materials, Inc. Polysilicon films by HDP-CVD
US8871656B2 (en) * 2012-03-05 2014-10-28 Applied Materials, Inc. Flowable films using alternative silicon precursors
US20130309856A1 (en) 2012-05-15 2013-11-21 International Business Machines Corporation Etch resistant barrier for replacement gate integration
US20180347035A1 (en) 2012-06-12 2018-12-06 Lam Research Corporation Conformal deposition of silicon carbide films using heterogeneous precursor interaction
US9234276B2 (en) 2013-05-31 2016-01-12 Novellus Systems, Inc. Method to obtain SiC class of films of desired composition and film properties
US10211310B2 (en) 2012-06-12 2019-02-19 Novellus Systems, Inc. Remote plasma based deposition of SiOC class of films
US10832904B2 (en) 2012-06-12 2020-11-10 Lam Research Corporation Remote plasma based deposition of oxygen doped silicon carbide films
US9514932B2 (en) 2012-08-08 2016-12-06 Applied Materials, Inc. Flowable carbon for semiconductor processing
KR101950349B1 (ko) 2012-12-26 2019-02-20 에스케이하이닉스 주식회사 보이드 프리 폴리실리콘 갭필 방법 및 그를 이용한 반도체장치 제조 방법
US9396986B2 (en) * 2013-10-04 2016-07-19 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanism of forming a trench structure
US9029272B1 (en) 2013-10-31 2015-05-12 Asm Ip Holding B.V. Method for treating SiOCH film with hydrogen plasma
DE102013020518A1 (de) 2013-12-11 2015-06-11 Forschungszentrum Jülich GmbH Fachbereich Patente Verfahren und Vorrichtung zur Polymerisation einer Zusammensetzung enthaltend Hydridosilane und anschließenden Verwendung der Polymerisate zur Herstellung von siliziumhaltigen Schichten
US9406547B2 (en) 2013-12-24 2016-08-02 Intel Corporation Techniques for trench isolation using flowable dielectric materials
US9786542B2 (en) * 2014-01-13 2017-10-10 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanisms for forming semiconductor device having isolation structure
SG10202000545RA (en) 2014-10-24 2020-03-30 Versum Materials Us Llc Compositions and methods using same for deposition of silicon-containing films
US9570287B2 (en) 2014-10-29 2017-02-14 Applied Materials, Inc. Flowable film curing penetration depth improvement and stress tuning
CN107430991A (zh) 2015-02-23 2017-12-01 应用材料公司 用于形成高质量薄膜的循环连续工艺
US20160314964A1 (en) 2015-04-21 2016-10-27 Lam Research Corporation Gap fill using carbon-based films
US9871100B2 (en) * 2015-07-29 2018-01-16 Taiwan Semiconductor Manufacturing Co., Ltd. Trench structure of semiconductor device having uneven nitrogen distribution liner
US9633838B2 (en) * 2015-12-28 2017-04-25 L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude Vapor deposition of silicon-containing films using penta-substituted disilanes
US9735005B1 (en) 2016-03-11 2017-08-15 International Business Machines Corporation Robust high performance low hydrogen silicon carbon nitride (SiCNH) dielectrics for nano electronic devices
US11062897B2 (en) 2017-06-09 2021-07-13 Lam Research Corporation Metal doped carbon based hard mask removal in semiconductor fabrication

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4900591A (en) * 1988-01-20 1990-02-13 The United States Of America As Represented By The Secretary Of The Air Force Method for the deposition of high quality silicon dioxide at low temperature
JPH1131683A (ja) * 1997-07-14 1999-02-02 Sony Corp 半導体装置の製造方法
US6171945B1 (en) * 1998-10-22 2001-01-09 Applied Materials, Inc. CVD nanoporous silica low dielectric constant films
JP2002057121A (ja) * 2001-05-21 2002-02-22 Toshiba Corp 半導体装置及びその製造方法
US20090061647A1 (en) * 2007-08-27 2009-03-05 Applied Materials, Inc. Curing methods for silicon dioxide thin films deposited from alkoxysilane precursor with harp ii process
US20090298257A1 (en) * 2008-05-30 2009-12-03 Asm Japan K.K. Device isolation technology on semiconductor substrate
US8278224B1 (en) * 2009-09-24 2012-10-02 Novellus Systems, Inc. Flowable oxide deposition using rapid delivery of process gases
US20120161405A1 (en) * 2010-12-20 2012-06-28 Mohn Jonathan D System and apparatus for flowable deposition in semiconductor fabrication
US20150303056A1 (en) * 2012-06-12 2015-10-22 Novellus Systems, Inc. Conformal deposition of silicon carbide films
US20140213070A1 (en) * 2013-01-25 2014-07-31 Applied Materials, Inc. Low shrinkage dielectric films
US20150056821A1 (en) * 2013-08-22 2015-02-26 Asm Ip Holding B.V. Method for Forming SiOCH Film Using Organoaminosilane Annealing
US20160322229A1 (en) * 2015-05-01 2016-11-03 Applied Materials, Inc. Methods for selective deposition of metal silicides via atomic layer deposition cycles

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