CN110419101A - 用于引线接合应用的封装结构中的中介层设计 - Google Patents
用于引线接合应用的封装结构中的中介层设计 Download PDFInfo
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- CN110419101A CN110419101A CN201680091264.XA CN201680091264A CN110419101A CN 110419101 A CN110419101 A CN 110419101A CN 201680091264 A CN201680091264 A CN 201680091264A CN 110419101 A CN110419101 A CN 110419101A
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- intermediary layer
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Abstract
描述了形成微电子封装结构的方法,以及由此形成的结构。那些方法/结构可以包括:将第一管芯附接在板上,将中介层附接在第一管芯的顶部表面上,以及将第二管芯邻近中介层附接在第一管芯的顶部表面上,其中第二管芯从第一管芯的中心区域偏移。第一导线结构可以附接到第二管芯,该第一导线结构从第二管芯延伸到中介层的顶部表面。第二导线结构附接到中介层并且从中介层延伸到板。
Description
背景技术
微电子封装结构可以被用来支持各种管芯/器件,例如诸如计算设备和/或存储器设备。可以在壳体管芯中采用的封装结构可以包括混合封装,其可以包括安装在较大的底部管芯上的较小的顶部管芯。
附图说明
尽管本说明书以特别指出并明确要求保护某些实施例的权利要求书作结论,但是当结合附图阅读时,可以根据下面对本发明的描述来更容易地确定这些实施例的优点,在附图中:
图1a-1d表示根据实施例的结构的横截面视图。
图2表示根据实施例的过程流程。
图3表示根据实施例的方法的流程图。
图4表示根据各种实施例的计算设备的示意图。
具体实施方式
在以下详细描述中,对附图做出参考,附图作为图示示出了其中可以实践方法和结构的具体实施例。充分详细地描述了这些实施例以使得本领域技术人员能够实践实施例。要理解的是,各种实施例尽管不同,但不一定互相排斥。例如,可以在不偏离实施例的精神和范围的情况下,在其他实施例内实现结合实施例在本文中所描述的特定特征、结构或特性。此外,要理解的是,可以在不偏离实施例的精神和范围的情况下,修改每个公开的实施例内的各个元件的位置或布置。
因此,并不以限制意义考虑以下详细描述,并且实施例的范围仅由被适当阐释的所附权利要求以及权利要求所赋予的等价方式的全部范围来限定。在附图中,贯穿若干视图,相似的数字可以指代相同或类似的功能。如本文中使用的术语“在……之上”、“到”、“之间”和“在……上”可以指代一层相对于其他层的相对位置。在另一层“之上”或“上”的一层或者被接合“到”另一层的一层可以与该另一层直接接触,或者可以具有一个或多个介于中间的层。在层“之间”的一层可以与这些层直接接触,或者可以具有一个或多个介于中间的层。彼此“邻近”的层和/或结构可以具有或可以不具有在它们之间的介于中间的结构/层。直接在另一(一个或多个)层/(一个或多个)结构上/直接接触另一(一个或多个)层/(一个或多个)结构的(一个或多个)层/(一个或多个)结构可以在它们之间没有介于中间的(一个或多个)层/(一个或多个)结构。
可以在诸如封装衬底之类的衬底上形成或执行本文中的实施例的各种实现方式。封装衬底可以包括能够在电学组件(诸如,集成电路(IC)管芯)与IC封装可以耦合到的下一层级组件(例如,电路板)之间提供电连通的任何适合类型的衬底。在另一个实施例中,衬底可以包括能够在IC管芯与耦合于下部IC/管芯封装的上部IC封装之间提供电连通的任何适合类型的衬底,并且在另外的实施例中,衬底可以包括能够在上部IC封装与IC封装耦合到的下一层级组件之间提供电连通的任何适合类型的衬底。
衬底也可以为管芯提供结构支撑。作为示例,在实施例中,衬底可以包括多层衬底(包括介电材料和金属的交替层),其围绕芯层(电介质或金属芯)而构建。在另一个实施例中,衬底可以包括无芯多层衬底。还可以找到其他类型的衬底和衬底材料(例如,陶瓷、蓝宝石、玻璃等)与所公开的实施例一起使用。另外,根据实施例,衬底可以包括电介质材料和金属的交替层,它们被构建在管芯自身之上——该过程有时被称为“无凸起构建过程”。在利用这样的方法的情况下,可能需要或者可能不需要导电互连(因为在一些情况下构建层可能直接设置在管芯之上)。
管芯可以包括前侧和相反的背侧。在一些实施例中,前侧可以被称为管芯的“有效表面”。许多互连可以从管芯的前侧延伸到下面的衬底,并且这些互连可以电耦合管芯和衬底。在一些情况下,管芯可以直接耦合到板,诸如主板。互连/迹线可以包括能够在管芯与衬底/板之间提供电连通的任何类型的结构和材料。在一些实施例中,管芯可以采用倒装芯片布置而被设置在衬底上。在实施例中,互连包括管芯上的导电端子(例如,焊盘、凸起、螺柱凸起、柱形物、支柱或其他适合的结构或结构的组合)和衬底上的对应的导电端子(例如,焊盘、凸起、螺柱凸起、柱形物、支柱或其他适合的结构或结构的组合)。
焊料(例如,以球或凸起的形式)可以设置在衬底和/或管芯的端子上,并且然后可以使用焊料回流过程来使这些端子结合。当然,应当理解的是,许多其他类型的互连和材料也是可能的(例如,在管芯与衬底之间延伸的引线接合物)。在本文的一些实施例中,管芯可以通过采用倒装芯片布置的多个互连来与衬底耦合。然而,在其他实施例中,可以利用替换结构和/或方法来将管芯与衬底耦合。
描述了形成封装结构的方法(包括在混合封装结构上形成引线接合物的方法)的实施例。那些方法/结构可以包括:将第一管芯附接在板上,将中介层附接在第一管芯的顶部表面上,将邻近中介层的第二管芯附接在第一管芯的顶部表面上,其中第二管芯从第一管芯的中心区域偏移。第一导线结构可以附接到第二管芯,该第一导线结构从第二管芯延伸到中介层的顶部表面。第二导线结构附接到中介层,该第二导线结构从中介层延伸到板。本文中的实施例能够在混合封装中实现增加的线扫描性能和芯片边缘间隙(clearance)。
图1a-1d图示了制造封装结构的实施例的横截面视图,该封装结构包括例如改善混合微电子封装中的线扫描的中介层。在图1a(横截面视图)中,示出了封装结构100的一部分,该封装结构诸如是混合封装100。在实施例中,衬底102可以包括:板,例如诸如玻璃纤维增强环氧树脂层压板,其是阻燃的(FR4)。在另一个实施例中,封装衬底102可以包括:板的一部分,该板例如诸如是印刷电路板(PCB板),并且在其他实施例中,衬底102可以包括主板。
在实施例中,管芯106(诸如微电子管芯)可以设置在衬底102的顶部表面上。在实施例中,可以包括第一管芯106的管芯106可以包括倒装芯片管芯。在另一个实施例中,管芯106可以包括任何类型的微处理器,诸如但不限于微处理器、图形处理器、信号处理器、网络处理器、芯片组等。在实施例中,管芯106包括:具有多个功能单元(例如,一个或多个处理单元、一个或多个图形单元、一个或多个通信单元、一个或多个信号处理单元、一个或多个安全单元等)的片上系统(SoC)。然而,应当理解的是,所公开的实施例并不限于任何特定类型或类别的管芯/器件。器件/管芯106的底部表面107可以通过焊球/导电结构104与衬底/板102电学地且物理地连接。第一管芯106可以包括长度134。
焊球108可以设置在衬底/板的底部表面上。中介层112可以设置在管芯106的顶部表面109上。中介层112可以包括任何合适类型的板/衬底,诸如例如PCB板,例如利用其来路由信号。在实施例中,中介层112可以包括顶部表面上的至少一个接合焊盘。在实施例中,中介层112可以从管芯106的中心区域/位置122偏移。第二管芯110可以设置在管芯106的顶部表面109上,并且可以邻近顶部表面上的中介层112。在实施例中,第二管芯110可以包括存储器管芯。
在其他实施例中,第二管芯110可以根据特定应用包括任何类型的合适管芯/器件。在实施例中,第二管芯110的覆盖区(footprint)124可以从第一管芯106的中心位置122偏移。第二管芯110的外围边缘可以位于距管芯106的端部的一定距离126处。第二管芯110可以包括长度136。在实施例中,第一管芯106可以包括的长度134大于第二管芯110的长度136的约两倍。
第一导线结构116可以设置/附接到第二管芯110。在实施例中,第一导线结构116可以包括线结构,并且在实施例中可以通过诸如球形接合物之类的接合物而接合到第二管芯110的顶部表面。在实施例中,球形接合物可以包括金、铜或银,并且本文中的线结构可以包括类似的材料。在实施例中,第一导线结构116的第一端115可以附接到第二管芯110的顶部表面。第一导线结构116的第二端117可以附接/接合到中介层112。在实施例中,第一导线结构116可以包括导线,其中导线的第一端115和第二端117可以分别接合到第二管芯110上以及接合到中介层112上。在实施例中,第一导线结构116可以从第二管芯110延伸到中介层112的顶部表面。
在实施例中,第二导线结构114可以从中介层112的顶部表面延伸到板102的顶部表面。在实施例中,第二导线结构114的第一端119可以设置在中介层112的顶部表面上,并且第二导线结构114的第二端121可以设置在板102的顶部表面上。在实施例中,第二导线结构114的第一端119可以邻近第二管芯110的顶部表面上的第一导线结构116的第二端117。在实施例中,第三导线结构118可以从顶部管芯112的顶部表面延伸到板102的顶部表面。在实施例中,第三导线结构118可以设置在第二管芯110的顶部表面上,其中第一导线116的第一端115设置在第二管芯110的顶部表面的相反侧上。
在实施例中,第二管芯110的边缘可以从第一管芯106的边缘偏移一定距离126。在实施例中,第二导线结构114可以设置为距第一管芯106的边缘一定距离128,并且第三导线结构118可以设置为距第一管芯106的相反边缘一定距离129。在实施例中,由于第二管芯110可以小于第一管芯106的长度的大约一半,所以形成/附接耦合到中介层112的两段较短的接合导线结构114、116(而不是从第二管芯110到板102延伸一条更长的线)将导线结构114增加到第一管芯106边缘间隙128。附加地,由于第二管芯110从第一管芯106的中心122移位/偏移,因此增强了第三导线结构118边缘间隙129。在实施例中,封装结构100包括混合封装,其中底部/第一管芯106包括倒装芯片管芯和顶部/第二管芯110,其可以包括引线接合的管芯。在实施例中,在第二管芯110与板102之间增加线扫描,并且降低了板102与第二管芯110之间的线短接和低间隙的发生。
图1b描绘了封装衬底100的另一个实施例,其中板102包括两个第一管芯106、106'。在实施例中,第一管芯106、106'中的至少一个可以包括倒装芯片管芯,但是根据特定应用可以包括其他类型的器件。两个倒装芯片管芯106、106'中的每一个包括:分别在第一管芯106、106'中的每一个的顶部表面上的中介层112、112'和邻近的第二管芯110、110'。在实施例中,板102可以包括设置在其上的第一模块130和第二模块132。第一模块130可以包括第一管芯106,其中中介层112和第二管芯102在第一管芯106的表面上彼此邻近地设置。第二模块132可以包括第一管芯106',其中中介层112'和第二管芯102'在第一管芯106'的表面上彼此邻近地设置。
第一导线结构116可以设置/附接到第一模块的第二管芯110。在实施例中,第一导线结构116可以从第二管芯110延伸到中介层112的顶部表面。在实施例中,第二导线结构114可以从中介层112的顶部表面延伸到板102的顶部表面,其中第二导线结构114可以邻近中介层的顶部表面上的第一导线结构。在实施例中,第三导线结构118可以从第二管芯110的顶部表面延伸到板102的顶部表面。在实施例中,第三导线结构118可以邻近第二管芯110的顶部表面上的第一导线结构116。
在实施例中,第一模块130的第二导线结构114可以设置为距第一管芯106的边缘一定距离128,并且第三导线结构118可以设置为距第一管芯106的相反边缘一定距离129。第二模块132可以包括:第一导线结构116',其布置/附接到第一模块的第二管芯110',并且从第二管芯110'延伸到中介层112'的顶部表面。在实施例中,第二导线结构114'可以从中介层112'的顶部表面延伸到板102'的顶部表面,其中第二导线结构114'可以邻近中介层的顶部表面上的第一导线结构116'。
在实施例中,第三导线结构118'可以从第二管芯110'的顶部表面延伸到板102的顶部表面。在实施例中,第三导线结构118'可以设置在第二管芯110'的顶部表面上,其中第一导线结构116'的第一端115'设置在第二管芯110'的顶部表面的相反侧上。在实施例中,第二导线结构114'可以设置在距第一管芯106'的边缘一定高度128'处,并且第三导线结构118'可以设置在距第一管芯106'的边缘一定高度129'处。在实施例中,第二管芯110、110'的覆盖区(诸如图1a的覆盖区124)可以分别从第一管芯106、106'的中心位置122、122'偏移一定距离125、125'。在实施例中,第一管芯106'可以被描述为设置在板102上的第三管芯,其中第二中介层112'和第四管芯(第二管芯110')在第三管芯的顶部表面上彼此邻近地设置。
图1c描绘了封装结构100的一部分。第一管芯106可以设置在板102上,并且中介层112和第二管芯110设置在第一管芯106的顶部表面上。第一导线结构116从第二管芯110延伸到中介层112的顶部表面,其中第一导线结构116的第一端115可以耦合到第二管芯110的顶部表面(其中第一端115可以接合到第二管芯110的顶部表面上的接合焊盘),并且第一导线结构116的第二端117可以耦合到设置在中介层112上的接合结构113。在实施例中,第二导线结构114的第一端119可以耦合到接合结构113,其中第一导线结构116和第二导线结构114通过级联接合结构113彼此耦合。根据特定应用,其他合适类型的接合可以被用来在中介层112上物理地且电学地耦合第一和第二线结构116、114。
在实施例中,两个前向接合结构113可以包括在中介层112的顶部表面上在彼此的顶部上设置/堆叠的两个接合结构。第二导线结构114的第二端121可以从中介层112延伸到板102,并且可以物理地且电学地与其耦合。第三导线结构118可以从第二管芯110的顶部表面延伸,并且可以耦合到板102。边缘间隙128、129可以分别将第二和第三导线结构114、118与第一管芯106的边缘分开。
图1d描绘了封装结构100的一部分。第一管芯106设置在板102上,并且中介层112和第二管芯110设置在第一管芯106的顶部表面上。第一导线结构116从第二管芯110延伸到中介层112的顶部表面。在实施例中,第一导线结构116的第一端115可以耦合到第二管芯110的顶部表面,并且第一导线结构116的第二端117可以耦合到接合结构123,该接合结构123设置在中介层112上。在实施例中,第二导线结构114的第一端119可以耦合到接合结构123,其中第一导线结构116和第二导线结构114通过两个前向引线接合结构123彼此耦合。
在实施例中,两个前向接合结构123可以包括设置成在中介层112的顶部表面上彼此邻近的两个接合结构。第二导线结构114的第二端121可以从中介层112延伸到板102,并且可以通过例如接合焊盘物理地且电学地与其耦合。第三导线结构118可以从第二管芯110的顶部表面延伸,并且可以耦合到板102。
图2描绘了根据实施例的用于制造封装结构的过程流程200,该封装结构诸如例如是图1的封装结构100。在步骤202处,可以将诸如硅晶片之类的晶片暴露于背面研磨过程。在步骤204-206处,可以安装晶片并且将晶片锯切成单独的管芯。在步骤208-210处,可以光学检查经分离的管芯,并且将倒装芯片接合到衬底上,诸如接合到板上。在步骤212-214处,可以对管芯进行焊料凸起回流以及进行助焊剂清洁。在步骤216-218处,可以光学检查管芯,并且可以将第二管芯引线接合并且将第二管芯附接到倒装芯片的顶部表面上。中介层可以被管芯连接并且也可以引线接合到倒装芯片的顶部表面上。在步骤220-224处,可以施加预引线接合等离子体,并且可以进行附加的引线接合和第三光学检查。在实施例中,步骤202-224可以包括行前(FOL)过程步骤。
在步骤226-228中,可以在向封装施加模制之前对封装结构实行模制等离子体清洁。在步骤230-232处,可以实行PMC(模制后固化)和激光打标。在步骤234-236处,可以实行预清洁以及焊球附接和焊料回流。在步骤238-240处,可以实行封装锯切和球扫描,并且在步骤242-246处,可以实行最终的视觉检查以及包装以及运输。
本文中描述的封装组装件/结构的各种实施例使得能够实现由于附接到中介层的每个区段的较短线长度所致的改善的线扫描性能。来自添加的中介层结构的附接到底部/倒装芯片管芯的线包括更大的边缘间隙,这使漏电的风险最小化。因此,例如,由于来自短接和泄漏的故障减少,组装产量和测试产量将得到改善。通过将封装结构的较小顶部管芯从较大底部管芯的中心区域移开,从顶部管芯到板的线长度减小。针对产品设计改善了组装和测试产量二者。
图3描绘了根据本文中的实施例的形成封装结构的方法300。在步骤302处,可以将第一管芯附接在板上。在实施例中,第一管芯可以包括倒装芯片管芯,并且板可以包括主板。在步骤304处,中介层可以附接在第一管芯的顶部表面上。在实施例中,中介层可以包括硅中介层,并且可以从第一管芯的中心部分偏移。
在步骤306处,第二管芯可以邻近第一管芯的顶部表面上的中介层而被附接。在实施例中,第一管芯可以包括的长度大于第二管芯的长度的约两倍。在实施例中,第二管芯可以从第一管芯的中心部分/点偏移。在步骤308处,可以附接第一导线结构,其从板延伸到中介层的顶部表面。在步骤310处,可以附接第二导线结构,其从中介层延伸到第二管芯。在实施例中,第一和第二导线结构可以物理地且电学地耦合到设置在中介层的顶部表面上的接合结构/接合焊盘上。在实施例中,第三导线可以附接到中介层,并且可以包括从板引线/焊盘到中介层接合焊盘的引线接合。
本文中的实施例的结构可以与能够在封装结构中设置的诸如管芯之类的微电子器件与封装结构可以耦合到的下一层级组件(例如,电路板)之间提供电连通的任何适合类型的结构相耦合。本文中的实施例的器件/封装结构及其组件可以包括电路元件,例如诸如用于在处理器管芯中使用的逻辑电路。金属喷镀层和绝缘材料可以包括在本文中的结构中,以及可以被包括在可以将金属层/互连与外部器件/层耦合的导电触点/凸起中。在一些实施例中,结构可以进一步包括多个管芯,其可以一个在另一个上堆叠,这取决于特定实施例。在实施例中,(一个或多个)管芯可以部分地或完全地嵌入在封装结构中。
本文中包括的封装结构的各种实施例可以被用于片上系统(SOC)产品,并且可以在诸如智能电话、笔记本计算机、平板设备、可穿戴设备和其他电子移动设备之类的设备中找到应用。在各种实现方式中,封装结构可以被包括在下述各项中:膝上型计算机、上网本计算机、笔记本计算机、超级本计算机、智能电话、平板设备、个人数字助理(PDA)、超级移动PC、移动电话、台式计算机、服务器、打印机、扫描仪、监视器、机顶盒、娱乐控制单元、数码相机、便携式音乐播放器或数字录像机,以及可穿戴设备。在另外的实现方式中,本文中的封装器件可以被包括在处理数据的任何其他电子设备中。
图4是可以结合本文中描述的封装结构的实施例来实现的计算设备400的示意图。根据本文中公开的实施例中的任意,例如,计算设备400的组件中的任何适合组件可以包括封装结构或者可以被包括在封装结构中,该封装结构诸如例如是图1a的封装结构100。在实施例中,计算设备400容纳了板402,其例如诸如是主板402。板402可以包括多个组件,其包括但不限于处理器404、管芯上存储器406以及至少一个通信芯片408。处理器404可以物理地且电学地耦合到板402。在一些实现方式中,至少一个通信芯片408可以物理地且电学地耦合到板402。在另外的实现方式中,通信芯片408是处理器404的部分。
取决于其应用,计算设备400可以包括其他组件,该其他组件可以或者可以不物理地且电学地耦合到板402,并且可以或可以不彼此通信地耦合。这些其他组件包括但不限于易失性存储器(例如,DRAM)409、非易失性存储器(例如,ROM)410、闪速存储器411、图形处理器单元(GPU)412、芯片组414、天线416、诸如触摸屏显示器之类的显示器418、触摸屏控制器420、电池422、音频编解码器(未示出)、视频编解码器(未示出)、全球定位系统(GPS)设备426、扬声器430、相机432、紧凑盘(CD)(未示出)、数字多功能盘(DVD)(未示出)等等)。可以将这些组件连接到系统板402、安装到系统板或与其他组件中的任何组件组合。
通信芯片408使得能够实现用于向和从计算设备400传输数据的无线和/或有线通信。术语“无线”及其派生词可以被用来描述电路、设备、系统、方法、技术、通信信道等,其可以通过使用穿过非固体介质的经调制的电磁辐射来传送数据。该术语并不暗示相关联的设备不包含任何线,尽管在一些实施例中它们可能不包含。通信芯片408可以实现多种无线或有线标准或协议中的任何标准或协议,包括但不限于,Wi-Fi(IEEE 802.11族)、WiMAX(IEEE802.16族)、IEEE 802.20、长程演进(LTE)、Ev-DO、HSPA+、HSDPA+、HSUPA+、EDGE、GSM、GPRS、CDMA、TDMA、DECT、蓝牙、其以太网衍生物,以及被指定为3G、4G、5G及以上的任何其他无线和有线协议。计算设备400可以包括多个通信芯片408。例如,第一通信芯片可以专用于较短程无线通信(诸如Wi-Fi和蓝牙),并且第二通信芯片可以专用于较长程无线通信,诸如GPS、EDGE、GPRS、CDMA、WiMAX、LTE、Ev-DO等等。术语“处理器”可以指代处理来自寄存器和/或存储器的电子数据以将该电子数据变换成可以存储在寄存器和/或存储器中的其他电子数据的任何设备或设备的部分。
在各种实现方式中,计算设备400可以是膝上型计算机、上网本计算机、笔记本计算机、超级本计算机、智能电话、平板设备、个人数字助理(PDA)、超级移动PC、可穿戴设备、移动电话、台式计算机、服务器、打印机、扫描仪、监视器、机顶盒、娱乐控制单元、数码相机、便携式音乐播放器或数字录像机。在另外的实现方式中,计算设备600可以是处理数据的任何其他电子设备。
本文中描述的封装结构的实施例可以被实现为下述各项的一部分:一个或多个存储器芯片、控制器、CPU(中央处理单元)、使用主板互连的微芯片或集成电路、专用集成电路(ASIC)和/或现场可编程门阵列(FPGA)。
示例
示例1是一种微电子封装结构,其包括:在衬底的第一侧上的第一管芯;在第一管芯的第二侧上的中介层;在第一管芯的第二侧上的第二管芯,其中第二管芯邻近中介层;第一导线结构,其中第一线的第一端设置在第二管芯上,并且第一导线结构的第二端设置在中介层上;以及第二导线结构,其中第二导线结构的第一端设置在中介层上并且邻近第一导线结构的第二端,其中第二导线结构的第二端设置在衬底上。
示例2包括示例1的微电子封装结构,其中第二导线结构的第一端和第一导线结构的第二端物理地耦合到设置在中介层的顶侧上的接合连接结构。
示例3包括示例1的微电子封装结构,其中中介层的覆盖区从第一管芯的中心点偏移一定距离。
示例4包括示例1的微电子封装结构,其中第一管芯包括倒装芯片管芯。
示例5包括示例1的微电子封装结构,其中在第二管芯处包括存储器管芯。
示例6包括示例1的微电子封装结构,其中第一存储器设备的覆盖区基本上不从微电子器件的覆盖区偏移。
示例7包括示例1的微电子封装结构,其中第一管芯的长度大于第二管芯的长度的约两倍。
示例8包括示例1的微电子封装结构,其中第二管芯的覆盖区从第一管芯的中心点偏移一定距离。
示例9是一种微电子封装结构,其包括:板;板上的第一管芯;第一管芯的顶部表面上的中介层;第一管芯的顶部表面上的邻近中介层的第二管芯,其中第二管芯的覆盖区从第一管芯的中心区域偏移。第一导线结构从第二管芯延伸并且附接到中介层的顶部表面,以及第二导线结构,其从中介层延伸并且附接到板。
示例10包括示例9的微电子封装结构,其中第一和第二导线结构在中介层上物理地且电学地彼此耦合。
示例11包括示例10的微电子封装结构,其中第一导线结构的第一端接合到接合焊盘,该接合焊盘设置在第二管芯的顶部表面的外围区域上。
示例12包括示例9的微电子封装结构,其中第三导线结构从第二管芯延伸到板。
示例13包括示例9的微电子封装结构,其中第三管芯设置在板上,其中第二中介层和第四管芯在第三管芯的顶部表面上彼此邻近地设置。
示例14包括示例13的微电子封装结构,其中第四导线结构从第四管芯延伸并且附接到第二中介层的顶部表面。
示例15包括示例14的微电子封装结构,其中第五导线结构从第二中介层延伸并且附接到板。
示例16包括示例9的微电子封装结构,其中中介层的覆盖区从第一管芯的中心区域偏移,其中该中介层。
示例17是一种形成微电子封装结构的方法,其包括:将第一管芯附接在板上;将中介层附接在第一管芯的顶部表面上;将第二管芯邻近中介层附接在第一管芯的顶部表面上;将从板延伸的第一导线结构附接到中介层的顶部表面;以及将从中介层的顶部表面延伸的第二导线结构附接到第二管芯的顶部表面。
示例18包括示例17的形成微电子封装结构的方法,其中第一导线结构和第二导线结构物理地且电学地接合到中介层的顶部表面上的接合焊盘。
示例19包括示例17的形成微电子封装结构的方法,其中第二管芯包括从第一管芯的中心部分偏移的覆盖区。
示例20包括示例17的形成微电子封装结构的方法,其中第一管芯包括倒装芯片管芯。
示例21包括示例20的形成微电子封装结构的方法,进一步包括其中第一管芯包括的长度大于第二管芯的长度的约两倍。
示例22包括示例17的形成微电子封装结构的方法,进一步包括将第三导线结构从第二管芯附接到板。
示例23包括示例17的形成微电子封装结构的方法,进一步包括将第四导线结构从第二管芯附接到板。
示例24包括示例17的形成微电子封装结构的方法,其中微电子封装包括混合封装结构。
示例25包括示例17的形成微电子封装结构的方法,其中微电子封装结构包括移动设备的一部分。
尽管前面的描述已经指定了可以在实施例的方法中使用的某些步骤和材料,但是本领域技术人员将领会到可以进行许多修改和替换。因此,意图将全部这样的修改、更改、替换和添加视为落入由所附权利要求限定的实施例的精神和范围内。此外,本文中提供的附图仅图示了与实施例的实践有关的示例性微电子器件和相关联的封装结构的若干部分。因此,实施例不限于本文中描述的结构。
Claims (25)
1.一种微电子封装结构,其包括:
在衬底的第一侧上的第一管芯;
在所述第一管芯的第二侧上的中介层;
在所述第一管芯的第二侧上的第二管芯,其中所述第二管芯邻近所述中介层;
第一导线结构,其中第一线的第一端设置在所述第二管芯上,并且所述第一导线结构的第二端设置在所述中介层上;以及
第二导线结构,其中所述第二导线结构的第一端设置在所述中介层上,并且邻近所述第一线的第二端,其中所述第二导线结构的第二端设置在所述衬底上。
2.根据权利要求1所述的微电子封装结构,其中所述第二导线结构的第一端和所述第一导线结构的第二端物理地耦合到设置在所述中介层的顶侧上的接合连接结构。
3.根据权利要求1所述的微电子封装结构,其中所述中介层的覆盖区从所述第一管芯的中心点偏移一定距离。
4.根据权利要求1所述的微电子封装结构,其中所述第一管芯包括倒装芯片管芯。
5.根据权利要求1所述的微电子封装结构,其中在所述第二管芯处包括存储器管芯。
6.根据权利要求1所述的微电子封装结构,其中所述第一管芯的长度大于所述第二管芯的长度的约两倍。
7.根据权利要求1所述的微电子封装结构,其中所述封装结构包括混合封装结构。
8.根据权利要求1所述的微电子封装结构,其中所述第二管芯的覆盖区从所述第一管芯的中心点偏移一定距离。
9.一种微电子封装结构,其包括:
板;
所述板上的第一管芯;
所述第一管芯的顶部表面上的中介层;
所述第一管芯的顶部表面上的邻近所述中介层的第二管芯,其中所述第二管芯的覆盖区从所述第一管芯的中心区域偏移;
第一导线结构,其从所述第二管芯延伸并且附接到所述中介层的顶部表面;以及
第二导线结构,其从所述中介层延伸并且附接到所述板。
10.根据权利要求9所述的微电子封装结构,其中所述第一和第二导线结构在所述中介层上物理地且电学地彼此耦合。
11.根据权利要求10所述的微电子封装结构,其中所述第一导线结构的第一端接合到接合焊盘,所述接合焊盘设置在所述第二管芯的顶部表面的外围区域上。
12.根据权利要求9所述的微电子封装结构,其中第三导线结构从所述第二管芯延伸到所述板。
13.根据权利要求9所述的微电子封装结构,其中第三管芯设置在所述板上,其中第二中介层和第四管芯在所述第三管芯的顶部表面上彼此邻近地设置。
14.根据权利要求13所述的微电子封装结构,其中第四导线结构从所述第四管芯延伸并且附接到所述第二中介层的顶部表面。
15.根据权利要求14所述的微电子封装结构,其中第五导线结构从所述第二中介层延伸并且附接到所述板。
16.根据权利要求9所述的微电子封装结构,其中所述中介层的覆盖区从所述第一管芯的中心区域偏移。
17.一种形成微电子封装结构的方法,其包括:
将第一管芯附接在板上;
将中介层附接在所述第一管芯的顶部表面上;
将第二管芯邻近所述中介层附接在所述第一管芯的顶部表面上;
将从所述板延伸的第一导线结构附接到所述中介层的顶部表面;以及
将从所述中介层的顶部表面延伸的第二导线结构附接到所述第二管芯的顶部表面。
18.根据权利要求17所述的方法,其中所述第一导线结构和所述第二导线结构物理地且电学地接合到所述中介层的顶部表面上的接合焊盘。
19.根据权利要求17所述的方法,其中所述第二管芯包括从所述第一管芯的中心部分偏移的覆盖区。
20.根据权利要求17所述的方法,其中所述第一管芯包括倒装芯片管芯。
21.根据权利要求17所述的方法,进一步包括:其中所述第一管芯包括的长度大于所述第二管芯的长度的约两倍。
22.根据权利要求17所述的方法,进一步包括:将第三导线结构从所述第二管芯附接到所述板。
23.根据权利要求17所述的方法,进一步包括:将第四导线结构从所述第二管芯附接到所述板。
24.根据权利要求17所述的方法,其中所述微电子封装包括混合封装结构。
25.根据权利要求17所述的方法,其中所述微电子封装结构包括移动设备的一部分。
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KR (1) | KR20190098132A (zh) |
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US20190371767A1 (en) | 2019-12-05 |
WO2018120060A1 (en) | 2018-07-05 |
KR20190098132A (ko) | 2019-08-21 |
TWI767957B (zh) | 2022-06-21 |
US11652087B2 (en) | 2023-05-16 |
TWI802446B (zh) | 2023-05-11 |
DE112016007556T5 (de) | 2019-09-12 |
US10971478B2 (en) | 2021-04-06 |
US20210183819A1 (en) | 2021-06-17 |
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TW201841319A (zh) | 2018-11-16 |
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