CN110060977A - 具有偏移通孔的集成电路封装 - Google Patents

具有偏移通孔的集成电路封装 Download PDF

Info

Publication number
CN110060977A
CN110060977A CN201811602711.0A CN201811602711A CN110060977A CN 110060977 A CN110060977 A CN 110060977A CN 201811602711 A CN201811602711 A CN 201811602711A CN 110060977 A CN110060977 A CN 110060977A
Authority
CN
China
Prior art keywords
integrated circuit
center
semiconductor chip
vias
longitudinal axis
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201811602711.0A
Other languages
English (en)
Chinese (zh)
Inventor
迈克尔·卓颖·苏
雷富
弗兰克·库彻梅斯特
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of CN110060977A publication Critical patent/CN110060977A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/147—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being multilayered
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/082—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being tapered via holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01231—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition
    • H10W72/01233—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • H10W72/01235—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01931—Manufacture or treatment of bond pads using blanket deposition
    • H10W72/01933—Manufacture or treatment of bond pads using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • H10W72/01935—Manufacture or treatment of bond pads using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H10W72/227—Multiple bumps having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/231—Shapes
    • H10W72/234—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/231—Shapes
    • H10W72/237—Multiple bump connectors having different shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/244—Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/247—Dispositions of multiple bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/247—Dispositions of multiple bumps
    • H10W72/248—Top-view layouts, e.g. mirror arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/926—Multiple bond pads having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/934—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/936—Multiple bond pads having different shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H10W72/9445—Top-view layouts, e.g. mirror arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
CN201811602711.0A 2012-06-25 2013-06-25 具有偏移通孔的集成电路封装 Pending CN110060977A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/532,126 2012-06-25
US13/532,126 US8624404B1 (en) 2012-06-25 2012-06-25 Integrated circuit package having offset vias
CN201380033561.5A CN104956479A (zh) 2012-06-25 2013-06-25 具有偏移通孔的集成电路封装

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CN201380033561.5A Division CN104956479A (zh) 2012-06-25 2013-06-25 具有偏移通孔的集成电路封装

Publications (1)

Publication Number Publication Date
CN110060977A true CN110060977A (zh) 2019-07-26

Family

ID=49773740

Family Applications (2)

Application Number Title Priority Date Filing Date
CN201811602711.0A Pending CN110060977A (zh) 2012-06-25 2013-06-25 具有偏移通孔的集成电路封装
CN201380033561.5A Pending CN104956479A (zh) 2012-06-25 2013-06-25 具有偏移通孔的集成电路封装

Family Applications After (1)

Application Number Title Priority Date Filing Date
CN201380033561.5A Pending CN104956479A (zh) 2012-06-25 2013-06-25 具有偏移通孔的集成电路封装

Country Status (7)

Country Link
US (1) US8624404B1 (https=)
EP (1) EP2865006A4 (https=)
JP (1) JP5964511B2 (https=)
KR (1) KR101569162B1 (https=)
CN (2) CN110060977A (https=)
IN (1) IN2014DN10923A (https=)
WO (1) WO2014004520A1 (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6180801B2 (ja) * 2013-06-07 2017-08-16 ルネサスエレクトロニクス株式会社 半導体装置
JP6221499B2 (ja) * 2013-08-19 2017-11-01 富士通株式会社 電子装置及び電子装置の製造方法
US10096639B2 (en) 2016-10-10 2018-10-09 Sensors Unlimited, Inc. Bump structures for interconnecting focal plane arrays
DE102017128568A1 (de) * 2017-12-01 2019-06-06 Infineon Technologies Ag Halbleiterchip mit einer vielzahl von externen kontakten, chip-anordnung und verfahren zum überprüfen einer ausrichtung einer position eines halbleiterchips
US10497657B1 (en) * 2018-06-13 2019-12-03 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
CN109004080B (zh) * 2018-08-10 2024-08-06 浙江熔城半导体有限公司 带有延伸双围堰及焊锡的芯片封装结构及其制作方法
KR102822948B1 (ko) * 2020-08-12 2025-06-20 삼성전자주식회사 배선 구조물 및 이를 포함하는 반도체 칩
US20230029763A1 (en) * 2021-07-30 2023-02-02 Cree, Inc. Interconnect metal openings through dielectric films
JP2026510132A (ja) 2022-10-31 2026-04-01 キョーセラ・エーブイエックス・コンポーネンツ・コーポレーション 多層コンデンサ
CN117059583B (zh) * 2023-10-12 2024-01-09 江苏芯德半导体科技有限公司 一种具有异质胶材的晶圆级扇出型封装结构及其封装方法
US12489073B1 (en) 2024-11-15 2025-12-02 Globalfoundries U.S. Inc. Acentric non-round electrical interconnections

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070228561A1 (en) * 2006-03-31 2007-10-04 Fujitsu Limited Semiconductor device and manufacturing method thereof
US20090174084A1 (en) * 2008-01-07 2009-07-09 International Business Machines Corporation Via offsetting to reduce stress under the first level interconnect (fli) in microelectronics packaging
US20090278263A1 (en) * 2008-05-09 2009-11-12 Texas Instruments Incorporated Reliability wcsp layouts
US20100207272A1 (en) * 2009-02-19 2010-08-19 Infineon Technologies Ag Semiconductor device including conductive element
US20120074532A1 (en) * 2010-09-27 2012-03-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with integrated metal pillars and manufacturing methods thereof

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63305530A (ja) * 1987-06-05 1988-12-13 Hitachi Ltd 半導体装置の製造方法
KR950001962A (ko) * 1993-06-30 1995-01-04 김광호 반도체 칩 범프
JP3217624B2 (ja) * 1994-11-12 2001-10-09 東芝マイクロエレクトロニクス株式会社 半導体装置
US6107109A (en) * 1997-12-18 2000-08-22 Micron Technology, Inc. Method for fabricating a semiconductor interconnect with laser machined electrical paths through substrate
US6075290A (en) * 1998-02-26 2000-06-13 National Semiconductor Corporation Surface mount die: wafer level chip-scale package and process for making the same
JPH11340355A (ja) * 1998-05-25 1999-12-10 Nec Corp 半導体装置
JP3351355B2 (ja) * 1998-09-29 2002-11-25 株式会社デンソー 電子部品の実装構造
KR100411679B1 (ko) * 1999-03-16 2003-12-18 세이코 엡슨 가부시키가이샤 반도체 장치 및 그 제조 방법, 회로 기판 및 전자기기
US6545192B2 (en) 1999-05-11 2003-04-08 Shell Oil Company Process for separating olefins from saturated hydrocarbons
US7034402B1 (en) * 2000-06-28 2006-04-25 Intel Corporation Device with segmented ball limiting metallurgy
US6703069B1 (en) * 2002-09-30 2004-03-09 Intel Corporation Under bump metallurgy for lead-tin bump over copper pad
JP4181510B2 (ja) * 2003-02-28 2008-11-19 日本特殊陶業株式会社 樹脂製配線基板
JP2005012065A (ja) * 2003-06-20 2005-01-13 Renesas Technology Corp 半導体装置およびその製造方法
TWI220308B (en) * 2003-08-07 2004-08-11 Advanced Semiconductor Eng Under bump metallurgic layer
US7197727B1 (en) 2003-11-04 2007-03-27 Advanced Micro Devices, Inc. Interconnect speed sensing circuitry
US7095116B1 (en) * 2003-12-01 2006-08-22 National Semiconductor Corporation Aluminum-free under bump metallization structure
US7259458B2 (en) 2004-08-18 2007-08-21 Advanced Micro Devices, Inc. Integrated circuit with increased heat transfer
JP4628731B2 (ja) * 2004-09-24 2011-02-09 株式会社フジクラ 電子部品及び電子装置
JP2006253611A (ja) * 2005-03-14 2006-09-21 Fuji Xerox Co Ltd 基板、誘導構造形成装置及び方法、及び位置決め方法
US20060227237A1 (en) 2005-03-31 2006-10-12 International Business Machines Corporation Video surveillance system and method with combined video and audio recognition
US7206703B1 (en) 2005-05-02 2007-04-17 Advanced Micro Devices, Inc. System and method for testing packaged devices using time domain reflectometry
TWI258176B (en) * 2005-05-12 2006-07-11 Siliconware Precision Industries Co Ltd Semiconductor device and fabrication method thereof
CN100382291C (zh) * 2005-05-17 2008-04-16 矽品精密工业股份有限公司 半导体装置及其制法
US20080124840A1 (en) 2006-07-31 2008-05-29 Su Michael Z Electrical Insulating Layer for Metallic Thermal Interface Material
US7616021B2 (en) 2007-01-18 2009-11-10 Advanced Micro Devices, Inc. Method and device for determining an operational lifetime of an integrated circuit device
US20080191318A1 (en) 2007-02-09 2008-08-14 Advanced Micro Devices, Inc. Semiconductor device and method of sawing semiconductor device
US7834449B2 (en) * 2007-04-30 2010-11-16 Broadcom Corporation Highly reliable low cost structure for wafer-level ball grid array packaging
US8344505B2 (en) 2007-08-29 2013-01-01 Ati Technologies Ulc Wafer level packaging of semiconductor chips
US7679200B2 (en) 2007-09-11 2010-03-16 Globalfoundries Inc. Semiconductor chip with crack stop
US7737563B2 (en) 2008-06-04 2010-06-15 Globalfoundries Inc. Semiconductor chip with reinforcement structure
US8212357B2 (en) * 2008-08-08 2012-07-03 International Business Machines Corporation Combination via and pad structure for improved solder bump electromigration characteristics
US7897433B2 (en) 2009-02-18 2011-03-01 Advanced Micro Devices, Inc. Semiconductor chip with reinforcement layer and method of making the same
US8293581B2 (en) 2009-02-18 2012-10-23 Globalfoundries Inc. Semiconductor chip with protective scribe structure
US8198133B2 (en) * 2009-07-13 2012-06-12 International Business Machines Corporation Structures and methods to improve lead-free C4 interconnect reliability
US7977160B2 (en) 2009-08-10 2011-07-12 GlobalFoundries, Inc. Semiconductor devices having stress relief layers and methods for fabricating the same
US8269348B2 (en) * 2010-02-22 2012-09-18 Texas Instruments Incorporated IC die including RDL capture pads with notch having bonding connectors or its UBM pad over the notch

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070228561A1 (en) * 2006-03-31 2007-10-04 Fujitsu Limited Semiconductor device and manufacturing method thereof
US20090174084A1 (en) * 2008-01-07 2009-07-09 International Business Machines Corporation Via offsetting to reduce stress under the first level interconnect (fli) in microelectronics packaging
US20090278263A1 (en) * 2008-05-09 2009-11-12 Texas Instruments Incorporated Reliability wcsp layouts
US20100207272A1 (en) * 2009-02-19 2010-08-19 Infineon Technologies Ag Semiconductor device including conductive element
US20120074532A1 (en) * 2010-09-27 2012-03-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with integrated metal pillars and manufacturing methods thereof

Also Published As

Publication number Publication date
EP2865006A4 (en) 2016-03-23
KR101569162B1 (ko) 2015-11-13
US20130341802A1 (en) 2013-12-26
US8624404B1 (en) 2014-01-07
EP2865006A1 (en) 2015-04-29
KR20150016641A (ko) 2015-02-12
CN104956479A (zh) 2015-09-30
WO2014004520A1 (en) 2014-01-03
IN2014DN10923A (https=) 2015-09-18
JP5964511B2 (ja) 2016-08-03
JP2015525968A (ja) 2015-09-07

Similar Documents

Publication Publication Date Title
JP5964511B2 (ja) オフセットビア（ｖｉａｓ）を有する集積回路パッケージ
US11257767B2 (en) Interconnect crack arrestor structure and methods
TWI640045B (zh) 半導體裝置及製造方法
CN102208384B (zh) 半导体结构及半导体装置的形成方法
TWI503940B (zh) 半導體元件及其形成方法
CN103035600B (zh) 具有保护结构的凸块
CN112447646A (zh) 半导体器件、封装件及其形成方法
TWI421994B (zh) 用於半導體基板的導體柱結構以及製造方法
CN113113381A (zh) 封装结构及其形成方法
US9059161B2 (en) Composite wiring board with electrical through connections
TW201701378A (zh) 元件封裝及其形成方法
CN102456664A (zh) 用于低应力芯片封装件的向心布局
US6541366B1 (en) Method for improving a solder bump adhesion bond to a UBM contact layer
TW202013636A (zh) 半導體裝置及其形成方法
US12148692B2 (en) Semiconductor package and manufacturing method thereof
JP2012519374A (ja) 底部で減少する直径を有する金属ピラーを含む半導体デバイスのメタライゼーションシステム
KR102481141B1 (ko) 반도체 패키징된 디바이스 내의 본딩 구조물 및 그 형성 방법
US7067350B1 (en) Method of manufacturing a semiconductor device using electrical contacts formed in an isolation layer
KR102784377B1 (ko) 반도체 디바이스 및 제조 방법
US20150179610A1 (en) Compliant dielectric layer for semiconductor device
CN111223821B (zh) 半导体器件封装件和半导体结构
US20250239514A1 (en) Semiconductor packages with reinforcement structures
CN115249683A (zh) 封装结构
CN119230493A (zh) 半导体封装件及其形成方法
CN120767208A (zh) 封装件及其形成方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20190726