CN110011521A - Driving circuit, driving chip and its driving method - Google Patents
Driving circuit, driving chip and its driving method Download PDFInfo
- Publication number
- CN110011521A CN110011521A CN201810007352.8A CN201810007352A CN110011521A CN 110011521 A CN110011521 A CN 110011521A CN 201810007352 A CN201810007352 A CN 201810007352A CN 110011521 A CN110011521 A CN 110011521A
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- Prior art keywords
- driving
- pulling drive
- drive pipe
- power switch
- tube
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
Abstract
The present invention provides a kind of driving circuit, driving chip and its driving method, comprising: the first pulling drive pipe, the second pulling drive pipe, delay control module, drop-down driving tube；Wherein, the grid of the first pulling drive Guan Yuyi driving signal, supply voltage and an external power switch tube is connected；First pulling drive pipe is connected in high level, and when low level turns off；Second pulling drive pipe is connected with delay control module, supply voltage and power switch tube；Second pulling drive pipe is connected in low level, and when high level turns off；Delay control module is connected with the grid of driving signal, an enable signal and power switch tube；Drop-down driving tube is connected with driving signal.The present invention can take into account the performance requirement saved device size cost and export more high driving voltage in the case where lesser device size；The needs of different can be met by having no need to change metallograph, further save operation cost and production cost.
Description
Technical field
The present invention relates to technical field of circuit design, more particularly to a kind of driving circuit, driving chip and its driving side
Method.
Background technique
In the application of existing power supply control chip, how the smaller device size realization chip of less device is used
Want the function of realizing and performance is to control the most important determinant of chip cost.Wherein driving circuit needs the function realized
It can include: the power tube provided outside big driving current driving, electromagnetic interference (EMI) control, logical-sequential control.These function
It can realize better, driving circuit needs to use a large amount of integrated device, so that driving circuit accounts for chip overall cost
In significant proportion, much close to 1/5 or even 1/2.Therefore how using the driving circuit of optimization chip cost will be directly determined
, in particular, being applied to the driving circuit in AC/DC power supply control chip, since the power supply of driving needs to be mentioned with high voltage power supply
For, thus drive upper tube can only use high voltage bearing high-voltage MOS pipe, such as 12V, 25V, 40V high-pressure process device.And it is high
The device size of pressure pipe is more much bigger than the device size of low-voltage tube, and the cost that drive part cost accounts for whole chip can be bigger.Cause
How this realizes that the needs of driving are particularly critical for saving cost in AC/DC chip with more optimized circuit.In addition,
In application environment of today, it is existing consider EMI application environment, and there is switching speed on EMI influence very little, need to the greatest extent
The demand of power tube is opened fastly.And chip designer reply be usually by change chip reticle and be divided into one or
Several chips of person undoubtedly increase a large amount of research and development and operation cost in this way.
The structure of existing driving circuit is varied, but in existing driving circuit, the stronger driving electricity of driving capability
The road problem lower generally there are the driving voltage of output, and generally there is drive in the higher driving circuit of driving voltage exported
The poor problem of kinetic force.I.e. existing driving circuit cannot take into account driving capability and export two kinds of performances of higher drive
It is required that in other words, existing driving circuit cannot take into account saving device size cost and the performance of output more high driving voltage and need
It asks.Meanwhile the environment that existing driving circuit can not take into account the application environment for needing EMI and not need EMI, do not need EMI
When environment, there are extra decay part, needs to be changed with the mode of metal this edition, and change the cost of metallograph
It is higher, operation cost is also increased, this has resulted in the waste of cost.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of driving circuits, driving chip
And its driving method, device size cost and output are saved for solving to take into account existing for driving circuit in the prior art
The problem of the problem of performance requirement of more high driving voltage and operation cost are higher, and cost is caused to waste.
In order to achieve the above objects and other related objects, the present invention provides a kind of driving circuit, and the driving circuit is at least
It include: the first pulling drive pipe, the second pulling drive pipe, delay control module, drop-down driving tube；Wherein,
The grid of the first pulling drive Guan Yuyi driving signal, supply voltage and an external power switch tube is connected
It connects, for providing driving current to be connected when high level in the driving signal for the power switch tube；First pull-up
Driving tube is connected in high level, and when low level turns off；
The grid of the second pulling drive pipe and the delay control module, the supply voltage and the power switch tube
Pole is connected；The second pulling drive pipe is connected in low level, and when high level turns off；
The delay control module is connected with the grid of the driving signal, an enable signal and the power switch tube
It connects；When the enable signal is high level, the delay control module the power switch tube grid voltage across rice
It is that the power switch tube mentions together with the first pulling drive pipe that the second pulling drive pipe conducting is controlled when strangling platform
For driving current；When the enable signal is low level, the delay control module control the second pulling drive pipe and
The first pulling drive pipe, which is simultaneously turned on, provides driving current with while for the power switch tube；
The drop-down driving tube is connected with the driving signal, for being described when the driving signal is low level
The grid of power switch tube provides pull-down current.
Preferably, the first pulling drive pipe is NMOS tube, the grid of the first pulling drive pipe and the driving
Signal is connected, and the drain electrode of the first pulling drive pipe is connected with the supply voltage, the first pulling drive pipe
Source electrode is connected with the grid of the power switch tube；The second pulling drive pipe is PMOS tube, second pulling drive
The grid of pipe is connected with the delay control module, and the source electrode of the second pulling drive pipe is connected with the supply voltage
It connects, the drain electrode of the second pulling drive pipe is connected with the grid of the power switch tube.
Preferably, the first pulling drive pipe be NPN type triode, the base stage of the first pulling drive pipe with it is described
Driving signal is connected, and the collector of the first pulling drive pipe is connected with the supply voltage, and first pull-up is driven
The emitter of dynamic pipe is connected with the grid of the power switch tube；The second pulling drive pipe is PNP type triode, described
The base stage of second pulling drive pipe is connected with the delay control module, the emitter of the second pulling drive pipe with it is described
Supply voltage is connected, and the collector of the second pulling drive pipe is connected with the grid of the power switch tube.
Preferably, the driving circuit further includes the first NOT gate, the input terminal of first NOT gate and the driving signal
It is connected；The drop-down driving tube is NMOS tube, and the grid of the drop-down driving tube is connected with the output end of first NOT gate
It connects, the drain electrode of the drop-down driving tube is connected with the grid of the power switch tube, the source electrode ground connection of the drop-down driving tube.
Preferably, the delay control module includes: delay cell, the second NOT gate, third NOT gate, the first nor gate,
Two nor gates and the 4th NOT gate；Wherein,
The input terminal of second NOT gate is connected with the enable signal；The input terminal of the third NOT gate and the drive
Dynamic signal is connected；The first input end of first nor gate is connected with the output end of second NOT gate, and described first
Second input terminal of nor gate is connected with the output end of the delay cell；The first input end of second nor gate and institute
The output end for stating the first nor gate is connected, the output end phase of the second input terminal of second nor gate and the third NOT gate
Connection；The input terminal of 4th NOT gate is connected with the output end of second nor gate, the output end of the 4th NOT gate
It is connected with the second pulling drive pipe；The input terminal of the delay cell is connected with the grid of the power switch tube.
Preferably, the driving circuit further includes an enable signal generative circuit, and the enable signal generative circuit includes
One current source and a fuse；Wherein, the current source is connected with the fuse, the input terminal of the current source and a power supply
It is connected, the output end of the current source is connected with the connecting node of the fuse with the delay control module；It is described
Fuse is grounded far from one end of the current source.
The present invention also provides a kind of driving chip, the driving chip includes: in chip body and such as above-mentioned either a program
The driving circuit；Wherein,
The driving circuit is located in the chip body；
The chip body is equipped with enable pin, driving pin, ground pin, supply voltage pin and grid pin；
The enable pin is connected with the delay control module；The driving pin and the delay control module, described first
Pulling drive pipe and the drop-down driving tube are connected；The ground pin and the drop-down driving tube and the power switch tube
Source electrode be connected；The supply voltage pin is connected with the first pulling drive pipe and the second pulling drive pipe；
The grid pin is connected with the grid of the power switch tube.
The present invention also provides a kind of driving chip, the driving chip includes: chip body and such as institute in an above-mentioned scheme
The driving circuit stated；Wherein,
The driving circuit is located in the chip body；
The chip body is equipped with driving pin, ground pin, supply voltage pin and grid pin；The driving tube
Foot is connected with the delay control module, the first pulling drive pipe and the drop-down driving tube；The ground pin with
The drop-down driving tube and the source electrode of the power switch tube are connected；The supply voltage pin and first pulling drive
Pipe and the second pulling drive pipe are connected；The grid pin is connected with the grid of the power switch tube.
In order to achieve the above objects and other related objects, the present invention provides a kind of driving as described in above-mentioned either a program
The driving method of circuit, when the driving signal is high level, effect of the first pulling drive pipe in the driving signal
Lower conducting, and driving current is provided to the power switch tube；If the enable signal is high level, when the power switch tube
Grid voltage across Miller platform when, the delay control module controls the second pulling drive pipe conducting, described second
Pulling drive pipe provides driving current together with the first pulling drive pipe for the power switch tube, to drive the power
Switching tube conducting；If the enable signal is low level, the delay control module controls the second pulling drive pipe and institute
It states the first pulling drive pipe and simultaneously turns on and provide driving current with while for the power switch tube, to drive the power switch
Pipe conducting；
When the driving signal is low level, the drop-down driving tube is opened, and the drop-down driving tube is that the power is opened
It closes pipe and pull-down current is provided, the power switch tube is turned off.
As described above, driving circuit of the invention, driving chip and its driving method, have the advantages that
Driving circuit of the invention can be taken into account in the case where lesser device size save device size cost and
Export the performance requirement of more high driving voltage；EMI environment can be met and not need EMI environment by having no need to change metallograph
Demand further saves operation cost and production cost；When needing to meet EMI environment demand, by the present invention in that can believe
Number preferable drive waveforms can be obtained, meet the needs of EMI.
Detailed description of the invention
Fig. 1 to Fig. 4 is shown as the structural schematic diagram of driving circuit of the invention.
It is downward in the control of the delay control module that Fig. 5 is shown as the second pulling drive pipe in driving circuit of the invention
The relationship that the electric current of the first pulling drive pipe, the second pulling drive pipe and power switch tube changes over time in the scheme be connected late
Figure.
Fig. 6 be shown as in driving circuit of the invention second pulling drive pipe under the control of the delay control module with
First pulling drive pipe in the scheme that the first pulling drive pipe simultaneously turns on, the second pulling drive pipe and power switch tube
The relational graph that electric current changes over time.
Fig. 7 to Figure 10 is shown as the structural schematic diagram of driving chip of the invention.
Component label instructions
1 driving circuit
11 delay control modules
111 delay control units
112 second NOT gates
113 third NOT gates
114 first nor gates
115 second nor gates
116 the 4th NOT gates
12 first NOT gates
13 enabled circuits
131 current mirrors
132 fuses
2 chips
21 chip bodies
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
Please refer to Fig. 1~Figure 10.It should be noted that diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, only shown in schema then with related component in the present invention rather than package count when according to actual implementation
Mesh, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its
Assembly layout kenel may also be increasingly complex.
Referring to Fig. 1, the present invention provides a kind of driving circuit 1, the driving circuit 1 is included at least: the first pulling drive
Pipe M1, the second pulling drive pipe M2, delay control module 11, drop-down driving tube M3；Wherein, the first pulling drive pipe M1 with
The grid of the external power switch tube M0 of one driving signal DRV, supply voltage VCC and one is connected, in the driving signal
DRV provides driving current to be connected when high level for the power switch tube M0；The first pulling drive pipe M1 is in high level
When be connected, when low level, turns off；The second pulling drive pipe M2 and the delay control module 11, the supply voltage VCC
And the grid of the power switch tube M0 is connected；The second pulling drive pipe M2 is connected in low level, and when high level closes
It is disconnected；The grid of the delay control module 11 and the driving signal DRV, an enable signal SEL and the power switch tube M0
It is connected；When the enable signal SEL is high level, grid of the delay control module 11 in the power switch tube M0
It is institute together with the first pulling drive pipe M1 that the second pulling drive pipe M2 conducting is controlled when voltage is across Miller platform
It states power switch tube M0 and driving current is provided；When the enable signal SEL is low level, the delay control module 11 is controlled
The second pulling drive pipe M2 and the first pulling drive pipe M1 is simultaneously turned on to be simultaneously that the power switch tube M0 is mentioned
For driving current；The drop-down driving tube M3 is connected with the driving signal DRV, for being low in the driving signal DRV
Grid when level for the power switch tube M0 provides pull-down current.
As an example, the external power switch tube M0 can be but be not limited only to NMOS tube, the power switch tube
The grid of M0 is connected with the first pulling drive pipe M1, the second pulling drive pipe M2 and the drop-down driving tube M3,
The source electrode of the power switch tube M0 is grounded.
In one example, as shown in Figure 1, the first pulling drive pipe M1 is NMOS tube, the first pulling drive pipe
The grid of M1 is connected with the driving signal DRV, drain electrode and the supply voltage VCC phase of the first pulling drive pipe M1
Connection, the source electrode of the first pulling drive pipe M1 are connected with the grid of the power switch tube M0；Second pull-up is driven
Dynamic pipe M2 is PMOS tube, and the grid of the second pulling drive pipe M2 is connected with the delay control module 11, described second
The source electrode of pulling drive pipe M2 is connected with the supply voltage VCC, the drain electrode of the second pulling drive pipe M2 and the function
The grid of rate switching tube M0 is connected.
In another example, as shown in Fig. 2, the first pulling drive pipe M1 is NPN type triode, first pull-up
The base stage of driving tube M1 is connected with the driving signal DRV, the collector and the power supply of the first pulling drive pipe M1
Voltage VCC is connected, and the emitter of the first pulling drive pipe M1 is connected with the grid of the power switch tube M0；It is described
Second pulling drive pipe M2 is PNP type triode, the base stage of the second pulling drive pipe M2 and the delay control module 11
It is connected, the emitter of the second pulling drive pipe M2 is connected with the supply voltage VCC, the second pulling drive pipe
The collector of M2 is connected with the grid of the power switch tube M0.
As an example, the driving circuit 1 further includes the first NOT gate 12, the input terminal of first NOT gate 12 and the drive
Dynamic signal DRV is connected；The drop-down driving tube M3 is NMOS tube, the grid and first NOT gate of the drop-down driving tube M3
12 output end is connected, and the drain electrode of the drop-down driving tube M3 is connected with the grid of the power switch tube M0, under described
Draw the source electrode ground connection of driving tube M0.When the driving signal DRV is high level, the driving signal DRV of high level passes through
Become low level, the drop-down driving tube M3 shutdown after first NOT gate 12；When the driving signal DRV is low level
When, the low level driving signal DRV becomes high level after first NOT gate 12, and the drop-down driving tube M3 is led
It is logical.
Preferably, as shown in figure 3, the delay control module 11 includes: delay cell 111, the second NOT gate 112, third
NOT gate 113, the first nor gate 114, the second nor gate 115 and the 4th NOT gate 116；Wherein, the input terminal of second NOT gate 112
It is connected with the enable signal SEL；The input terminal of the third NOT gate 113 is connected with the driving signal DRV；Described
The first input end of one nor gate 114 is connected with the output end of second NOT gate 112, and the of first nor gate 114
Two input terminals are connected with the output end of the delay cell 111；The first input end of second nor gate 115 and described the
The output end of one nor gate 114 is connected, and the second input terminal of second nor gate 115 is defeated with the third NOT gate 113
Outlet is connected；The input terminal of 4th NOT gate 116 is connected with the output end of second nor gate 115, and the described 4th
The output end of NOT gate 116 is connected with the second pulling drive pipe M2, specifically, the output end of the 4th NOT gate 116 with
The grid of the second pulling drive pipe M2 is connected；The input terminal of the delay cell 111 is with the power switch tube M0's
Grid is connected.
As an example, as shown in figure 4, the driving circuit 1 further includes an enable signal generative circuit 13, the enabled letter
Number generative circuit 13 includes a current source 131 and a fuse 132；Wherein, the current source 131 is gone here and there with the fuse 132
Connection, the input terminal of the current source 131 are connected with a power supply, the output end of the current source 131 and the fuse 132
Connecting node is connected with the delay control module 11, specifically, the output end of the current source 131 and the fuse
132 connecting node is connected with second NOT gate 112 in the delay control module 11；The fuse 132 is separate
One end of the current source 131 is grounded.The current source 131 can provide the electric current of μm grade, if the fuse 132 is not burnt
Disconnected, then the enable signal SEL that the connecting node of the output end of the current source 131 and the fuse 132 exports is low level
(the i.e. described enable signal generative circuit 13 generates low level enable signal SEL)；It is described if the fuse 132 is blown
The enable signal SEL that the connecting node of the output end of current source 131 and the fuse 132 exports is that high level is (i.e. described to make
Energy signal generating circuit 13 generates the enable signal SEL of high level).
It should be noted that Fig. 3 and Fig. 4, only using the first pulling drive pipe M1 as NMOS tube, second pull-up is driven
Dynamic pipe M2 is PMOS tube as an example, when the first pulling drive pipe M1 is NPN type triode, the second pulling drive pipe
When M2 is PNP type triode, other than the first pulling drive pipe M1 and the second pulling drive pipe M2, the driving
Other structures in circuit are identical as structure shown in Fig. 3 and Fig. 4.
The working principle of driving circuit 1 of the present invention are as follows: when the enable signal SEL is high level, described the
The driving of one pulling drive pipe M2 is controlled by the delay control module 11, at this point, if the driving signal DRV is high electricity
It is flat, the drop-down driving tube M3 shutdown, the first pulling drive pipe M1 conducting.When it is described driving transistor M0 voltage across
When Miller platform, the delay control module 11 controls the second pulling drive pipe M2 conducting, then is pulled up by described second
Driving tube M2 provides the driving electricity of grid for the power switch tube M0；When the enable signal SEL is low level, described the
Two pulling drive pipe M2 are not controlled by the delay of the delay control module 11, the second pulling drive pipe M2 and described first
(the i.e. described second pulling drive pipe M2 is connected with most fast speed), second pulling drive is connected in pulling drive pipe M1 together
Pipe M2 provides driving current together with the first pulling drive pipe M1 for the power switch tube M0, opens together the power
Pipe M0 is closed to be driven.Since the first pulling drive pipe M1 is NMOS tube or NPN type triode, first pulling drive
Pipe M1 electron mobility with higher.Therefore, under the premise of identical driving capability, the first pulling drive pipe M1 tool
There is lesser size.When the enable signal SEL is high level or is two kinds low level, the power switch tube M0 grid
The voltage of pole is determined by the saturation conduction pressure drop that supply voltage VCC subtracts the second pulling drive pipe M2, reaches as high as VCC-
100mV or so.
The driving circuit 1 of the invention compared to the prior art in conventional drive method, first pulling drive
Pipe M1 only needs smaller driving tube device size to provide for identical even greater driving current.As shown in figure 5, Fig. 5 is shown
For the second pulling drive pipe M2 in the driving circuit 1 of the invention it is described delay control module 11 control under turn on delay
Scheme in the relationship that changes over time of the electric current of the first pulling drive pipe M1, the second pulling drive pipe M2 and power switch tube M0
Figure.As shown in Figure 5, in the driving incipient stage, the first pulling drive pipe M1 provides driving current I1 as time driving tube, by
In the first pulling drive pipe M1 be NMOS tube or NPN triode, electron mobility with higher, it is only necessary to lesser device
Size is just capable of providing biggish driving current；Driving current I1 is that the external power switch tube M0 charges, in the function
The grid voltage (voltage of Gate point i.e. in Fig. 1 to Fig. 4) of rate switching tube M0 passes through the T2 moment of Miller platform, by the delay
Control module 11 controls the second pulling drive pipe M2 conducting and provides another driving current I2 for the power switch tube M0, is
The power switch tube M0 charges, and can thus provide good EMI effect；In Fig. 2, IGate is to flow through the function
The electric current of rate switching tube M0 grid, that is, flow through the electric current of Gate point.Since the second pulling drive pipe M2 of the invention is
PMOS tube or PNP triode, since the saturation voltage drop of its own is told somebody what one's real intentions are, the second pulling drive pipe M2 can provide higher
The driving voltage of power switch tube M0 can thus drive higher conduction threshold so that system obtains higher efficiency
The power switch tube M0.As main driving tube, main function is only available to the second pulling drive pipe M2 again
One higher output voltage, the work that the external power switch tube M0 is opened is via as described in secondary driving tube
First pulling drive pipe M1 is completed, and therefore, the second pulling drive pipe M1 does not need very strong driving capability, that is to say, that
The second pulling drive pipe M2 does not need very big device size；The first pulling drive pipe M1 and described second described in this way
The demand of trigger price size is reduced to minimum by pulling drive pipe M2, not will cause device excessively using and cause cost to waste.
Again the first pulling drive pipe M1 after the grid voltage of the external power switch tube M0 reaches highest driving voltage,
Since the source electrode of the first pulling drive pipe M1 can be higher than grid, so, the first pulling drive pipe M1 can be in cut-off
State, that is, automatic shutoff effect, driving output practical in this way are the situation of a weak pull-up to Gate point when being high, this
A benefit can be brought: when the driving signal DRV is low level, needing to turn off the external power switch tube M0
When, the drop-down driving tube M3 will soon drag down Gate point, the shutdown of the power switch tube M0 external in this way
Speed can be obviously improved.Because in the driving current that the first pulling drive pipe M1 and the second pulling drive pipe M2 is provided
After the power switch tube M0 is opened, it is left with the low pressure drop access for being supplied to supply voltage VCC to a Gate point
Effect.At this time if there is also a very strong pull-up, no matter to the turn-off speed of the power switch tube M0 or to electricity
The power supply disturbance of source voltage VCC to Gate point is all negative effect.Therefore it may only be necessary to as the application provides second pull-up
Driving tube M2, which equally gives a weaker pull-up to Gate point, perfectly to solve the problems, such as that strong pull-up exists.
In addition, of the invention another advantage is that in the case where have no need to change metallograph, can satisfy EMI environment and
The demand for not needing EMI environment, further saves operation cost and production cost.The function is driven in the driving circuit 1
When rate switching tube M0 does not influence system EMI, the second pulling drive pipe M2 can be with the first pulling drive pipe
M1, which simultaneously turns on, provides driving current for the external power switch tube M0, and Fig. 6 is shown as in driving circuit 1 of the invention
The side that two pulling drive pipe M2 are simultaneously turned under the control of the delay control module 11 with the first pulling drive pipe M1
The relational graph that the electric current of the first pulling drive pipe M1, the second pulling drive pipe M2 and power switch tube M0 change over time in case,
Wherein, I1 is the electric current for flowing through the first pulling drive pipe M1, and I2 is the electric current for flowing through the second pulling drive pipe M2,
IGate is the electric current for flowing through the power switch tube M0 grid.Due to the first pulling drive pipe M1 and second pull-up
Driving tube M2 is simultaneously turned on, and at the T1 moment, is comparatively fast reached in the voltage of Gate point and is opened threshold value, and continue at the T2 moment it is open-minded,
And at the T3 moment due to the automatic shutoff effect of the first pulling drive pipe M1, the voltage of Gate point can above-mentioned transformation, still, this
When a the external power switch tube M0 by driving open, therefore will not too big influence excellent on performance, whole opens
Logical speed is still faster than any one traditional structure.
Fig. 7 to Fig. 9 is please referred to, the present invention also provides a kind of driving chip 2, the driving chip 2 includes: chip body 21
And the driving circuit 1 as described in Fig. 1 to Fig. 3 in above scheme；Wherein, the driving circuit 1 is located at the chip body 21
Interior, the specific structure of the driving circuit 1 is not repeated herein；The chip body 21 is equipped with enable pin SEL, driving tube
Foot DRV, ground pin GND, supply voltage pin VCC and grid pin Gate；The enable pin SEL and the delay control
Module 11 is connected, for accessing an externally input enable signal；The driving pin DRV and the delay control module
11, the first pulling drive pipe M1 and the drop-down driving tube M2 are connected, to access an externally input driving signal；
The ground pin GND is connected with the source electrode of the drop-down driving tube M3 and power switch tube M0；The supply voltage
Pin VCC is connected with the first pulling drive pipe M1 and the second pulling drive pipe M2；The grid pin Gate with
The grid of the power switch tube M0 is connected.
Referring to Fig. 10, the present invention also provides a kind of driving chip 2, the driving chip 2 includes: chip body 21 and such as
Driving circuit 1 described in Fig. 4 in above scheme；Wherein, the driving circuit 1 is located in the chip body 21, the drive
The specific structure of dynamic circuit 1 is not repeated herein；The chip body 21 is equipped with driving pin DRV, ground pin GND, electricity
Source voltage pin VCC and grid pin Gate；The driving pin DRV and the delay control module 11, first pull-up
Driving tube M1 and the drop-down driving tube M3 are connected, the driving signal provided for accessing an outside；The ground pin GND
It is connected with the source electrode of the drop-down driving tube M3 and power switch tube M0；The supply voltage pin VCC and described the
One pulling drive pipe M1 and the second pulling drive pipe M2 are connected；The grid pin Gate and power switch tube M0
Grid be connected.
The present invention provides a kind of driving method of driving circuit as described in above-mentioned either a program, the driving circuit
Driving method includes at least:
When the driving signal DRV is high level, effect of the first pulling drive pipe M1 in the driving signal DRV
Lower conducting, and driving current is provided to the power switch tube M0；If the enable signal SEL is high level, when the power
When the grid voltage of switching tube M0 is across Miller platform, the delay control module 11 controls the second pulling drive pipe M2 and leads
Logical, the second pulling drive pipe M2 provides driving electricity together with the first pulling drive pipe M1 for the power switch tube M0
Stream, to drive the power switch tube M0 to be connected；If the enable signal SEL is low level, the delay control module 11 is controlled
The second pulling drive pipe M2 and the first pulling drive pipe M1 is made to simultaneously turn on simultaneously for the power switch tube M0
Driving current is provided, to drive the power switch tube M0 to be connected；When the driving signal DRV is low level, the drop-down is driven
Dynamic pipe M3 is opened, and the drop-down driving tube M3 provides pull-down current for the power switch tube M0, by the power switch tube
M0 shutdown.
In conclusion the present invention provides a kind of driving circuit, driving chip and its driving method, the driving circuit is at least
It include: the first pulling drive pipe, the second pulling drive pipe, delay control module, drop-down driving tube；Wherein, first pull-up
Driving tube is connected with the grid of a driving signal, supply voltage and an external power switch tube, in the driving signal
Driving current is provided to be connected when high level for the power switch tube；The first pulling drive pipe is connected in high level,
It is turned off when low level；The second pulling drive pipe and the delay control module, the supply voltage and the power switch
Pipe is connected；The second pulling drive pipe is connected in low level, and when high level turns off；The delay control module with it is described
The grid of driving signal, an enable signal and the power switch tube is connected；It is described when the enable signal is high level
Delay control module controls the second pulling drive pipe when the grid voltage of the power switch tube is across Miller platform and leads
It is logical to provide driving current together with the first pulling drive pipe for the power switch tube；It is low level in the enable signal
When, the delay control module controls the second pulling drive pipe and simultaneously turns on the first pulling drive pipe to be simultaneously
The power switch tube provides driving current；The drop-down driving tube is connected with the driving signal, in the driving
Signal is provides pull-down current when low level for the grid of the power switch tube.Driving circuit of the invention is in lesser device
The performance requirement saved device size cost and export more high driving voltage can be taken into account in the case where size；It haves no need to change
The needs of metallograph can meet EMI environment and not need EMI environment, further saves operation cost and production cost；
When needing to meet EMI environment demand, by the present invention in that energy signal can obtain preferable drive waveforms, meet the need of EMI
It asks.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (9)
1. a kind of driving circuit, which is characterized in that the driving circuit includes at least: the first pulling drive pipe, the second pull-up are driven
Dynamic pipe, delay control module, drop-down driving tube；Wherein,
The grid of the first pulling drive Guan Yuyi driving signal, supply voltage and an external power switch tube is connected, and uses
In when the driving signal is high level conducting provide driving current for the power switch tube；The first pulling drive pipe
It is connected in high level, when low level turns off；
The grid phase of the second pulling drive pipe and the delay control module, the supply voltage and the power switch tube
Connection；The second pulling drive pipe is connected in low level, and when high level turns off；
The delay control module is connected with the grid of the driving signal, an enable signal and the power switch tube；?
When the enable signal is high level, the delay control module the power switch tube grid voltage across Miller platform
When control the second pulling drive pipe conducting and provide driving together with the first pulling drive pipe for the power switch tube
Electric current；When the enable signal is low level, the delay control module controls the second pulling drive pipe and described the
One pulling drive pipe, which is simultaneously turned on, provides driving current with while for the power switch tube；
The drop-down driving tube is connected with the driving signal, for being the power when the driving signal is low level
The grid of switching tube provides pull-down current.
2. driving circuit according to claim 1, it is characterised in that: the first pulling drive pipe is NMOS tube, described
The grid of first pulling drive pipe is connected with the driving signal, the drain electrode of the first pulling drive pipe and power supply electricity
Pressure is connected, and the source electrode of the first pulling drive pipe is connected with the grid of the power switch tube；Second pull-up is driven
Dynamic pipe is PMOS tube, and the grid of the second pulling drive pipe is connected with the delay control module, and second pull-up is driven
The source electrode of dynamic pipe is connected with the supply voltage, the drain electrode of the second pulling drive pipe and the grid of the power switch tube
It is connected.
3. driving circuit according to claim 1, it is characterised in that: the first pulling drive pipe is NPN type triode,
The base stage of the first pulling drive pipe is connected with the driving signal, the collector of the first pulling drive pipe with it is described
Supply voltage is connected, and the emitter of the first pulling drive pipe is connected with the grid of the power switch tube；Described
Two pulling drive pipes are PNP type triode, and the base stage of the second pulling drive pipe is connected with the delay control module, institute
The emitter for stating the second pulling drive pipe is connected with the supply voltage, the collector of the second pulling drive pipe with it is described
The grid of power switch tube is connected.
4. driving circuit according to claim 1, it is characterised in that: the driving circuit further includes the first NOT gate, described
The input terminal of first NOT gate is connected with the driving signal；The drop-down driving tube is NMOS tube, the drop-down driving tube
Grid is connected with the output end of first NOT gate, the drain electrode and the grid phase of the power switch tube of the drop-down driving tube
Connection, the source electrode ground connection of the drop-down driving tube.
5. driving circuit according to claim 1, it is characterised in that: the delay control module includes: delay cell,
Two NOT gates, third NOT gate, the first nor gate, the second nor gate and the 4th NOT gate；Wherein,
The input terminal of second NOT gate is connected with the enable signal；The input terminal of the third NOT gate and the driving are believed
Number it is connected；The first input end of first nor gate is connected with the output end of second NOT gate, and described first or non-
Second input terminal of door is connected with the output end of the delay cell；The first input end of second nor gate and described the
The output end of one nor gate is connected, and the second input terminal of second nor gate is connected with the output end of the third NOT gate
It connects；The input terminal of 4th NOT gate is connected with the output end of second nor gate, the output end of the 4th NOT gate with
The second pulling drive pipe is connected；The input terminal of the delay cell is connected with the grid of the power switch tube.
6. driving circuit according to any one of claim 1 to 5, it is characterised in that: the driving circuit further includes one
Enable signal generative circuit, the enable signal generative circuit include a current source and a fuse；Wherein, the current source with
The fuse series connection, the input terminal of the current source are connected with a power supply, the output end of the current source and the insurance
The connecting node of silk is connected with the delay control module；The fuse is grounded far from one end of the current source.
7. a kind of driving chip, it is characterised in that: the driving chip includes: any in chip body and such as claim 1 to 5
Driving circuit described in；Wherein,
The driving circuit is located in the chip body；
The chip body is equipped with enable pin, driving pin, ground pin, supply voltage pin and grid pin；It is described
Enable pin is connected with the delay control module；The driving pin and the delay control module, first pull-up
Driving tube and the drop-down driving tube are connected；The source of the ground pin and the drop-down driving tube and the power switch tube
Pole is connected；The supply voltage pin is connected with the first pulling drive pipe and the second pulling drive pipe；It is described
Grid pin is connected with the grid of the power switch tube.
8. a kind of driving chip, it is characterised in that: the driving chip includes: chip body and drive as claimed in claim 6
Dynamic circuit；Wherein,
The driving circuit is located in the chip body；
The chip body is equipped with driving pin, ground pin, supply voltage pin and grid pin；The driving pin with
The delay control module, the first pulling drive pipe and the drop-down driving tube are connected；The ground pin with it is described
Drop-down driving tube and the source electrode of the power switch tube are connected；The supply voltage pin and the first pulling drive pipe and
The second pulling drive pipe is connected；The grid pin is connected with the grid of the power switch tube.
9. a kind of driving method of such as driving circuit described in any one of claims 1 to 6, which is characterized in that the driving
The driving method of circuit includes at least:
When the driving signal is high level, the first pulling drive pipe is connected under the action of the driving signal, and to
The power switch tube provides driving current；If the enable signal is high level, when the grid voltage of the power switch tube
When across Miller platform, the delay control module controls the second pulling drive pipe conducting, the second pulling drive pipe
Driving current is provided for the power switch tube together with the first pulling drive pipe, to drive the power switch tube to lead
It is logical；If the enable signal is low level, the delay control module is controlled on the second pulling drive pipe and described first
It draws driving tube to simultaneously turn on and provides driving current with while for the power switch tube, to drive the power switch tube to be connected；
When the driving signal is low level, the drop-down driving tube is opened, and the drop-down driving tube is the power switch tube
Pull-down current is provided, the power switch tube is turned off.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810007352.8A CN110011521B (en) | 2018-01-04 | 2018-01-04 | Drive circuit, drive chip and drive method thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810007352.8A CN110011521B (en) | 2018-01-04 | 2018-01-04 | Drive circuit, drive chip and drive method thereof |
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| CN110011521B CN110011521B (en) | 2020-11-10 |
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| CN111146931A (en) * | 2019-12-23 | 2020-05-12 | 广东美的白色家电技术创新中心有限公司 | Drive circuit of power device and electronic equipment |
| CN113114195A (en) * | 2021-04-23 | 2021-07-13 | 广东省大湾区集成电路与系统应用研究院 | Power-off closing circuit, power-off closing chip and switch chip |
| CN114070017A (en) * | 2021-07-26 | 2022-02-18 | 杰华特微电子股份有限公司 | Drive circuit, switching power supply and chip layout structure thereof |
| CN114189151A (en) * | 2020-09-15 | 2022-03-15 | 圣邦微电子（北京）股份有限公司 | DC-DC boost converter |
| CN116191843A (en) * | 2023-04-26 | 2023-05-30 | 广东华芯微特集成电路有限公司 | Gate driving circuit architecture, control method and BLDC motor driving circuit |
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