CN103715870B - The voltage regulator and gate driver resonator - Google Patents

The voltage regulator and gate driver resonator Download PDF

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CN103715870B
CN103715870B CN201310733241.2A CN201310733241A CN103715870B CN 103715870 B CN103715870 B CN 103715870B CN 201310733241 A CN201310733241 A CN 201310733241A CN 103715870 B CN103715870 B CN 103715870B
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switch
contact
connected
transistor
power transistor
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CN201310733241.2A
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CN103715870A (en
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唐样洋
张臣雄
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华为技术有限公司
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    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making or -braking
    • H03K17/04Modifications for accelerating switching
    • H03K17/041Modifications for accelerating switching without feedback from the output circuit to the control circuit
    • H03K17/04106Modifications for accelerating switching without feedback from the output circuit to the control circuit in field-effect transistor switches
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making or -braking
    • H03K17/04Modifications for accelerating switching
    • H03K17/041Modifications for accelerating switching without feedback from the output circuit to the control circuit
    • H03K17/0412Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit
    • H03K17/04123Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit in field-effect transistor switches
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making or -braking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used using semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used using semiconductor devices using field-effect transistors
    • H03K17/6871Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used using semiconductor devices using field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H03K17/6872Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used using semiconductor devices using field-effect transistors the output circuit comprising more than one controlled field-effect transistor using complementary field-effect transistors
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making or -braking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used
    • H03K17/74Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used using diodes
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M2001/0083Converters characterized by their input or output configuration
    • H02M2001/009Converters characterized by their input or output configuration having more than one output with independent control
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making or -braking
    • H03K17/12Modifications for increasing the maximum permissible switched current
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K2217/00Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/009Resonant driver circuits
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion
    • Y02B70/14Reduction of losses in power supplies
    • Y02B70/1416Converters benefiting from a resonance, e.g. resonant or quasi-resonant converters
    • Y02B70/1425Converters benefiting from a resonance, e.g. resonant or quasi-resonant converters in non-galvanically isolated DC/DC converters

Abstract

本发明涉及一种电压调整器及其谐振栅驱动器,其中,谐振栅驱动器用于驱动第一功率晶体管和第二功率晶体管,包括第一控制通路、第二控制通路以及电感,其中:所述第一控制通路的第一端与所述第二控制通路的第一端连接;所述第一控制通路的第二端经由所述电感与所述第二控制通路的第二端连接;所述第一控制通路的第三端与所述第一功率晶体管连接,所述第二控制通路的第三端与所述第二功率晶体管连接。 The present invention relates to a voltage regulator and gate driver resonator, wherein the resonant gate driver for driving the first power transistor and the second power transistors, comprising a first control channel, control channel, and a second inductor, wherein: said first a first control path of the first end and the second end of the control passage is connected; the first end of the second control passage connected to the second end of the second control path through the inductor; the first a third control path end connected to said first power transistor, said second control passage connected to the second terminal of the third power transistor. 根据本发明实施例的谐振栅驱动器,能够缩减驱动周期,提高响应速度。 The resonant gate drive of the embodiment of the present invention, it is possible to reduce the driving cycle, improve the response speed.

Description

电压调整器及其谐振栅驱动器 The voltage regulator and gate driver resonator

技术领域 FIELD

[0001]本发明涉及半导体集成电路领域,尤其涉及一种电压调整器及其谐振栅驱动器。 [0001] The present invention relates to a semiconductor integrated circuit, and more particularly, to a voltage regulator and gate driver resonator.

背景技术 Background technique

[0002]动态电压频率调整(Dynamic voltage and frequency scaling,DVFS)是一种有效的降低功耗的技术。 [0002] The dynamic voltage and frequency adjustment (Dynamic voltage and frequency scaling, DVFS) is an effective technique to reduce power consumption. 并且,随着芯片设计面积密度的上升,响应速度、片上集成性以及能源效率成为相应的电压调整器的三个重要特性。 Further, with the increase of the density of the chip layout area, the response speed, on-chip integration and energy efficiency to the corresponding three important characteristics of the voltage regulator.

[0003]在电压调整器的基本构造中,尤其是在片上高开关频率的系统中,大部分损耗来自于功率晶体管的寄生电容的损耗以及本体二极管的传导损耗。 [0003] In the basic configuration of the voltage regulator, in particular on-chip high-frequency switching system, most of the losses from conduction losses and parasitic losses of the body diode capacitance of the power transistor. 目前,已提出有效减小以上两种损耗的谐振栅驱动器(Resonant gate driver)的结构,即主要利用两个PMOS晶体管及其附属的二极管、两个NMOS晶体管及其附属的二极管和一个电感,来对两个功率晶体管进行开和关的控制。 At present, the structure has been proposed to reduce the effective loss of two or more resonant gate driver (Resonant gate driver), i.e., the main use of the two PMOS transistors of the diode and its subsidiary, two NMOS transistors and a diode and its subsidiary inductor to control of two power transistors on and off. 具体地,对功率晶体管的打开操作可以包括:对功率晶体管的寄生电容充电过程和电感放电过程。 Specifically, the opening operation of the power transistor may include: the process of charging the parasitic capacitance and inductance of the power transistor during discharge. 对功率晶体管的关闭操作可以包括:对功率晶体管的寄生电容放电过程和电感放电过程。 The closing operation of the power transistor may include: discharge parasitic capacitance and inductance of the power transistor during the discharge process.

[0004] 然而,如上所述,响应速度以及片上集成性也是电压调整器的重要特性。 [0004] However, as described above, and the response speed is also important feature integration on-chip voltage regulator. 并且,一般来说,片上集成性越高,将要求响应速度越快。 And, in general, the higher the integrated on-chip, the faster the required response. 因此,还需要提高电压调整器的驱动器的响应速度。 Thus, the need to improve the response speed of the drive voltage regulator.

发明内容 SUMMARY

[0005]为了解决上述技术问题,根据本发明的一实施例,提供了一种谐振栅驱动器,用于驱动第一功率晶体管和第二功率晶体管,包括第一控制通路、第二控制通路以及电感,其中:所述第一控制通路的第一端与所述第二控制通路的第一端连接;所述第一控制通路的第二端经由所述电感与所述第二控制通路的第二端连接;所述第一控制通路的第三端与所述第一功率晶体管连接,所述第二控制通路的第三端与所述第二功率晶体管连接。 [0005] To solve the above problems, according to an embodiment of the present invention, there is provided a resonant gate driver for driving the first power transistor and the second power transistors, comprising a first control channel, control channel, and a second inductor , wherein: said first end of the first control path is connected to the second end of the first control path; a second control channel of the first end and the second control path via the second inductor terminal; a third control terminal of the first passage connected to the first power transistor, said second control passage connected to the second terminal of the third power transistor.

[0006]对于上述谐振栅驱动器,在一种可能的实现方式中,所述第一控制通路包括第一开关、第三开关以及第五开关,所述第二控制通路包括第二开关、第四开关以及第六开关,其中:所述第一开关的第一触点与所述第二开关的第一触点连接,所述第一开关的第二触点与所述第五开关的第二触点以及所述第三开关的第一触点连接;所述第二开关的第二触点与所述第六开关的第二触点以及所述第四开关的第一触点连接;所述第三开关的第二触点与所述第一功率晶体管连接;所述第四开关的第二触点与所述第二功率晶体管连接;所述第五开关的第一触点以及所述第六开关的第一触点接地;所述电感的一端与所述第一开关的第二触点连接,所述电感的另一端与所述第二开关的第二触点连接。 [0006] For the above resonator gate driver, in one possible implementation, the first control path comprises a first switch, the third switch and the fifth switch, the second path comprises a second control switch, a fourth the second switch is connected to a first contact of the first contact of the second to the first switch, the second contact of the first switch and the fifth switch: switch and a sixth switch, wherein and a first contact connected to the third switch contact; a second switch the second contact of the second contact and the first contact of the sixth switch is connected to the fourth switch; the said third contact and said second switching power transistor connected to the first; the second contact of the fourth switch is connected to the second power transistor; the first contact and the fifth switch a first ground contact of the sixth switch; end of the inductor and the second contact of the first switch is connected to other end of the inductor and the second contact of the second switch is connected.

[0007] 对于上述谐振栅驱动器,在一种可能的实现方式中,还包括电源,所述电源与所述第一开关的第一触点以及所述第二开关的第一触点连接。 [0007] For the above resonator gate driver, in one possible implementation, further comprising a power source and first switch, the first contact and the first contact of the second switch is connected.

[0008]对于上述谐振栅驱动器,在一种可能的实现方式中,所述第一开关、所述第二开关、所述第三开关、所述第四开关、所述第五开关以及所述第六开关均为半导体元件。 [0008] For the above resonator gate driver, in one possible implementation, the first switch, the second switch, the third switch, the fourth switch, the fifth switch and the sixth switches are semiconductor elements.

[0009]对于上述谐振栅驱动器,在一种可能的实现方式中,所述半导体元件为场效应晶体管,所述第一开关、所述第二开关、所述第三开关、所述第四开关、所述第五开关以及所述第六开关的第一触点均为所述场效应晶体管的源极,所述所述第一开关、所述第二开关、所述第三开关、所述第四开关、所述第五开关以及所述第六开关的第二触点均为所述场效应晶体管的漏极,所述所述第一开关、所述第二开关、所述第三开关、所述第四开关、所述第五开关以及所述第六开关的控制端均为所述场效应晶体管的栅极。 [0009] For the above resonator gate driver, in one possible implementation, the semiconductor element is a field effect transistor, the first switch, the second switch, the third switch, the fourth switch , the fifth switch and the sixth switch of the first contact are the source of the field effect transistor, the first switch, the second switch, the third switch, the the second contact of the fourth switch, the fifth switch and the sixth switch are the drain of the field effect transistor, the first switch, the second switch, the third switch the control terminal of the fourth switch, the fifth switch and the sixth switch are the gate of the field effect transistor.

[0010]对于上述谐振栅驱动器,在一种可能的实现方式中,所述第一开关、所述第二开关、所述第三开关、所述第四开关为PMOS晶体管,所述第五开关、所述第六开关为匪OS晶体管。 [0010] For the above resonator gate driver, in one possible implementation, the first switch, the second switch, the third switch, the fourth switch is a PMOS transistor, the fifth switch , the sixth switch is a transistor bandit OS.

[0011]对于上述谐振栅驱动器,在一种可能的实现方式中,还包括第一本体二极管、第二本体二极管、第三本体二极管、第四本体二极管、第五本体二极管以及第六本体二极管,其中:所述第一本体二极管的正极与所述第一开关的第二触点连接,所述第一本体二极管的负极与所述第一开关的第一触点连接;所述第二本体二极管的正极与所述第二开关的第二触点连接,所述第二本体二极管的负极与所述第二开关的第一触点连接;所述第三本体二极管的正极与所述第三开关的第二触点连接,所述第三本体二极管的负极与所述第三开关的第一触点连接;所述第四本体二极管的正极与所述第四开关的第二触点连接,所述第四本体二极管的负极与所述第四开关的第一触点连接;所述第五本体二极管的正极与所述第五开关的第一触点连接,所述第五本体二极管的负极与 [0011] For the above resonator gate driver, in one possible implementation, the body further comprises a first diode, a second diode body, the third body diode, the body diode of the fourth, fifth and a sixth diode body the body diode, wherein: the positive electrode of the first body diode and the second contact of the first switch is connected to the negative electrode and the first body diode of the first switch is connected to the first contact; a second body diode the positive electrode and the second contact of the second switch is connected to the negative electrode of the second body diode of the first contact of the second switch is connected; anode of the third body diode of the third switch a second contact connected to a first contact is connected to the cathode of the third body diode of the third switch; and a second contact connected to the positive electrode of the fourth body diode of the fourth switch, the said fourth diode anode body with a first contact connected to the fourth switch; anode of the fifth diode body and a first contact of the fifth switch is connected to the cathode of the fifth diode and the body 述第五开关的第二触点连接;所述第六本体二极管的正极与所述第六开关的第一触点连接,所述第六本体二极管的负极与所述第六开关的第二触点连接。 Said second contact connected to the fifth switch; anode of the sixth diode and a first body contact is connected to the sixth switch, a second negative electrode of the sixth contact with the body diode of the sixth switch point connection.

[0012]为了解决上述技术问题,根据本发明的另一实施例,提供了一种电压调整器,包括:第一功率晶体管,所述第一功率晶体管的第一触点与电源的一端连接;第二功率晶体管,所述第二功率晶体管的第一触点与所述电源的另一端连接,所述第二功率晶体管的第二触点与所述第一功率晶体管的第二触点连接;以及采用本发明实施例中任意一种结构的谐振栅驱动器,与所述第一功率晶体管的控制端以及所述第二功率晶体管的控制端连接,用于驱动所述第一功率晶体管和所述第二功率晶体管。 [0012] To solve the above problems, according to another embodiment of the present invention, there is provided a voltage regulator, comprising: a first power transistor, the first power transistor a first contact connected to one end of the power supply; second power transistor, a first contact of the second power transistor is connected to the other end of the power supply, a second contact of the second transistor and a second power contact is connected to said first power transistor; and a resonator using the embodiment of the present invention, the gate driver of any embodiment of a structure connected to a control terminal of the first power transistor and the control terminal of the second power transistor for driving said first power transistor and the second power transistor.

[0013]对于上述电压调整器,在一种可能的实现方式中,还包括:反馈电感、反馈电容、控制电路、以及调制电路,其中:所述反馈电感的一端与所述第一功率晶体管的第二触点连接,所述反馈电感的另一端与所述反馈电容的一端连接,所述反馈电容的另一端与所述第一功率晶体管的第一触点连接;所述控制电路连接在所述反馈电感的两端,能够根据所述反馈电感两端的电压产生控制信号;所述调制电路与所述控制电路连接,能够根据所述控制信号产生调制信号;所述谐振栅驱动器与所述调制电路连接,能够根据所述调制信号驱动所述第一功率晶体管与所述第二功率晶体管。 [0013] For the above-described voltage regulator, in one possible implementation, further comprising: a feedback inductor, a feedback capacitance, the control circuit, and a modulation circuit, wherein: one end of the feedback inductor and the first power transistor a second contact connected to the other end of the feedback inductor is connected to one end of the feedback capacitor is connected to a first contact connected to the other end of the feedback capacitor and the first power transistor; the control circuit is connected to the said feedback inductor ends, capable of generating a control signal based on a voltage across the feedback inductor; of the modulation circuit and the control circuit, the control signal can be generated in accordance with a modulation signal; the resonant gate driver and the modulation circuit is connected, it is possible according to said modulation signal for driving the first power transistor and the second power transistor.

[0014]对于上述电压调整器,在一种可能的实现方式中,所述第一功率晶体管为匪OS晶体管,所述第二功率晶体管为PMOS晶体管。 [0014] For the above-described voltage regulator, in one possible implementation, the first power transistor bandit OS transistor, said second power transistor is a PMOS transistor.

[0015]对于上述电压调整器,在一种可能的实现方式中,所述第一功率晶体管的第一触点为所述NMOS晶体管的源极,所述第一功率晶体管的第二触点为所述NMOS晶体管的漏极,所述第一功率晶体管的控制端为所述NMOS晶体管的栅极,所述第二功率晶体管的第一触点为所述PMOS晶体管的源极,所述第二功率晶体管的第二触点为所述PMOS晶体管的漏极,所述第二功率晶体管的控制端为所述PMOS晶体管的栅极。 [0015] For the above-described voltage regulator, in one possible implementation, the first contact of the first power transistor as a source of the NMOS transistor, the second contact of the first power transistor the drain of the NMOS transistor, the first control terminal of the power transistor to the gate of the NMOS transistor, a first contact of the second power transistor to the source of the PMOS transistor, the second the second contact power transistor a drain of the PMOS transistor, a control terminal of the second power transistor a gate of the PMOS transistor.

[0016]本发明实施例的谐振栅驱动器将现有技术中两次电感的放电时间省去,从而与现有技术相比,使得驱动周期缩减了约25%,提高了响应速度。 [0016] The resonant gate drive of the present invention, the embodiment of the prior art two inductive discharge time is omitted, as compared with the prior art, so that the driving period reduced to about 25%, to improve the response speed.

[0017]根据下面参考附图对示例性实施例的详细说明,本发明的其它特征及方面将变得清楚。 [0017] detailed description of exemplary embodiments below with reference to the accompanying drawings, other features and aspects of the invention will become apparent.

附图说明 BRIEF DESCRIPTION

[0018]包含在说明书中并且构成说明书的一部分的附图与说明书一起示出了本发明的示例性实施例、特征和方面,并且用于解释本发明的原理。 [0018] incorporated in and constitute a part of the specification and drawings, together illustrate an exemplary embodiment of the present invention, features and aspects, and serve to explain the principles of the invention.

[0019]图1示出根据本发明一实施例的电压调整器的结构示意图; [0019] FIG. 1 shows a schematic structure according to an embodiment of the voltage regulator embodiment of the present invention;

[0020]图2示出根据本发明一实施例的谐振栅驱动器的结构示意图; [0020] FIG. 2 shows a schematic structure of the resonator gate driver according to an embodiment of the present invention;

[0021]图3示出根据本发明一实施例的谐振栅驱动器的具体电路结构图; [0021] FIG. 3 shows a specific circuit configuration diagram of a resonant gate driver according to an embodiment of the present invention;

[0022]图4a至图4c示出根据本发明一实施例的谐振栅驱动器驱动一个功率晶体管打开与关闭的步骤不意图; [0022] Figures 4a-4c illustrates the power transistor driving a gate driver resonator according to an embodiment of the present invention, the step of opening and closing is not intended;

[0023]图5a至图5c示出根据本发明一实施例的谐振栅驱动器驱动另外一个功率晶体管打开与关闭的步骤示意图; [0023] Figures 5a to 5c show a further power transistor driving a gate driver resonator according to an embodiment of the present invention and a schematic view of the step of closing the opening;

[0024]图6示出根据本发明实施例的谐振栅驱动器与现有技术的谐振栅驱动器驱动周期的对比示意图。 [0024] FIG. 6 shows a schematic comparison of the driving cycle in accordance with embodiments of the resonant gate driver of the present invention, the gate drive the resonator prior art.

具体实施方式 Detailed ways

[0025]以下将参考附图详细说明本发明的各种示例性实施例、特征和方面。 [0025] The following detailed description with reference to the accompanying drawings various exemplary embodiments of the present invention, features and aspects. 附图中相同的附图标记表示功能相同或相似的元件。 The drawings in which like reference numerals indicate identical or functionally similar elements. 尽管在附图中示出了实施例的各种方面,但是除非特别指出,不必按比例绘制附图。 Although the drawings illustrate various aspects of the embodiments, but unless otherwise indicated, the drawings are not necessarily drawn to scale.

[0026]在这里专用的词“示例性”意为“用作例子、实施例或说明性”。 [0026] Here dedicated word "exemplary" means "serving as an example, the illustrative embodiment or embodiments." 这里作为“示例性”所说明的任何实施例不必解释为优于或好于其它实施例。 Any embodiment herein as "exemplary" is not necessarily to be construed as being preferred or advantageous over other embodiments.

[0027]另外,为了更好的说明本发明,在下文的具体实施方式中给出了众多的具体细节。 [0027] Further, in order to better illustrate the present invention, numerous specific details are given in the detailed embodiment below. 本领域技术人员应当理解,没有某些具体细节,本发明同样可以实施。 It should be understood by those skilled in the art, without some specific details of the present invention may be practiced. 在一些实例中,对于本领域技术人员熟知的方法、手段、元件和电路未作详细描述,以便于凸显本发明的主旨。 In some examples, the method well known to those skilled in the art, methods, components, and circuits have not been described in detail in order to unnecessarily obscure the present invention.

[0028]本发明实施例的谐振栅驱动器,用于驱动第一功率晶体管和第二功率晶体管,可以通过控制如图1所示的电压调整器中两个功率晶体管开通和关断的时间比率,对输入电压Vi进行脉冲调制,从而使得输出电压Vo可调并能够维持稳定,其中,图1所示的第一功率晶体管110具体可以为NMOS晶体管,第二功率晶体管120具体可以为PMOS晶体管。 [0028] The embodiment of the present invention, an embodiment of the resonant gate driver for driving the first power transistor and a second power transistor controlled by the voltage regulator shown in FIG. 1, two power transistors on and off time ratio, input voltage Vi pulse modulation, so that the output voltage Vo is adjustable and can maintain a stable, wherein the first power transistor 110 shown in FIG. 1 in particular may be an NMOS transistor, a second power transistor may be a PMOS transistor 120 specifically.

[0029]图2示出根据本发明一实施例的谐振栅驱动器的结构示意图,如图2所示,该谐振栅驱动器主要包括第一控制通路210、第二控制通路220以及电感Lr,其中:第一控制通路210的第一端与第二控制通路220的第一端连接;第一控制通路210的第二端经由电感Lr与第二控制通路220的第二端连接;第一控制通路210的第三端与第一功率晶体管110连接,第二控制通路220的第三端与第二功率晶体管120连接。 [0029] FIG. 2 shows a schematic structure of the resonator of the gate driver according to an embodiment of the present invention, shown in Figure 2, the resonant gate driver 210 includes a first control path, a second control passage 220 and an inductor Lr, wherein: a first control passage 210 and the first end of the first end of the second control passage 220 is connected; a first control path 210 of the second end 220 of the inductor Lr via a second passage and a second control terminal is connected; a first control path 210 third terminal connected to the first power transistor 110, a second control passage 220 is connected to the third terminal of the second power transistor 120.

[0030] 通过图1所述的控制电路150与调制电路140,可以控制本发明的谐振栅驱动器的第一控制通路210与第二控制通路220通过的电流强度,从而能够控制第一功率晶体管110与第二功率晶体管120的开通和关断,实现了对图1所示的输入电压Vi的脉冲调制。 The current intensity of the second control channel [0030] 140, the gate driver may control the resonator of the present invention by the control circuit 150 of FIG. 1 according to a first modulation circuit 210 and a control passage 220, and thereby control the first power transistor 110 and the second power transistor 120 and turn off, to achieve a pulse modulation of the input voltage Vi as shown in FIG.

[0031]在一种可能的实现方式中,本发明一实施例的谐振栅驱动器的具体电路结构图可以如图3所示,第一控制通路210包括第一开关S1、第三开关S3以及第五开关&,第二控制通路220包括第二开关&、第四开关S4以及第六开关S6。 Specific circuit configuration of FIG. [0031] In one possible implementation, the embodiment of the present invention is a resonant gate drive of the embodiment shown in Figure 3 may be, the first control passage 210 includes a first switch S1, the third switch S3 and the second & fifth switch, the second control channel comprises a second switch & 220, the fourth switch S4 and the sixth switch S6. 其中:第一开的第一触点与第二开关S2的第一触点连接,第一开关Si的第二触点与第五开关S5的第二触点以及第三开关S3的第一触点连接;第二开关32的第二触点与第六开关S6的第二触点以及第四开关S4的第一触点连接;第三开关S3的第二触点与第一功率晶体管110连接;第四开关S4的第二触点与第二功率晶体管120连接;第五开关S5的第一触点以及第六开关S6的第一触点接地;电感Lr的一端与第一开关第二触点连接,电感Lr的另一端与第二开关S2的第二触点连接。 Wherein: the first opening of the first contact and the second switch S2 is connected to a first contact, second contact of the first switch Si and the fifth switch S5 of the second contact and the third switch S3 of the first contact point; a second switch of the second switch contact 32 and second contact S6 of the sixth and the fourth switch S4 is connected to the first contact; a second contact 110 connected to the third switch S3 and the first power transistor ; a second contact of the fourth switch S4 and the second power transistor 120 is connected; a first contact point of the fifth switch S5 and sixth switch S6, a first ground contact; Lr of the second end of the inductor and the first switch contact point connection, Lr other end of the inductor and the second switch S2 is connected to the second contact.

[0032]在一种可能的实现方式中,如图3所示,根据本发明一实施例的谐振栅驱动器还可以包括电源U,电源U与第一开关Si的第一触点以及第二开关S2的第一触点连接。 [0032] In one possible implementation, shown in Figure 3, the resonant gate driver according to an embodiment of the present invention may further include a power source U, U and the first power switch Si of the first contact and the second switch S2 is connected to the first contact.

[0033]在一种可能的实现方式中,第一开关S1、第二开关S2、第三开关S3、第四开关力、第五开关S5以及第六开关S6均为半导体元件。 [0033] In one possible implementation, the first switch S1, a second switch S2, the third switches S3, a fourth power switch, a fifth switch S5 and sixth switch S6 are semiconductor elements. 在一种可能的具体实现方式中,所述半导体元件为场效应晶体管,第一开关S1、第二开关&、第三开关S3、第四开关S4、第五开关S5以及第六开关S6的第一触点均为所述场效应晶体管的源极,第一开关S1、第二开关S2、第三开关S3、第四开关S4、第五开关35以及第六开关S6的第二触点均为所述场效应晶体管的漏极,第一开关S1、第二开关S2、第三开关S3、第四开关S4、第五开*S5以及第六开关S6的控制端均为所述场效应晶体管的栅极,与图1所述的调制电路140连接,能够通过调制电路140被控制电路150控制。 In a possible specific implementation, the semiconductor element is a field effect transistor, a first switch S1, the second switch &, the third switches S3, a fourth switch S4, the fifth switch S5 and sixth switch S6 of the contacts are a source of the field effect transistor, a first switch S1, the second switch S2, the third switches S3, a fourth switch S4, the fifth switch 35 and sixth switch S6 are the second contact the drain of the field effect transistor, a first switch S1, the second switch S2, the third switches S3, the fourth switch S4, the control start and end of the fifth and the sixth switch S6 * S5 are the field effect transistor a gate connected to the modulation circuit 140 according to FIG. 1, the control circuit 150 can be controlled by the modulation circuit 140.

[0034]在一种可能的实现方式中,第一开关S1、第二开关S2、第三开关S3、第四开关S4为PMOS晶体管,第五开关S5、第六开关S6为NMOS晶体管。 [0034] In one possible implementation, the first switch S1, a second switch S2, the third switches S3, a fourth switch S4, a PMOS transistor, the fifth switch S5, a sixth switch S6 is an NMOS transistor.

[0035]在一种可能的实现方式中,如图3所示,根据本发明一实施例的谐振栅驱动器还可以包括第一本体二极管D1、第二本体二极管D2、第三本体二极管D3、第四本体二极管D4、第五本体二极管D5以及第六本体二极管D6,其中:第一本体二极管0!的正极与第一开关S1的第二触点连接,第一本体二极管D1的负极与第一开关S1的第一触点连接;第二本体二极管02的正极与第二开关S2的第二触点连接,第二本体二极管D2的负极与第二开关S2的第一触点连接;第三本体二极管D3的正极与第三开关S3的第二触点连接,第三本体二极管D3的负极与第三开关S3的第一触点连接;第四本体二极管D4的正极与第四开关S4的第二触点连接,第四本体二极管D4的负极与第四开关S4的第一触点连接;第五本体二极管05的正极与第五开关55的第一触点连接,第五本体二极管D5的负极与第五开关S5的第二触点 [0035] In one possible implementation, shown in Figure 3, the resonant gate driver according to an embodiment of the present invention may further include a first body diode D1, the second body diode D2, the third body diode D3, first four body diode D4, a fifth diode D5 and a sixth body the body diode D6, wherein:! 0 the first body diode of the positive electrode and the second contact of the first switch S1 is connected to the negative electrode of the first body with the first switching diode D1 S1 is connected to the first contact; a second positive electrode and a body diode of the second switch S2 is connected to the second contact 02 of the second body diode D2 and the cathode of the second switch S2 is connected to a first contact point; a third body diode the second contact of the positive electrode D3 of the third switch S3 is connected to the cathode of the third body diode D3 and the third switch S3 is connected to the first contact; the positive electrode of the fourth body diode D4 and the fourth switch S4, the second contact connection point, the anode of the fourth body diode D4 and the fourth switch S4 is connected to the first contact; body diode of the positive electrode 05 and the fifth switch of the first fifth contact 55 is connected to the negative electrode of the first body fifth diode D5 fifth switch S5 second contact 连接;第六本体二极管D6的正极与第六开关S6的第一触点连接,第六本体二极管D6的负极与第六开关S6的第二触点连接。 Connection; body diode of the sixth switch S6 of the positive electrode and the sixth contact connected to a first D6, the cathode of the body diode of the sixth switch of the second contact sixth S6 D6 is connected. 本体二极管的存在可以减少电路中的逆向损耗、并能够起到保护开关的目的。 The presence of the body diode reverse the loss can be reduced in the circuit, and can serve the purpose of protection switch.

[0036]图4a至图4c示出本发明实施例的振栅驱动器打开与关闭第一功率晶体管110的简化步骤图,具体地,图4a为打开第一功率晶体管110即对其寄生电容(^进行充电的过程,通过控制第二开关32控制端的电压,使得第二开*S2导通,从而能够对寄生电容&充电,一段时间之后,当第一功率晶体管110的栅极电压超过阈值电压时导通。接下来如图4b所示,为电感Lr放电过程,此过程将电感Lr的能量还给供电源U,能够实现能量的节省。图4c为关闭第一功率晶体管110的过程即其寄生电容C1放电的过程,通过控制第六开关S6控制端的电压,使得第六开关S6导通,从而能够使得寄生电容&通过电感Lr进行放电。打开与关闭第二功率晶体管120即对其寄生电容&充电和放电的过程,简化步骤图如图5a至5c所示,具体步骤可以参考上述第一功率晶体管110的打开与关闭步骤。 [0036] Figures 4a to 4c show embodiments of transducer gate driver of the present invention, the step of opening and closing a simplified view of a first power transistor 110, specifically, FIG. 4a is a first power transistor 110 that is open to its parasitic capacitance (^ charging process, by controlling the voltage control terminal of the second switch 32, such that the second open * S2 is turned on, thereby charging the parasitic capacitance &, after some time, when the gate voltage of the first power transistor 110 exceeds a threshold voltage turned on. Next, as shown in FIG. 4b, Lr is the inductance of the discharge procedure, which will be returned to inductor Lr energy supply source U, the energy saving can be achieved. FIG. 4c is a process of the first power transistor 110 off its parasitic i.e. process capacitor C1 discharges, by controlling the voltage control terminal of the sixth switch S6, so that the sixth switch S6 is turned on, so that the parasitic capacitance can be discharged through the inductor & Lr. 120 open and close its parasitic capacitance i.e., second power transistor & charging and discharging processes, simplifying the step shown in Figure 5a to 5C, specific reference may be opened and closed step of the first step of the power transistor 110.

[0037]需要说明的是,第一开关S1、第二开关&、第三开关&、第四开关S4、第五开关S5以及第六开关S6的导通和关断可以通过调制电路140逻辑控制,当上述开关的控制端电压被控制为逻辑高电平时,该开关导通,当上述开关的控制端电压被控制为逻辑低电平时,该开关关断。 [0037] Incidentally, the first switch S1, the second switch &, & third switch, a fourth switch S4, the fifth switch S5 and sixth switch S6 are turned on and off by the logic circuit 140 controls the modulation when the voltage of the control terminal of the switch is controlled to a logic high level, the switch is turned on, when the voltage of the control terminal of the switch is controlled to a logic low level, the switch is turned off. 在实际应用中,可以根据需要,在调制电路140中预先设定好上述各个开关的控制端需要被控制为高电平或低电平的时刻。 In practical applications, as needed, in the modulation circuit 140 is preset control terminal of each of the switches needs to be controlled to high or low moment. 另外,本领域技术人员应能理解,上述各个开关也可以是具有类似功能的开关管。 Further, those skilled in the art should appreciate that the above-described respective switching may be a switch having a similar function.

[0038]在对图1所示的电压调整器的一个驱动周期内,本实施例的谐振栅驱动器需要执行两次对功率晶体管的打开操作和关闭操作,也就是:第一功率晶体管110打开,第一功率晶体管110关闭,第二功率晶体管120打开,第二功率晶体管120关闭。 [0038] In a driving period of the voltage regulator shown in Figure 1, the resonance of the gate driver of the present embodiment requires two power transistors perform opening and closing operations, namely: a first power transistor 110 is opened, first power transistor 110 is turned off, the second power transistor 120 is opened, the second power transistor 120 is closed.

[0039]根据上述分析,本实施例的谐振栅驱动器对单个功率晶体管的驱动可以总结为以下三个步骤,在一个驱动周期内,下述步骤被执行两次: [0039] According to the above analysis, the present resonant gate driver for driving a single embodiment of the power transistor can be summarized in the following three steps, in a driving cycle, the following steps are performed twice:

[0040] 步骤01、寄生电容充电过程; [0040] Step 01, the parasitic capacitance of the charging process;

[0041] 步骤02、电感放电,返还能量; [0041] Step 02, the inductor discharge, the return of energy;

[0042]步骤03、寄生电容放电,电感储能。 [0042] Step 03, the parasitic capacitance discharges, inductive energy storage.

[0043]而如背景技术中描述的现有谐振栅驱动器的结构对单个功率晶体管驱动可以总结为以下四个步骤,在一个驱动周期内,下述步骤被执行两次: [0043] and the structure of the conventional resonator, such as the gate driver described in the background of a single power transistor driver can be summarized in the following four steps, in a driving cycle, the following steps are performed twice:

[0044] 步骤11、寄生电容充电过程; [0044] Step 11, the parasitic capacitance of the charging process;

[0045] 步骤12、电感放电,返还能量; [0045] Step 12, the inductor discharge, the return of energy;

[0046]步骤13、寄生电容放电,电感储能; [0046] Step 13, the parasitic capacitance discharge, energy storage inductance;

[0047] 步骤14、电感放电,返还能量。 [0047] Step 14, the inductor discharge, the return of energy.

[0048]如果以50ns为谐振栅驱动器的驱动周期的步进单位,通过对现有技术的谐振栅驱动器以及本发明实施例的谐振栅驱动器对功率晶体管驱动的仿真实验,可以得到两种结构的驱动周期比较示意图。 [0048] Stepper unit drive period if 50ns resonant gate drive, by simulation of the resonant gate driver prior art and a resonant gate driver according to an embodiment of the present invention for a power transistor driving can be obtained both structures driving period compare FIG. 如图6所示,可以看出,本发明实施例的谐振栅驱动器将现有技术中两次电感的放电时间省去,从而与现有技术相比,能够使得驱动周期缩减了约25%,提高了响应速度。 6, it can be seen, the prior art two inductive discharge time of the gate driver resonator omitted embodiment of the present invention, as compared with the prior art, such that the driving cycle can be reduced by about 25%, improve the response speed. 另外,本发明实施例的谐振栅驱动器相比现有技术减少了对功率晶体管驱动的步骤,从而能够降低负责控制谐振栅驱动器开关的逻辑单元的复杂度。 Also, the resonant gate driver embodiment of the present invention as compared to prior art step of reducing the power transistor drive, thereby reducing the complexity of the control logic unit responsible for the resonant gate driver switch.

[0049]需要说明的是,尽管以运用到电压调整器的驱动电路中作为示例介绍了本发明提出的谐振栅驱动器如上,但本领域技术人员应能够理解,本发明的应用场景应不限于此。 [0049] Incidentally, although the order applied to the voltage regulator drive circuit as an example for the proposed invention the resonant gate driver as above, those skilled in the art will appreciate that the application scenario of the present invention should not be limited thereto . 本发明提出的新型谐振栅驱动器还能运用到其他类似电路中,例如对功率开关器件的驱动电路等。 The present invention proposes novel resonant gate driver can also be applied to other similar circuit, for example, the drive circuit of the power switching device and the like. 另外,尽管上述实施例以图4a至4c以及图5a至5c为例,具体介绍了本发明的谐振栅驱动器的一种可能的实现方式,但本领域技术人员应能够理解,本发明的谐振栅驱动器的具体电流流向应不限于此,完全可以根据应用场景灵活设定各个开关的控制端的逻辑电平值,所有采用权利要求所述的谐振栅驱动器的结构,都属于本发明的范围。 Further, although the above embodiments in FIGS. 4a to 4c and 5a to 5c, the detailed description of one possible implementation of the resonant gate driver of the present invention, those skilled in the art will appreciate that the present invention is a resonant gate DETAILED current flowing to the drive should not be limited thereto, and can flexibly set the logic level of the control terminal of each switch according to the application scenarios, all using the structure according to claim resonant gate drive, are within the scope of the present invention.

[0050] 根据本发明一实施例的电压调整器的结构图可以如图1所示。 [0050] The configuration shown in Figure 1 can view of a embodiment of the voltage regulator embodiment of the present invention. 电压调整器可以包括:第一功率晶体管110、第二功率晶体管120、以及谐振栅驱动器130。 The voltage regulator may include: 120, and a resonant gate drive of the first power transistor 110, a second power transistor 130. 其中,第一功率晶体管110的第一触点与电源E的一端连接;第二功率晶体管120的第一触点与电源E的另一端连接,第二功率晶体管120的第二触点与第一功率晶体管110的第二触点连接;谐振栅驱动器130采用根据本发明上述实施例所述的电路结构,与第一功率晶体管110的控制端以及第二功率晶体管120的控制端连接,能够驱动第一功率晶体管110和第二功率晶体管120的打开和关闭。 Wherein the first power transistor 110 is connected to the first contact end E of the power source; the first contact and the other end of the power supply E is connected to the second power transistor 120, a second power transistor 120 and the first second contact the power transistor 110 is connected to the second contact; resonant gate driver circuit 130 using the configuration of the above embodiment of the invention, connected to the control terminal of the first power transistor 110 and a control terminal of the second power transistor 120, capable of driving the first opening and closing of the power transistor 110 and a second power transistor 120.

[0051]在一种可能的实现方式中,所述电压调整器还包括:反馈电感L、反馈电容C、控制电路150、以及调制电路140,其中:反馈电感L的一端与第一功率晶体管110的第二触点连接,反馈电感L的另一端与反馈电容C的一端连接,反馈电容C的另一端与第一功率晶体管110的第一触点连接;控制电路150连接在反馈电感L的两端,能够根据反馈电感L两端的电压产生控制信号;调制电路140与控制电路150连接,能够根据所述控制信号产生调制信号;谐振栅驱动器130与调制电路140连接,能够根据所述调制信号驱动第一功率晶体管110与第二功率晶体管120。 [0051] In one possible implementation, the voltage regulator further comprises: a feedback inductor L, the feedback capacitor C, a control circuit 150, and a modulation circuit 140, wherein: L is the inductance of the first end of the feedback power transistor 110 a second contact connected to the other end of the feedback inductor L connected to one end of the feedback capacitor C, the other terminal of the feedback capacitor C and the first power transistor 110 is connected to the first contact; feedback control circuit 150 is connected to the inductance L of the two terminal, the feedback voltage can be generated across the inductor L in accordance with a control signal; modulation circuit 140 is connected to the control circuit 150 can generate a modulated signal according to the control signal; resonant gate driver 130 is connected to the modulation circuit 140, the drive signal can be modulated according to the first power transistor 110 and the second power transistor 120.

[0052]在一种可能的实现方式中,第一功率晶体管110为NMOS晶体管,第二功率晶体管120为PMOS晶体管。 [0052] In one possible implementation, the first power transistor 110 is an NMOS transistor, the second power transistor 120 is a PMOS transistor.

[0053]在一种可能的实现方式中,第一功率晶体管110的第一触点为所述匪OS晶体管的源极,第一功率晶体管110的第二触点为所述NMOS晶体管的漏极,第一功率晶体管110的控制端为所述NMOS晶体管的栅极;第二功率晶体管120的第一触点为所述PMOS晶体管的源极,第二功率晶体管120的第二触点为所述PMOS晶体管的漏极,第二功率晶体管120的控制端为所述PMOS晶体管的栅极。 [0053] In one possible implementation, the first contact of the first power transistor 110 for the source OS bandit transistor, the first power transistor 110 to the second contact of the drain of the NMOS transistor the control terminal of the first power transistor 110 to the gate of the NMOS transistor; a first contact of the second power transistor 120 is the source of the PMOS transistor, a second power transistor 120 to the second contact the drain of the PMOS transistor, the control terminal of the second power transistor 120 to the gate of the PMOS transistor.

[0054]谐振栅驱动器130对第一功率晶体管110和对第二功率晶体管120的控制具体可以参照上述实施例以及图4a至图4c以及图5a至5c所述,通过控制第一功率晶体管110与第二功率晶体管120的开通和关断,实现了对图1所示的输入电压Vi的脉冲调制。 [0054] The gate driver 130 of the resonator controls the first power transistor 110 and a second power transistor 120 may specifically with reference to the above embodiments and FIGS. 4a to 4c and the FIG. 5a 5c, by controlling the first power transistor 110 and second power transistor 120 on and off to achieve a pulse modulation of the input voltage Vi as shown in FIG.

[0055]另外,需要说明的是,在采用图3所示结构的谐振栅驱动器时,由于谐振栅驱动器中第一开关S1、第二开关S2、第三开关&、第四开关S4、第五开*S5以及第六开关S6的导通和关断可以通过调制电路140逻辑控制,也就是说当上述开关的控制端电压被控制为逻辑高电平时,该开关导通,当上述开关的控制端电压被控制为逻辑低电平时,该开关关断。 [0055] Further, it is noted that, when using the gate driver of FIG resonator structure shown in FIG 3, due to the resonance of the gate drive of the first switch S1, a second switch S2, the third switch &, the fourth switch S4, the fifth open * S5 and sixth switch S6 are turned on and off by logic 140 controls the modulation circuit, that is to say when the voltage of the control terminal of the switch is controlled to a logic high level, the switch is turned on, when the control of the switch when the terminal voltage is controlled to a logic low level, the switch is turned off. 在实际应用中,可以根据需要,在调制电路140中预先设定好上述各个开关的控制端需要被控制为高电平或低电平的时刻。 In practical applications, as needed, in the modulation circuit 140 is preset control terminal of each of the switches needs to be controlled to high or low moment.

[0056]本实施例的电压调整器采用了本发明上述实施例所述的谐振栅驱动器,能够提高响应速度,更有利于电压调整器的片上集成。 [0056] The voltage regulator of the present embodiment employs a resonant gate drive of the invention described in the above-described embodiment, the response speed can be improved, more conducive to integration on-chip voltage regulator. 另外,本发明实施例的电压调整器能够降低负责控制谐振栅驱动器的开关的逻辑单元、也就是调制电路的复杂度。 Further, the voltage regulator embodiment of the present invention can reduce the logic unit responsible for controlling the switches of a resonant gate driver, i.e. the complexity of the modulation circuit.

[0057]以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。 [0057] The above are only specific embodiments of the present invention, but the scope of the present invention is not limited thereto, any skilled in the art in the art within the technical scope of the present invention is disclosed, variations may readily occur or Alternatively, it shall fall within the protection scope of the present invention. 因此,本发明的保护范围应以所述权利要求的保护范围为准。 Accordingly, the scope of the present invention should be defined by the scope of the claims.

Claims (10)

1.一种谐振栅驱动器,用于驱动第一功率晶体管和第二功率晶体管,其特征在于,包括第一控制通路、第二控制通路以及电感,其中: 所述第一控制通路的第一端与所述第二控制通路的第一端连接; 所述第一控制通路的第二端经由所述电感与所述第二控制通路的第二端连接; 所述第一控制通路的第三端与所述第一功率晶体管连接,所述第二控制通路的第三端与所述第二功率晶体管连接, 所述第一控制通路包括第一开关、第三开关以及第五开关,所述第二控制通路包括第二开关、第四开关以及第六开关,其中: 所述第一开关的第一触点与所述第二开关的第一触点连接,所述第一开关的第二触点与所述第五开关的第二触点以及所述第三开关的第一触点连接; 所述第二开关的第二触点与所述第六开关的第二触点以及所述第四开关的第一触点连接; 所述 1. A resonant gate driver for driving the first power transistor and a second power transistor, characterized by comprising a first control channel, control channel, and a second inductor, wherein: the first end of the first control path a first end connected to the second control passage; the first end of the second control passage is connected via a second end of the inductor and the second control passage; the first end of a third control channel the first power transistor connected to the second control passage and the second power terminal of a third transistor connected to the first control path comprises a first switch, the third switch and the fifth switch, the first second control path comprises a second switch, the fourth switch and the sixth switch, wherein: said first switch is a first contact and a first contact connected to the second switch, a second contact of the first switch point of the fifth switch is connected to the second contact and the first contact of the third switch; a second contact of the second contact of the second switch and the sixth switch and the second a first switch contact is connected to four; the 三开关的第二触点与所述第一功率晶体管连接; 所述第四开关的第二触点与所述第二功率晶体管连接; 所述第五开关的第一触点以及所述第六开关的第一触点接地; 所述电感的一端与所述第一开关的第二触点连接,所述电感的另一端与所述第二开关的第二触点连接。 A second contact with the third switching transistor connected to the first power; the second contact of the fourth switch is connected to the second power transistor; the first contact of the fifth switch and the sixth a first grounding switch contact; end of the inductor and the second contact of the first switch is connected to other end of the inductor and the second contact of the second switch is connected.
2.根据权利要求1所述的谐振栅驱动器,其特征在于,还包括电源,所述电源与所述第一开关的第一触点以及所述第二开关的第一触点连接。 The resonant gate driver according to claim 1, characterized by further comprising a power source and first switch, the first contact and the first contact of the second switch is connected.
3.根据权利要求1或2所述的谐振栅驱动器,其特征在于,所述第一开关、所述第二开关、所述第三开关、所述第四开关、所述第五开关以及所述第六开关均为半导体元件。 The resonant gate driver of claim 1 or claim 2, wherein the first switch, the second switch, the third switch, the fourth switch, the fifth switch and the a sixth semiconductor switching element are described later.
4.根据权利要求3所述的谐振栅驱动器,其特征在于,所述半导体元件为场效应晶体管,所述第一开关、所述第二开关、所述第三开关、所述第四开关、所述第五开关以及所述第六开关的第一触点均为所述场效应晶体管的源极,所述第一开关、所述第二开关、所述第三开关、所述第四开关、所述第五开关以及所述第六开关的第二触点均为所述场效应晶体管的漏极,所述第一开关、所述第二开关、所述第三开关、所述第四开关、所述第五开关以及所述第六开关的控制端均为所述场效应晶体管的栅极。 The resonant gate driver according to claim 3, characterized in that said semiconductor element is a field effect transistor, the first switch, the second switch, the third switch, the fourth switch, the fifth switch and the sixth switch of the first contact are the source of the field effect transistor, the first switch, the second switch, the third switch, the fourth switch , the fifth switch and the sixth switch of the second contacts are the drain of the field effect transistor, the first switch, the second switch, the third switch, the fourth a control terminal of the switch, the fifth switch and the sixth switch are the gate field effect transistor.
5.根据权利要求4所述的谐振栅驱动器,其特征在于,所述第一开关、所述第二开关、所述第三开关、所述第四开关为PMOS晶体管,所述第五开关、所述第六开关为NMOS晶体管。 The resonant gate driver according to claim 4, wherein the first switch, the second switch, the third switch, the fourth switch is a PMOS transistor, the fifth switch, the sixth switch is an NMOS transistor.
6.根据权利要求5所述的谐振栅驱动器,其特征在于,还包括第一本体二极管、第二本体二极管、第三本体二极管、第四本体二极管、第五本体二极管以及第六本体二极管,其中: 所述第一本体二极管的正极与所述第一开关的第二触点连接,所述第一本体二极管的负极与所述第一开关的第一触点连接; 所述第二本体二极管的正极与所述第二开关的第二触点连接,所述第二本体二极管的负极与所述第二开关的第一触点连接; 所述第三本体二极管的正极与所述第三开关的第二触点连接,所述第三本体二极管的负极与所述第三开关的第一触点连接; 所述第四本体二极管的正极与所述第四开关的第二触点连接,所述第四本体二极管的负极与所述第四开关的第一触点连接; 所述第五本体二极管的正极与所述第五开关的第一触点连接,所述第五本体二极管的负 The resonant gate driver according to claim 5, wherein the body further comprises a first diode, a second diode body, the third body diode, the body diode of the fourth, fifth and a sixth diode body the body diode, wherein : the positive electrode of the first body diode and the second contact of the first switch is connected to the negative electrode of the first body diode connected to the first contact of the first switch; the second body diode the positive electrode is connected to a second contact of the second switch, the second body diode cathode is connected to the second contact of the first switch; the positive electrode and the third body diode of the third switch a second contact connected to the anode of the third diode and the first body contact connected to said third switch; the positive electrode of the fourth body diode is connected to a second contact of said fourth switch is connected, the a fourth diode cathode body with a first contact connected to the fourth switch; anode of the fifth diode and the body of the fifth switch connected to the first contact, the body diode of the fifth negative 与所述第五开关的第二触点连接; 所述第六本体二极管的正极与所述第六开关的第一触点连接,所述第六本体二极管的负极与所述第六开关的第二触点连接。 The fifth switch is connected to the second contact; anode of the sixth diode and a first body contact is connected to the sixth switch, the cathode of the body diode of the sixth switch and the sixth two contacts.
7.一种电压调整器,其特征在于,包括: 第一功率晶体管,所述第一功率晶体管的第一触点与电源的一端连接; 第二功率晶体管,所述第二功率晶体管的第一触点与所述电源的另一端连接,所述第二功率晶体管的第二触点与所述第一功率晶体管的第二触点连接;以及如权利要求1至6中任一项所述的谐振栅驱动器,与所述第一功率晶体管的控制端以及所述第二功率晶体管的控制端连接,用于驱动所述第一功率晶体管和所述第二功率晶体管。 A voltage regulator, characterized by comprising: a first power transistor, the first contact connected to one end of the first power transistor and a power source; the first and second power transistors, said second power transistor contact and connecting the other end of the power source, a second contact connected to the second transistor and a second power contacts of the first power transistor; and any one of claims 1 to 6, as claim resonant gate driver connected to the control terminal of the first power transistor and the control terminal of the second power transistor for driving said first power transistor and the second power transistor.
8.根据权利要求7所述的电压调整器,其特征在于,还包括:反馈电感、反馈电容、控制电路、以及调制电路,其中: 所述反馈电感的一端与所述第一功率晶体管的第二触点连接,所述反馈电感的另一端与所述反馈电容的一端连接,所述反馈电容的另一端与所述第一功率晶体管的第一触点连接; 所述控制电路连接在所述反馈电感的两端,能够根据所述反馈电感两端的电压产生控制信号; 所述调制电路与所述控制电路连接,能够根据所述控制信号产生调制信号; 所述谐振栅驱动器与所述调制电路连接,能够根据所述调制信号驱动所述第一功率晶体管与所述第二功率晶体管。 8. The voltage regulator as claimed in claim 7, characterized in that, further comprising: a feedback inductor, a feedback capacitance, the control circuit, and a modulation circuit, wherein: the first end of the feedback inductor and the first power transistor two contacts connected to the feedback end and the other end of the inductor is connected to the feedback capacitor, the feedback capacitor and the other end connected to a first contact of the first power transistor; the control circuit is connected to the both ends of the feedback inductor, capable of generating a control signal based on a voltage across the feedback inductor; of the modulation circuit and the control circuit, the control signal can be generated in accordance with a modulation signal; the resonant gate driver and the modulation circuit connection, it is possible according to said modulation signal for driving said first power transistor and the second power transistor.
9.根据权利要求7或8所述的电压调整器,其特征在于,所述第一功率晶体管为NMOS晶体管,所述第二功率晶体管为PMOS晶体管。 9. The voltage regulator as claimed in claim 7 or 8, wherein said first power transistors are NMOS transistors, said second power transistor is a PMOS transistor.
10.根据权利要求9所述的电压调整器,其特征在于, 所述第一功率晶体管的第一触点为所述NMOS晶体管的源极,所述第一功率晶体管的第二触点为所述NMOS晶体管的漏极,所述第一功率晶体管的控制端为所述NMOS晶体管的栅极, 所述第二功率晶体管的第一触点为所述PMOS晶体管的源极,所述第二功率晶体管的第二触点为所述PMOS晶体管的漏极,所述第二功率晶体管的控制端为所述PMOS晶体管的栅极。 10. The voltage regulator as claimed in claim 9, characterized in that the first contact of the first power transistor as a source of the NMOS transistor, the second contact of the first power transistor the drain of said NMOS transistor, the control terminal of the first power transistor to the gate of the NMOS transistor, a first contact of the second power transistor to the source of the PMOS transistor, the second power a drain contact of the second transistor of the PMOS transistor, a control terminal of the second power transistor a gate of the PMOS transistor.
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US9584109B2 (en) 2017-02-28
EP2890009A1 (en) 2015-07-01

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