CN109844957A - 采用介电材料层以向沟道区域施加应力的鳍式场效应晶体管(fet)(finfet) - Google Patents
采用介电材料层以向沟道区域施加应力的鳍式场效应晶体管(fet)(finfet) Download PDFInfo
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- CN109844957A CN109844957A CN201780056420.3A CN201780056420A CN109844957A CN 109844957 A CN109844957 A CN 109844957A CN 201780056420 A CN201780056420 A CN 201780056420A CN 109844957 A CN109844957 A CN 109844957A
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- dielectric materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
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- H—ELECTRICITY
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
- H10B12/056—Making the transistor the transistor being a FinFET
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- H—ELECTRICITY
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/36—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being a FinFET
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- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
- H10D30/6211—Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates
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- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
- H10D30/6219—Fin field-effect transistors [FinFET] characterised by the source or drain electrodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/792—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising applied insulating layers, e.g. stress liners
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/795—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in lateral device isolation regions, e.g. STI
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/013—Manufacturing their source or drain regions, e.g. silicided source or drain regions
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0135—Manufacturing their gate conductors
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- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0151—Manufacturing their isolation regions
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- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0158—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including FinFETs
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0193—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices the components including FinFETs
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/834—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] comprising FinFETs
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/853—Complementary IGFETs, e.g. CMOS comprising FinFETs
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/011—Manufacture or treatment comprising FinFETs
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
- H10D86/215—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI comprising FinFETs
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- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/60—Wet etching
- H10P50/64—Wet etching of semiconductor materials
- H10P50/642—Chemical etching
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- General Chemical & Material Sciences (AREA)
- General Engineering & Computer Science (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/266,840 | 2016-09-15 | ||
| US15/266,840 US9882051B1 (en) | 2016-09-15 | 2016-09-15 | Fin field effect transistors (FETs) (FinFETs) employing dielectric material layers to apply stress to channel regions |
| PCT/US2017/046525 WO2018052591A1 (en) | 2016-09-15 | 2017-08-11 | Fin field effect transistors (fets) (finfets) employing dielectric material layers to apply stress to channel regions |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109844957A true CN109844957A (zh) | 2019-06-04 |
Family
ID=59684098
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201780056420.3A Pending CN109844957A (zh) | 2016-09-15 | 2017-08-11 | 采用介电材料层以向沟道区域施加应力的鳍式场效应晶体管(fet)(finfet) |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US9882051B1 (https=) |
| EP (1) | EP3513437B1 (https=) |
| JP (1) | JP6974446B2 (https=) |
| KR (1) | KR102550579B1 (https=) |
| CN (1) | CN109844957A (https=) |
| BR (1) | BR112019004507B1 (https=) |
| CA (1) | CA3032965A1 (https=) |
| WO (1) | WO2018052591A1 (https=) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10109507B2 (en) * | 2016-06-01 | 2018-10-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Fluorine contamination control in semiconductor manufacturing process |
| US11211243B2 (en) * | 2018-11-21 | 2021-12-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of filling gaps with carbon and nitrogen doped film |
| KR102760190B1 (ko) * | 2019-05-16 | 2025-01-23 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110127610A1 (en) * | 2009-12-02 | 2011-06-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multiple-Gate Semiconductor Device and Method |
| US20130175621A1 (en) * | 2012-01-11 | 2013-07-11 | Tong-Yu Chen | Finfet structure and method for making the same |
| US20130181299A1 (en) * | 2012-01-13 | 2013-07-18 | Globalfoundries Inc. | Strain Engineering in Three-Dimensional Transistors Based on Strained Isolation Material |
| US20140225168A1 (en) * | 2013-02-11 | 2014-08-14 | Globalfoundries Inc. | Methods of forming a three-dimensional semiconductor device with a dual stress channel and the resulting device |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7081395B2 (en) | 2003-05-23 | 2006-07-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Silicon strain engineering accomplished via use of specific shallow trench isolation fill materials |
| JP2007207837A (ja) | 2006-01-31 | 2007-08-16 | Toshiba Corp | 半導体装置および半導体装置の製造方法 |
| US7939862B2 (en) | 2007-05-30 | 2011-05-10 | Synopsys, Inc. | Stress-enhanced performance of a FinFet using surface/channel orientations and strained capping layers |
| US7943531B2 (en) * | 2007-10-22 | 2011-05-17 | Applied Materials, Inc. | Methods for forming a silicon oxide layer over a substrate |
| US7915112B2 (en) | 2008-09-23 | 2011-03-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Metal gate stress film for mobility enhancement in FinFET device |
| US9953885B2 (en) * | 2009-10-27 | 2018-04-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | STI shape near fin bottom of Si fin in bulk FinFET |
| DE102010002410B4 (de) | 2010-02-26 | 2017-03-02 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Verformungsgedächtnistechnologie in verformten SOI-Substraten von Halbleiterbauelementen |
| US8937353B2 (en) * | 2010-03-01 | 2015-01-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Dual epitaxial process for a finFET device |
| JP2013093438A (ja) * | 2011-10-26 | 2013-05-16 | Renesas Electronics Corp | 半導体装置の製造方法 |
| CN103681846B (zh) | 2012-09-20 | 2017-02-08 | 中芯国际集成电路制造(上海)有限公司 | 半导体装置及其制造方法 |
| US9263585B2 (en) * | 2012-10-30 | 2016-02-16 | Globalfoundries Inc. | Methods of forming enhanced mobility channel regions on 3D semiconductor devices, and devices comprising same |
| US8759874B1 (en) * | 2012-11-30 | 2014-06-24 | Stmicroelectronics, Inc. | FinFET device with isolated channel |
| US9721955B2 (en) | 2014-04-25 | 2017-08-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for SRAM FinFET device having an oxide feature |
| US9306067B2 (en) | 2014-08-05 | 2016-04-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Nonplanar device and strain-generating channel dielectric |
| TWI655774B (zh) * | 2015-08-12 | 2019-04-01 | 聯華電子股份有限公司 | 半導體元件及其製作方法 |
| US9614086B1 (en) * | 2015-12-30 | 2017-04-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Conformal source and drain contacts for multi-gate field effect transistors |
-
2016
- 2016-09-15 US US15/266,840 patent/US9882051B1/en active Active
-
2017
- 2017-08-11 BR BR112019004507-4A patent/BR112019004507B1/pt active IP Right Grant
- 2017-08-11 CN CN201780056420.3A patent/CN109844957A/zh active Pending
- 2017-08-11 KR KR1020197007266A patent/KR102550579B1/ko active Active
- 2017-08-11 EP EP17755390.6A patent/EP3513437B1/en active Active
- 2017-08-11 CA CA3032965A patent/CA3032965A1/en active Pending
- 2017-08-11 JP JP2019513978A patent/JP6974446B2/ja active Active
- 2017-08-11 WO PCT/US2017/046525 patent/WO2018052591A1/en not_active Ceased
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110127610A1 (en) * | 2009-12-02 | 2011-06-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multiple-Gate Semiconductor Device and Method |
| US20130175621A1 (en) * | 2012-01-11 | 2013-07-11 | Tong-Yu Chen | Finfet structure and method for making the same |
| US20130181299A1 (en) * | 2012-01-13 | 2013-07-18 | Globalfoundries Inc. | Strain Engineering in Three-Dimensional Transistors Based on Strained Isolation Material |
| US20140225168A1 (en) * | 2013-02-11 | 2014-08-14 | Globalfoundries Inc. | Methods of forming a three-dimensional semiconductor device with a dual stress channel and the resulting device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP6974446B2 (ja) | 2021-12-01 |
| BR112019004507B1 (pt) | 2023-10-03 |
| BR112019004507A2 (pt) | 2019-06-04 |
| KR102550579B1 (ko) | 2023-07-03 |
| EP3513437C0 (en) | 2024-10-30 |
| CA3032965A1 (en) | 2018-03-22 |
| EP3513437B1 (en) | 2024-10-30 |
| WO2018052591A1 (en) | 2018-03-22 |
| US9882051B1 (en) | 2018-01-30 |
| JP2019530227A (ja) | 2019-10-17 |
| KR20190047696A (ko) | 2019-05-08 |
| EP3513437A1 (en) | 2019-07-24 |
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Application publication date: 20190604 |