CN109742128B - 显示器及其显示面板 - Google Patents

显示器及其显示面板 Download PDF

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CN109742128B
CN109742128B CN201910081913.3A CN201910081913A CN109742128B CN 109742128 B CN109742128 B CN 109742128B CN 201910081913 A CN201910081913 A CN 201910081913A CN 109742128 B CN109742128 B CN 109742128B
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display panel
vdd
display area
display
area
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CN109742128A (zh
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常苗
李威龙
张露
胡思明
韩珍珍
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Kunshan Govisionox Optoelectronics Co Ltd
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Kunshan Govisionox Optoelectronics Co Ltd
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Priority to PCT/CN2020/070732 priority patent/WO2020156057A1/zh
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    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0288Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0292Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using a specific configuration of the conducting means connecting the protective devices, e.g. ESD buses
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0296Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices involving a specific disposition of the protective devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
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    • H10K59/126Shielding, e.g. light-blocking means over the TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
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    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/3827Portable transceivers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301Details of OLEDs
    • H10K2102/311Flexible OLED
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/549Organic PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

本申请公开一种显示器及其显示面板。本申请通过在异形显示区增加一条VDD走线,该条VDD走线通过多条导通走线接入异形显示区内的像素,从而能够在有利于窄边框设计的同时避免阻抗较大导致的分屏风险。

Description

显示器及其显示面板
技术领域
本申请涉及显示技术领域,具体涉及一种显示器及其显示面板。
背景技术
从传统的按键型手机到如今的触摸型智能机,手机越来越朝着高屏占比的方向发展,这其中全面屏技术更是业界主流。全面屏技术不仅可以增大手机的可视面积,而且提升了手机的颜值,让手机看上去更有科技感,另外同样机身正面的面积可以容纳更大的屏幕,对于视觉体验有着显著的提升。在此基础上,为了满足人们多样化的需求,全面屏显示面板的至少一边角通常被设计成异形,例如结合图1所示,显示面板的左下角和右下角为圆弧形。使用传统技术制造异形显示面板时,需要在异形显示区外围的非显示区内进行布线,包括用于驱动像素的相关电路和走线。具体地,该非显示区排布有用于提供data信号的数据线和提供显示信号的VDD走线。然而,受限于这些信号走线复杂的布线环境,压缩该非显示区的难度很大,对窄边框设计的实现造成障碍。
发明内容
基于此,本申请有必要提供一种显示器及其显示面板,以在有利于窄边框设计的同时避免阻抗较大导致的分屏风险。
本申请一实施例的显示面板,包括异形显示区及位于异形显示区内的阵列排布的像素,在异形显示区外围的非显示区内,排布有多条数据线、一条VDD走线和多条导通走线,每条数据线与对应的像素电连接,所述多条导通走线将所述一条VDD走线与对应的像素电连接。
本申请一实施例的显示器,包括驱动电路以及上述显示面板,所述驱动电路电性耦接所述显示面板的数据线和VDD走线。
本申请提供的显示器及其显示面板,通过在异形显示区增加一条 VDD走线,该条VDD走线通过导通走线接入异形显示区内的像素,缩小了规则显示区和异形显示区内像素所接收的电流差异从而能够避免分压阻抗较大导致的分屏风险,另外异形显示区仅设置一条VDD走线,能够减小VDD走线在非显示区内所占空间,有利于窄边框设计。
附图说明
图1是本申请的异形显示面板一实施例的结构俯视图;
图2是图1所示异形显示区一实施例的局部布线结构示意图;
图3是图2所示异形显示区一实施例的像素电路示意图;
图4是图2所示异形显示区沿A-A方向的局部剖视图。
具体实施方式
本申请的首要目的是:在异形显示区增加一条VDD走线,其通过多条导通走线接入异形显示区内的像素,缩小了规则显示区和异形显示区内像素所接收的电流差异,以此避免分压阻抗较大导致的分屏风险。同时,异形显示区仅排布有一条VDD走线,其在非显示区内所占空间较小,有利于窄边框设计。
基于上述目的,下面将结合本申请实施例的附图,对本申请实施例中的技术方案进行清楚、完整地描述。可以理解的是,此处描述的具体实施例仅用于解释本申请,而非对本申请的限定。在不冲突的情况下,下述各实施例及其中的技术特征可相互组合。另外还需要说明的是,为了便于描述,所述附图中仅示出了与本申请相关的部分而非全部结构。基于本申请的实施例,本领域普通技术人员在没有作出创造性劳动前提下获得的所有其他实施例,都属于本申请保护的范围。
请参阅图1所示,所述显示面板10包括显示区11以及位于该显示区外围周边的非显示区12。
显示区11内具有阵列排布的像素112,如图2所示,这些像素112 可以分别为R(Red,红色)子像素、G(Green,绿色)子像素、以及B (Blue,蓝色)子像素。每个像素112在驱动电路的控制下能够显示不同的灰阶,从而使显示面板10能够显示彩色图像。
显示区11的至少一个边角为弧形边角,也就是说,该显示区11具有至少两条相邻的直边,相邻两条直边之间形成有一弧形边角。例如,参阅图1,显示区11的左下角和右下角均为弧形边角。基于此设计,显示区11中包括由非直边构成的区域称之为异形显示区111,而显示区11 中均由直边构成的区域称之为规则显示区(图中未标号)。
在异形显示区111内,所述显示面板10存在至少相邻两行数量不相同的像素112,例如在图2中,沿从下至上的方向,第二行像素112的数量比第一行像素112的数量多一个,从而导致该相邻两行像素112形成有台阶。其中,任意两个台阶在行方向上的尺寸可以相同也可以不相同,且这两个台阶在行方向上的尺寸之差可以等于一个像素112在行方向上的整数倍,这取决于显示面板10的像素结构设计。例如在图2中,沿从下至上的方向,对于第一行像素112和第二行像素112所形成的台阶与第二行像素112和第三行像素112所形成的台阶,这两个台阶在行方向上的尺寸之差等于一个像素112的在行方向上的尺寸。而在规则显示区内,任意相邻两行像素112在行方向上均对齐。
非显示区12内分布有用于驱动像素112发光的驱动电路和相应的信号走线。具体地,该非显示区12可以包括走线区。
走线区紧贴显示区11(包括异形显示区111)的外围而设置,走线区内排布有不同类型的信号走线,所述信号走线为实现信号传输的各种类型走线的总称,例如其包括扫描驱动输出线,该扫描驱动输出线的一端连接栅极驱动单元,另一端连接像素电路,由此向与其连接的像素112 提供扫描驱动信号。又例如,所述信号走线还包括VDD走线121以及多条数据线122,这些数据线122在非显示区12内所占据的区域称之为 Data布线区123,如图2所示,每条数据线122可以对应连接一列像素 112。
与现有技术不同的是,在异形显示区111外围的非显示区12内, VDD走线121的排布数量为一条,该一条VDD走线121位于Data布线区123的外围。另外,非显示区12内还排布有多条导通走线124,该导通走线124连接所述VDD走线121和对应的像素112,且每一导通走线124均跨过Data布线区123,例如多条导通走线124在显示面板10 上的正投影位于Data布线区123内。
下面结合图3介绍本申请的显示面板10通过上述VDD走线121和多条导通走线124实现画面显示的原理及过程。
图3是图2所示异形显示区一实施例的像素电路示意图。结合图3 所示,以为OLED(有机发光二极管)显示面板10为例,其像素电路 31连接至与该像素电路31相邻的扫描线32、数据线122和VDD走线 121。响应于来自扫描线32的扫描脉冲、根据来自数据线122的数据信号Vdata来控制在OLED器件中流动的电流。所述像素电路31可以包括开关晶体管Tsw、驱动晶体管Tdr和电容Cst。
根据供应至扫描线32的扫描脉冲来切换开关晶体管Tsw,并且开关晶体管Tsw向驱动晶体管Tdr供应被供应至数据线122的数据信号 Vdata。根据从开关晶体管Tsw供应的数据信号Vdata来切换驱动晶体管 Tdr,并且驱动晶体管Tdr控制来自VDD走线121的驱动OLED器件发光的电流。电容Cst连接在驱动晶体管Tdr的栅极与源极之间,用于存储与供应至驱动晶体管Tdr的栅极的数据信号Vdata对应的电压,并且通过所存储的电压来使驱动晶体管Tdr接通。
所述OLED器件至少包括:连接至驱动晶体管Tdr的源极的阳极电极(或像素电极);形成在阳极电极上的有机发光层;以及形成在有机发光层上的阴极电极层。所述OLED器件通过根据从驱动晶体管Tdr供应的显示信号而发光来显示预定图像。
本申请在异形显示区111排布有一条VDD走线121,能够有利于避免分压阻抗较大导致的分屏风险。具体地,对于异形显示区内未设置独立的VDD走线的现有设计,异形显示区内的像素通过规则显示区内的 VDD走线提供电流,规则显示区内的VDD走线将电流传输给规则显示区内的像素,电流在相邻像素依次传递并最终传输给异形显示区内的像素,电流传输至异形显示区内像素的路径远远大于传输至规则显示区内像素的路径,路径较长,且相邻像素之间的分压阻抗较大,电流衰减大,由此导致规则显示区和异形显示区的显示亮度差异,出现分屏风险的几率较高。而本申请的异形显示区111还通过一条VDD走线121接收电流,缩小了规则显示区和异形显示区内像素112所接收的电流差异,从而缩小规则显示区和异形显示区的显示亮度差异,从而有利于避免分压阻抗较大导致的分屏风险。
本申请在异形显示区111内仅排布一条VDD走线121,VDD走线的数量较少,从而能够减小VDD走线在非显示区12内占据的面积,有利于显示面板10的窄边框设计。而多条导通走线124在非显示区12内占据的是原本就存在的Data布线区123,因此并不会增加信号走线在非显示区12内占据的区域,不会影响显示面板10的窄边框设计。
在本申请中,所述VDD走线121的走向和Data布线区123的形状顺应异形显示区111的形状而变化,使得走线区尽可能贴近异形显示区111,从而减小非显示区12的面积,这也有利于实现显示面板10的窄边框设计。例如,本申请可以设计VDD走线121的延伸方向与Data布线区123的外边缘走向尽可能贴合,以此使得显示面板10的边框尽可能窄。另外,包括VDD走线121和多条导通走线124在内的信号走线可依据空间进行最优化设计。
请继续参阅图2,一条导通走线124连接一列像素112,在异形显示区111内,VDD走线121将显示信号按照预定时序传递给各条导通走线124,继而传输至对应连接的像素112。
为了减少导通走线124的数量并以此降低布线的复杂度,一条导通走线124也可以连接多列像素112。例如,一条导通走线124连接两列像素112,在异形显示区111内,VDD走线121将显示信号按照预定时序传递给各条导通走线124,继而传输至对应连接的像素112,具体可以通过解复用电路来实现显示信号的时序控制,解复用电路导通并控制显示信号传输给某一导通走线124所连接的一列像素112时,该解复用电路关闭,并不将显示信号传输给该条导通走线124所连接的其他列像素112,这是本领域的技术人员公知的,不再赘述。当然,一条导通走线124还可以连接两列以上像素112。
导通走线124可以为采用Mo(钼)、Cu(铜)等金属或合金制成的单层结构,也可以为采用导电材料制成的多层叠加结构。为了控制线路阻抗,本申请应尽量选用阻抗较低的材料来制成导通走线124。
所述导通走线124优选地与像素112的驱动晶体管Tdr的源极位于同一层,进一步两者的制造材料可以相同。于此,本申请可以在形成驱动晶体管Tdr的源极的制程中一并形成前述导通走线124,从而不会增加整个显示面板10的制程。
请一并参阅图2和图4,所述显示面板10包括由多个层堆叠而成的阵列基板,VDD走线121和数据线122位于阵列基板的同一层中,多条导通走线124和VDD走线121位于阵列基板的不同层中,多条导通走线124可以设置于多条数据线122的上层(如图4所示)或下层,但所述多条导通走线124和多条数据线122之间设置有电绝缘层41。具体地,本申请可以通过一道光罩制程形成VDD走线121和数据线122,然后在 Data布线区123的投影区域内形成一层电绝缘层41,该电绝缘层41开设有暴露VDD走线121的过孔,再通过一道光罩制程形成导通走线124,形成导通走线124的导电材料沉积于所述过孔中并与VDD走线121连接。其中,所述多条导通走线124和VDD走线121的制造材料可以相同,以此能够有利于控制横向线路阻抗。
请继续参阅图1和图2,位于规则显示区外围的非显示区12可以称之为直边区,而位于异形显示区111外围的非显示区12可以称之为异形区,所述直边区内也设置有多条VDD走线,前述异形显示区111外围(即非显示区12内)的VDD走线121和所述直边区的VDD走线可以通过同一道光罩制程形成。
请继续参阅图2,显示面板10还可以包括第一静电保护组件21和第二静电保护组件22,第一静电保护组件21与VDD走线121连接,第二静电保护组件22与第一静电保护组件21在显示面板10上的投影至少部分重叠。
其中,第一静电保护组件21和第二静电保护组件22并非位于同一层,两者之间设置有绝缘层,于此,第一静电保护组件21和第二静电保护组件22通过夹设于两者之间的绝缘层形成一电容。该电容外突起于VDD走线121,产生尖峰效应,从而使得第一静电保护组件21与第二静电保护组件22可以将产生在VDD走线121和导通走线124中的至少之一上的静电引导释放。因此,第一静电保护组件21与第二静电保护组件22用于将产生在VDD走线121和导通走线124中的至少之一上的静电导引至第一静电保护组件21与第二静电保护组件22所在区域处引爆。
第一静电保护组件21和第二静电保护组件22为显示面板10提供了静电保护功能。第一静电保护组件21和第二静电保护组件22将显示面板10上产生的静电导引至第一静电保护组件与第二静电保护组件所在区域处引爆,从而减少静电对显示面板10造成损害。
具体的,第一静电保护组件21可以从VDD走线121的一端延伸而来,而第二静电保护组件22的延伸方向垂直于VDD走线121的延伸方向。
第一静电保护组件21与VDD走线121电连接,且第一静电保护组件21与VDD走线121设置在同一层中,本申请优选第一静电保护组件 21为VDD走线121的一部分,于此,两者可以由同一制程形成,从而不会额外增加制程。而第二静电保护组件22优选地与导通走线124设置在同一层中但与导通走线124间隔设置,于此,本实施例可以由同一制程形成第二静电保护组件22与导通走线124。
应该理解,本申请前述实施例的显示面板10还包括其他结构,例如,所述显示面板10还可以包括封装区,前述走线区设置于栅极驱动区和封装区之间,封装区与走线区贴合,用于保护显示面板10。具体地,封装区通常布置在非显示区的最外侧,用于隔离水汽和氧气,避免水汽和氧气对显示面板10内的驱动电路和走线结构造成不良影响,保证显示面板10的正常工作。
另外,本申请并不限定显示面板10的类型,例如显示面板10可以为OLED(OrganicLight-Emitting Diode,有机发光二极管)显示面板,基于LTPS(Low Temperature Poly-silicon,低温多晶硅)、PSVA (Polymer-stabilized Vertical Alignment,聚合物稳定垂直配向)、或者 MVA(Multi-domain Vertical Alignment,多畴垂直配向)技术的液晶显示面板,也可以为柔性触控显示面板。并且,相对于电阻式触控显示面板,电容式触控显示面板具有寿命长、透光率高、可支持多点触控等优点,所述显示面板10可以为电容式触控显示面板。
本申请还提供一种显示器,所述显示器包括驱动电路以及显示面板,所述驱动电路电性耦接显示面板的数据线和VDD走线。该显示面板可以具有与前述任一实施例的显示面板10相同的结构设计,因此具有与其相同的有益效果。
所述显示器包括但不限于智能手机、PDA(Personal Digital Assistant,个人数字助理或平板电脑)等移动终端,以及佩戴于肢体或者嵌入于衣物、首饰、配件中的可穿戴设备。
应理解,本申请中的术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。“多个”的含义是至少两个,例如两个,三个等,除非另有明确具体的限定。本申请实施例中所有方向性指示(诸如上、下、左、右、前、后……)仅用于解释在某一特定姿态(如附图所示)下各部元件之间的相对位置关系、运动情况等,如果该特定姿态发生改变时,则该方向性指示也相应地随之改变。
再次说明,以上所述仅为本申请的实施例,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,例如各实施例之间技术特征的相互结合,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。

Claims (9)

1.一种显示面板,包括异形显示区及位于所述异形显示区内的阵列排布的像素,其特征在于,在所述异形显示区外围的非显示区内,排布有多条数据线,一条VDD走线和多条导通走线,每条数据线与对应的像素电连接,所述多条导通走线将所述一条VDD走线与对应的像素电连接,用于缩小所述异形显示区和规则显示区内像素所接收的电流差异;
所述多条数据线形成Data布线区,所述一条VDD走线位于所述Data布线区的外围,所述导通走线跨过所述Data布线区并与所述多条数据线电绝缘。
2.根据权利要求1所述的显示面板,其特征在于,所述显示面板包括由多个层堆叠而成的阵列基板,所述多条导通走线和所述VDD走线位于所述阵列基板的不同层中。
3.根据权利要求2所述的显示面板,其特征在于,所述VDD走线和所述多条数据线位于所述阵列基板的同一层中,所述多条导通走线和所述多条数据线之间设置有电绝缘层。
4.根据权利要求2所述的显示面板,其特征在于,所述导通走线为单层结构或多层叠加结构。
5.根据权利要求2所述的显示面板,其特征在于,所述多条导通走线和所述VDD走线的制造材料相同。
6.根据权利要求5所述的显示面板,其特征在于,所述VDD走线的走向和所述Data布线区的形状顺应所述异形显示区的形状而变化。
7.根据权利要求1所述的显示面板,其特征在于,所述显示面板还包括直边区,所述直边区设置有VDD走线,所述异形显示区外围的VDD走线和所述直边区的VDD走线电联通。
8.根据权利要求1所述的显示面板,其特征在于,所述显示面板为柔性显示面板。
9.一种显示器,其特征在于,所述显示器包括驱动电路以及如上述权利要求1~8任一项所述的显示面板,所述驱动电路电性耦接所述显示面板的数据线和VDD走线。
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