CN109714907A - A kind of production method of the multi-layer PCB for 5G communication - Google Patents
A kind of production method of the multi-layer PCB for 5G communication Download PDFInfo
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- CN109714907A CN109714907A CN201811548909.5A CN201811548909A CN109714907A CN 109714907 A CN109714907 A CN 109714907A CN 201811548909 A CN201811548909 A CN 201811548909A CN 109714907 A CN109714907 A CN 109714907A
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Abstract
The invention discloses a kind of production methods of multi-layer PCB for 5G communication, wherein, using special hole metallization mode, it carries out hole metallization process twice or extends time of hole metallization, solve the problems, such as to form continuous layers of copper due to using the plate of RO-4730 series to cause to be unfavorable for hole wall；By the way of plating of turning around, the uniformity of plate face copper thickness is improved, spacing accuracy is improved, ensure that requirement of the amplitude for spacing consistency；The present invention is to compensate processing after the completion of plating according to actual measurement copper thickness, ensure that in plate face the figure spacing i.e. consistency of line width everywhere；The present invention uses positioning datum point when making with a positioning hole as inner figure and outer graphics, ensure that interlayer alignment precision reaches 0.02mm.
Description
Technical field
The present invention relates to the technical field of PCB production, the production method of especially a kind of multi-layer PCB for 5G communication.
Background technique
The fabrication processing of conventional multi-layer PCB is followed successively by, sawing sheet, internal layer drilling, internal layer hole metallization and plating, interior
Layer pattern, etching, pressing, holes drilled through, through-hole hole metallization and plating, outer graphics, etching, welding resistance, surface coating.
Compared to 4G technology, 5G product turns to multi-layer PCB structure from the two panel construction of 4G product.This is in PCB design, system
New production process and control parameter are just introduced during making.For example, for multi-layer PCB, typical control parameter it
One is exactly the interlayer alignment of figure, and interlayer alignment generates conclusive influence for the phase difference of product.This interlayer alignment
It is required that being easily controlled for dual platen, it is only necessary to relevant device is introduced, but in the manufacturing process of multi-layer PCB,
Since the size harmomegathus and lamination accuracy by plate itself are influenced, lead to the aligning accuracy between outer graphics and inner figure
Aligning accuracy between difference and adjacent inner figure is poor.
In addition, when multi-layer PCB of the production of the plate for using RO-4730 series for 5G communication, due to RO-4730
Contain special pearl filler in the plate of series, after piercing, pearl is easy to fall off, occurs cavity in hole wall, unfavorable
Continuous layers of copper is formed in hole wall, recess layers of copper defect occurs so as to cause hole wall.
Summary of the invention
In order to overcome above-mentioned defect in the prior art, the present invention provides a kind of production of multi-layer PCB for 5G communication
Method solves the problems, such as to form continuous layers of copper due to using the plate of RO-4730 series to cause to be unfavorable for hole wall, using falling
The mode of head plating compensates processing according to actual measurement copper thickness to improve the uniformity of plate face copper thickness to guarantee to scheme everywhere in plate face
Shape spacing, that is, line width consistency uses same a positioning hole as the positioning datum point of graphic making to guarantee to make interlayer alignment smart
Degree reaches 0.02mm.
To achieve the above object, the present invention uses following technical scheme, comprising:
A kind of production method of the multi-layer PCB for 5G communication, comprising the following specific steps
S1 drills to inner plating, and carries out hole metallization to the drilling of inner plating and the drilling is electroplated；
S2 makes inner figure to inner plating, and is etched to inner plating；
S3, lamination carry out hole metallization and plating to the pcb board holes drilled through after lamination, and to the through-hole；
S4 makes outer graphics to lamina rara externa, and is etched to lamina rara externa；
S5 successively carries out subsequent process flow, comprising: silk-screen welding resistance and character, chemical plating stannum, electrical testing, shape add
Work；
Wherein, R0- is all made of for production plate, that is, inner plating of the multi-layer PCB of 5G communication and the lamina rara externa
The plate of 4730 series.
In step S1 and step S3, when drilling to inner plating and through-hole carry out hole metallization, hole to inner plating and logical
Hole carries out hole metallization process twice, or the time of hole metallization is extended, and be extended for the 1.5 of the conventional hole metallization time
~2 times.
In step S2 and step S4, when in inner figure there are when ten or more high pitch requirements, then it is right in plating
Inner plating is by the way of plating of turning around；When in outer graphics there are when ten or more high pitch requirements, then in plating, externally
Laminate is by the way of plating of turning around；The high pitch requirements are that the spacing between figure is required to be less than 0.1mm；
And after the completion of plating, the tolerance of the figure spacing of the figure spacing and outer graphics of the inner figure is
0.01mm。
After inner plating and lamina rara externa plating are completed, the actual measurement copper for collecting different zones on inner plating and lamina rara externa is thick,
And processing is compensated according to actual measurement copper thickness.
When actual measurement copper thickness is 0.04mm~0.05mm, offset 30um；When actual measurement copper thickness is 0.05mm~0.06mm, benefit
Repaying value is 40um；When actual measurement copper thickness is 0.06mm~0.07mm, offset 50um.
In step S1, when inner plating is drilled, including location hole is bored；The location hole is pin hole or contraposition octal.
In step S2 and step S4, the positioning datum point of the positioning datum point and production shape that make inner figure is all made of
The location hole, and spacing between the location hole and inner figure and between the location hole and outer graphics between
Away from being all larger than 20mm.
In step S2 and step S4, inner plating and lamina rara externa are using the location hole as positioning datum point, using LDI equipment
That is exposure sources are exposed operation, after the completion of exposing operation, AOI equipment, that is, detection device are used to carry out test pattern, it is desirable that
Deviation between outer graphics and positioning datum point is less than 0.007mm, and requires between inner figure and positioning datum point
Deviation is less than 0.007mm, to guarantee that interlayer alignment precision difference has reached 0.02mm.
It is described to be laminated to press plate using prepreg in step S3；And before pressing, by prepreg into
Row miller processing, makes on prepreg relative to there is a hole at the position of location hole, and the diameter in the hole is more straight than location hole
The big 1mm of diameter.
The present invention has the advantages that
(1) when carrying out hole metallization processing to inner plating and lamina rara externa, be all made of special hole metallization mode, i.e., into
It goes hole metallization process twice or extension hole metallization time, to guarantee that hole wall can form continuous layers of copper, to will not cause
Open circuit, reduces to various telecommunications signals, such as phase, the adverse effect of standing wave.
(2) in electroplating process, by the way of plating of turning around, the uniformity for improving plate face copper thickness mentions in etching process
High spacing accuracy, to guarantee requirement of the amplitude for spacing consistency.
(3) inner plating and lamina rara externa acquire the actual measurement copper of different zones on inner plating and lamina rara externa after plating
Thickness, and processing is compensated according to actual measurement copper thickness, to guarantee in plate face the figure spacing i.e. consistency of line width everywhere.
(4) interlayer alignment precision for the multi-layer PCB of 5G communication requires to reach 0.02mm；And the present invention is in production internal layer
When figure and production outer graphics formula is all made of same a positioning hole as positioning datum point, and between figure and positioning datum point
Deviation is less than 0.007mm, therefore ensure that the essence of the contraposition between outer graphics and inner figure and between adjacent inner figure
Degree is that interlayer alignment precision difference has reached 0.02mm.
(5) miller processing is carried out to prepreg, to guarantee in bonding processes, prepreg will not flow to location hole
In, to guarantee that the resolution of location hole when the production of outer graphics will not decline.
Detailed description of the invention
Fig. 1 is a kind of method flow diagram of the production method of multi-layer PCB for 5G communication of the invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Multi-layer PCB in the present embodiment for the production using the plate of RO-4730 series for 5G communication；The RO-
The plate of 4730 series possesses the machinery and electric property of antenna designers' needs.And the method system provided according to the present embodiment
The multi-layer PCB for 5G communication made can satisfy 5G product about special requirements such as phase, amplitudes.
As shown in Figure 1, a kind of production method of the multi-layer PCB for 5G communication, comprising the following specific steps
S1, blanking, the blanking are that plate is cut into required size.
S2 drills to inner plating, and the drilling includes location hole；The location hole makes internal layer as inner plating
Positioning datum point when figure；The location hole is pin hole or contraposition octal；Between between the location hole and inner figure
Away from greater than 20mm.
S3 carries out hole metallization processing to inner plating, and the hole metallization processing uses two ways, the first is to carry out
Hole metallization process twice；Be for second the time of hole metallization is extended, and be extended for the conventional hole metallization time 1.5~
2 times.
S4 carries out electroplating processes to inner plating, due to existing in the figure of the multi-layer PCB for 5G communication of the invention
A large amount of high pitch requirements, the high pitch requirements are to require the spacing between figure to be less than 0.1mm, therefore deposit when in inner figure
In ten or more high pitch requirements, then in electroplating processes, to inner plating by the way of plating of turning around；And it is completed in plating
Afterwards, the tolerance of the figure spacing of the inner figure is 0.01mm.
S5, the actual measurement copper for acquiring different zones on inner plating is thick, i.e., respectively to the practical copper in the different zones of inner plating
Thickness measures, and compensates processing according to actual measurement copper thickness.
S6 makes inner figure, concrete mode on inner plating are as follows: inner plating removes oxide on surface and oil through pre-treatment
After the sundries such as stain, in inner plating Double-face adhesive dry film, the point using the location hole in step S2 as positioning datum is using LDI equipment
Exposure sources are exposed operation, stand 10~15 minutes after exposing operation, carry out development treatment, and examine using AOI, that is, optics
Measurement equipment is detected, and guarantees that the deviation between inner figure and positioning datum point is less than 0.007mm, the inner plating warp after development
Peracidity etches to obtain inner figure.
S7, pressing, is pressed plate using prepreg, and before pressing, prepreg is carried out miller processing, half
Position in cured sheets relative to location hole is drilled with a hole, and the diameter in the hole is 1mm bigger than the diameter of location hole.
S8, to the plate holes drilled through after pressing.
S9 carries out hole metallization processing to lamina rara externa, and the hole metallization processing uses two ways, the first is to carry out
Hole metallization process twice；Be for second the time of hole metallization is extended, and be extended for the conventional hole metallization time 1.5~
2 times.
S10 carries out electroplating processes to lamina rara externa, due to depositing in the figure of the multi-layer PCB for 5G communication of the invention
In a large amount of high pitch requirements, the high pitch requirements are to require the spacing between figure to be less than 0.1mm, therefore work as in outer graphics
There are when ten or more high pitch requirements, then in electroplating processes, to lamina rara externa by the way of plating of turning around；And it is being electroplated
Cheng Hou, the tolerance of the figure spacing of the outer graphics are 0.01mm.
S11, the actual measurement copper for acquiring different zones on lamina rara externa is thick, i.e., respectively to the practical copper in the different zones of lamina rara externa
Thickness measures, and compensates processing according to actual measurement copper thickness
S12 makes outer graphics, concrete mode on lamina rara externa are as follows: lamina rara externa through pre-treatment removal oxide on surface and
After the sundries such as grease stain, dry film is pasted on lamina rara externa, the equally point using the location hole in step S2 as positioning datum, and the positioning
Spacing between datum mark outer graphics is exposed operation, exposing operation using LDI equipment, that is, exposure sources also greater than 20mm
Stand 10~15 minutes afterwards, carry out development treatment, and detected using AOI, that is, optical detection apparatus, guarantee outer graphics with
Deviation between positioning datum point is less than 0.007mm, and the lamina rara externa after development obtains outer graphics by acid etching.
S13 prints welding resistance and character, concrete mode are as follows: plate prints welding resistance through super roughening treatment after, after print welding resistance, through preliminary drying,
Lettering accords with after exposure, development, carries out drying and processing again after lettering symbol.
S14, chemical plating stannum, obtaining a layer thickness in welding resistance windowed regions after chemical plating stannum is 0.8~1.2um tin layers.
S15, sharp processing, the sharp processing refers to is processed according to required size, obtains single products.
Wherein, the multi-layer PCB for 5G communication of the invention using the production of the plate of RO-4730 series, i.e., it is described interior
Laminate and the lamina rara externa are all made of the plate of R0-4730 series.
Due to containing special pearl filler in the plate of RO-4730 series, after piercing, pearl is easy to fall off,
Occur cavity in hole wall, is unfavorable for hole wall and forms continuous layers of copper, recess layers of copper defect occur so as to cause hole wall, therefore in step
In rapid S3 and step S9, when carrying out hole metallization processing to inner plating and lamina rara externa, it has been all made of special hole metallization mode,
It carries out hole metallization process twice or extends the hole metallization time, to guarantee that hole wall can form continuous layers of copper.
And in step S3, when inner plating carries out hole metallization processing, the location hole can carry out hole metallization can also be with
Without hole metallization.In the present embodiment, in order to guarantee the efficiency of hole metallization, therefore location hole is done at hole metallization together
Reason.
In step S6 and step S12, due to being all made of same positioning with production outer graphics formula when making inner figure
As positioning datum point, and during making inner figure and outer graphics, inner figure and outer graphics are required in hole
Deviation between positioning datum point is less than 0.007mm, therefore ensure that between outer graphics and inner figure and adjacent interior
Aligning accuracy, that is, interlayer alignment precision difference between layer pattern has reached 0.02mm.
In step S4 and step S10, when inner plating and lamina rara externa carry out electro-coppering thickening, by the way of degree of turning around plating,
To guarantee the uniformity of plate face copper thickness, and guarantee that plate face copper thickness difference is less than 10um, in etching process, improves spacing essence
Degree, to guarantee requirement of the amplitude for spacing consistency.
In step S5 and step S11, inner plating and lamina rara externa after plating, are acquired on inner plating and lamina rara externa not
Actual measurement copper with region is thick, and compensates processing according to actual measurement copper thickness, to guarantee in plate face the i.e. line width of figure spacing everywhere
Consistency；The compensation deals are to cause line width to become smaller, therefore in engineering department since copper side can generate lateral erosion when etching
Line width is done greatly some when reason, plays the role of offsetting lateral erosion, the compensation deals of traditional approach are before making plank
It is carried out according to theoretical copper thickness.
And different actual measurement copper thickness corresponds to different offsets, shown in table 1 specific as follows:
| Survey the range of copper thickness | Offset |
| 0.04mm~0.05mm | 30um |
| 0.05mm~0.06mm | 40um |
| 0.06mm~0.07mm | 50um |
Table 1
In step S7, miller processing is carried out to prepreg, to guarantee in bonding processes, prepreg will not flow to fixed
In the hole of position, to guarantee that the resolution of location hole when the production of outer graphics will not decline.
The above is only the preferred embodiments of the invention, are not intended to limit the invention creation, all in the present invention
Made any modifications, equivalent replacements, and improvements etc., should be included in the guarantor of the invention within the spirit and principle of creation
Within the scope of shield.
Claims (9)
1. a kind of production method of the multi-layer PCB for 5G communication, which is characterized in that comprising the following specific steps
S1 drills to inner plating, and carries out hole metallization to the drilling of inner plating and the drilling is electroplated；
S2 makes inner figure to inner plating, and is etched to inner plating；
S3, lamination carry out hole metallization and plating to the pcb board holes drilled through after lamination, and to the through-hole；
S4 makes outer graphics to lamina rara externa, and is etched to lamina rara externa；
S5 successively carries out subsequent process flow, comprising: silk-screen welding resistance and character, chemical plating stannum, electrical testing, sharp processing；
Wherein, R0-4730 system is all made of for production plate, that is, inner plating of the multi-layer PCB of 5G communication and the lamina rara externa
The plate of column.
2. a kind of production method of multi-layer PCB for 5G communication according to claim 1, which is characterized in that step S1
In step S3, when drilling and through-hole to inner plating carry out hole metallization, hole and through-hole to inner plating carry out two secondary aperture gold
Categoryization process, or the time of hole metallization is extended, and be extended for 1.5~2 times of the conventional hole metallization time.
3. a kind of production method of multi-layer PCB for 5G communication according to claim 1, which is characterized in that step S2
In step S4, when in inner figure there are when ten or more high pitch requirements, then in plating, to inner plating using turning around
The mode of plating；When in outer graphics there are when ten or more high pitch requirements, then in plating, to lamina rara externa using turning around to plate
Mode；The high pitch requirements are that the spacing between figure is required to be less than 0.1mm；
And after the completion of plating, the tolerance of the figure spacing of the figure spacing and outer graphics of the inner figure is
0.01mm。
4. a kind of production method of multi-layer PCB for 5G communication according to claim 3, which is characterized in that in internal layer
After plate and lamina rara externa plating are completed, the actual measurement copper for collecting different zones on inner plating and lamina rara externa is thick, and thick according to actual measurement copper
Compensate processing.
5. a kind of production method of multi-layer PCB for 5G communication according to claim 4, which is characterized in that work as actual measurement
Copper thickness is 0.04mm~0.05mm, offset 30um；When actual measurement copper thickness is 0.05mm~0.06mm, offset 40um；When
Actual measurement copper thickness is 0.06mm~0.07mm, offset 50um.
6. a kind of production method of multi-layer PCB for 5G communication according to claim 1, which is characterized in that step S1
In, when inner plating is drilled, including bore location hole；The location hole is pin hole or contraposition octal.
7. a kind of production method of multi-layer PCB for 5G communication according to claim 6, which is characterized in that step S2
In step S4, the positioning datum point of the positioning datum point and production shape that make inner figure is all made of the location hole, and
The spacing between spacing and the location hole and outer graphics between the location hole and inner figure is all larger than 20mm.
8. a kind of production method of multi-layer PCB for 5G communication according to claim 7, which is characterized in that step S2
In step S4, inner plating and lamina rara externa are carried out using the location hole as positioning datum point using LDI equipment, that is, exposure sources
Exposing operation after the completion of exposing operation, uses AOI equipment, that is, detection device to carry out test pattern, it is desirable that outer graphics and positioning
Deviation between datum mark is less than 0.007mm, and the deviation between inner figure and positioning datum point is required to be less than
0.007mm, to guarantee that interlayer alignment precision difference has reached 0.02mm.
9. a kind of production method of multi-layer PCB for 5G communication according to claim 6, which is characterized in that step S3
In, it is described to be laminated to press plate using prepreg；And before pressing, prepreg is subjected to miller processing, is made
Relative to there is a hole at the position of location hole on prepreg, and the diameter in the hole is 1mm bigger than the diameter of location hole.
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Cited By (4)
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| CN110112058A (en) * | 2019-05-13 | 2019-08-09 | 广东冠锋科技股份有限公司 | A kind of production method of 5G communications reception and the encapsulation of transmitting antenna module |
| CN110798963A (en) * | 2019-09-24 | 2020-02-14 | 惠州市金百泽电路科技有限公司 | Control method for amplitude consistency of 5G antenna PCB |
| CN113347807A (en) * | 2021-05-31 | 2021-09-03 | 深圳市深联电路有限公司 | Method for manufacturing same-hole different-net and double-sided contact pin back plate |
| CN114727518A (en) * | 2022-04-22 | 2022-07-08 | 广德通灵电子有限公司 | Four-layer circuit board manufacturing process with high circuit alignment precision |
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