CN109524373B - Three-dimensional active heat dissipation packaging structure of embedded micro-channel and manufacturing process thereof - Google Patents
Three-dimensional active heat dissipation packaging structure of embedded micro-channel and manufacturing process thereof Download PDFInfo
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- CN109524373B CN109524373B CN201811374347.7A CN201811374347A CN109524373B CN 109524373 B CN109524373 B CN 109524373B CN 201811374347 A CN201811374347 A CN 201811374347A CN 109524373 B CN109524373 B CN 109524373B
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Abstract
The invention relates to a three-dimensional active heat dissipation packaging structure of an embedded micro-channel and a manufacturing process thereof, belonging to the technical field of integrated circuit packaging. The three-dimensional active heat dissipation packaging structure comprises a three-dimensional packaging structure; the three-dimensional packaging structure top layer is equipped with miniflow channel chip constitutional unit, miniflow channel chip constitutional unit is including embedding miniflow channel structure's IC chip and miniflow channel apron the three-dimensional packaging structure bottom is equipped with two-dimensional heterogeneous integrated structure unit, two-dimensional heterogeneous integrated structure unit includes TSV keysets and IC chip through array bump and underfill layer connection, miniflow channel chip constitutional unit passes through array bump and underfill layer with two-dimensional heterogeneous integrated structure unit and is connected, finally forms three-dimensional initiative heat dissipation packaging structure with embedding miniflow channel base plate/shell encapsulation. The invention can greatly reduce the interlayer thermal resistance of the three-dimensional packaging system, effectively improve the heat dissipation capacity of the circuit, realize high-density and high-performance three-dimensional system-in-package, and is safe and reliable.
Description
Technical Field
The invention relates to a three-dimensional packaging structure, in particular to a three-dimensional active heat dissipation packaging structure of an embedded micro-channel and a manufacturing process thereof, belonging to the technical field of integrated circuit packaging.
Background
With the increasing integration, power consumption and size of modern electronic chips, rapidly increasing chip system heating has become a significant challenge in advanced electronic chip system development and application. Generally, the failure rate of the device increases exponentially along with the temperature of the device, and the reliability of the device is reduced by 5% when the temperature of the device increases by 1 ℃ at the level of 70-80 ℃. Especially in three-dimensional packaging systems, thermal management issues are not negligible because: (1) a plurality of chips are often integrated in a three-dimensional packaging system, the number of transistors is large, the heat productivity is large, but the whole packaging area is not increased, so that the three-dimensional packaging system has higher heat density; (2) the chips are packaged by three-dimensional lamination, heat dissipation is not facilitated, and the heat dissipation of the chips positioned at the bottom and the middle of the lamination is more difficult; (3) for a three-dimensional assembly structure, the copper conductor part is surrounded by structures such as an insulating layer, a chip, a substrate and the like, so that heat generated by the chip is difficult to dissipate. These factors cause the temperature of the chip to increase rapidly.
The conventional heat dissipation methods mainly include heat conduction, convection, micro-jet cooling, radiation, phase change refrigeration and the like, but the corresponding equipment volume and efficiency of the heat dissipation methods are not satisfactory. Especially when the power density of the system is higher than 100W/cm2These thermal management methods are not at all applicable. The active heat dissipation technology of the micro-channel is to integrate the micro-channel in a chip or a substrate, to take away heat generated by the chip during working by utilizing the flowing of fluid working media, and the equivalent heat transfer coefficient of the active heat dissipation technology is far greater than that of some traditional heat conduction materials (aluminum, copper, silver and the like), so that the device can be ensured to work at a proper temperature. Therefore, in order to meet the development requirements of high performance and high heat dissipation of a three-dimensional microelectronic system, it is urgently needed to develop a three-dimensional active heat dissipation package structure of an embedded micro-channel.
Disclosure of Invention
The invention aims to overcome the defect of the heat dissipation level of a three-dimensional packaging system in the prior art, and provides a three-dimensional active heat dissipation packaging structure of an embedded micro-channel and a manufacturing process thereof.
According to the technical scheme provided by the invention, the three-dimensional active heat dissipation packaging structure of the embedded micro-channel is characterized in that: the micro-channel chip structure unit is arranged on the top layer of the three-dimensional packaging structure and comprises an IC chip embedded into the micro-channel structure and a micro-channel cover plate, the bottom layer of the three-dimensional packaging structure is provided with a two-dimensional heterogeneous integrated structure unit, the two-dimensional heterogeneous integrated structure unit comprises a TSV adapter plate and an IC chip, and the TSV adapter plate is connected with the IC chip through a rewiring layer; the micro-channel chip structure unit is connected with the two-dimensional heterogeneous integrated structure unit through the array salient points and the bottom filling layer, and finally, the micro-channel chip structure unit and the two-dimensional heterogeneous integrated structure unit are packaged with the embedded micro-channel substrate and the packaging shell to form a three-dimensional active heat dissipation packaging structure, and electric signals are led out through an array external leading-out end embedded in the surface of the micro-channel substrate.
Furthermore, the micro-channel chip structure unit is formed by directly manufacturing a micro-channel structure on the back of the IC chip substrate and bonding the micro-channel structure with the micro-channel cover plate.
Further, the material of the micro flow channel cover plate is silicon or glass.
Further, the material of the micro flow channel-embedded substrate is ceramic or organic resin.
The manufacturing process of the three-dimensional active heat dissipation packaging structure of the embedded micro-channel is characterized by comprising the following steps of:
(1) manufacturing a micro-nano scale micro-channel structure on the back of a top functional chip of the three-dimensional packaging structure to obtain an IC chip embedded with the micro-channel structure; bonding a micro-channel cover plate on the surface of the IC chip embedded into the channel structure by a wafer-level bonding process, and sealing the micro-channel to obtain a micro-channel chip structure unit;
(2) manufacturing a TSV adapter plate through a conventional TSV process, and integrally integrating the TSV adapter plate structure and a bottom IC chip of a three-dimensional packaging structure through a wafer level fan-out packaging process to manufacture a two-dimensional heterogeneous integrated structure unit; signal interconnection between the TSV adapter plate and the IC chip is achieved through rewiring on the upper surface and the lower surface of the two-dimensional heterogeneous integrated structure unit, and signal interconnection between the three-dimensional packaging structure is achieved through array bumps;
(3) the obtained embedded micro-channel chip unit and the two-dimensional heterogeneous integrated structure unit are interconnected up and down through a bump interconnection process to obtain a three-dimensional integrated structure; the top layer unit comprises a micro-channel structure, and the bottom layer unit comprises a TSV structure;
(4) and finally, packaging the obtained three-dimensional integrated structure, the embedded micro-channel substrate and the packaging shell by a bump interconnection process and a conventional cap sealing process, and leading out a packaging circuit signal by an array external leading-out terminal to obtain the three-dimensional active heat dissipation packaging structure of the embedded micro-channel.
Further, in the step (1), the micro-channel structure is directly manufactured on the back of the functional chip substrate through a deep reactive ion etching process, so that active heat dissipation of the chip scale is realized, and the micro-channel cover plate comprises a micro-fluid inlet and outlet through hole structure.
The invention has the following advantages:
(1) the micro-channel structure with the size of micron level is directly integrated on the back of the functional chip, and the coolant is introduced to take away the heat productivity of the chip active area (especially the hot spot area), and the short-distance heat dissipation mode is a direct and efficient chip-level active heat dissipation mode, thereby eliminating the interface thermal resistance existing in the traditional heat dissipation mode;
(2) the micro-channel structure with the size at the submicron or millimeter level is directly embedded in the substrate, and the coolant is introduced to take away the heat of the bottom chip of the three-dimensional packaging system, so that the substrate-level active heat dissipation method is a direct and efficient substrate-level active heat dissipation method, the equivalent thermal resistance of the packaging substrate is greatly reduced, and the multi-dimensional and multi-scale heat management of the three-dimensional packaging system is realized;
(3) the TSV adapter plate and the functional chip are integrated into a whole, so that the three-dimensional integration function of the functional chip can be achieved, meanwhile, the TSV can be used as a heat transfer channel, a certain heat dissipation effect is achieved, and the heat dissipation capacity of a three-dimensional system is improved.
Drawings
FIGS. 1 to 7 are process flow diagrams of typical examples of the three-dimensional active heat dissipation package structure of the embedded micro flow channel according to the present invention; wherein:
FIG. 1 is a schematic diagram of an IC chip wafer with a micro-channel structure embedded on the back surface.
FIG. 2 is a schematic view of a microchannel cover plate wafer with through-holes for microfluidic access.
FIG. 3 is a schematic diagram of a micro flow channel chip structure unit cut out.
Fig. 4 is a schematic diagram of a two-dimensional heterogeneous integrated structure unit with redistribution layers formed on both sides.
Fig. 5 is a schematic diagram of two-dimensional heterogeneous integrated structural unit upper and lower surface manufacturing display bumps.
Fig. 6 is a schematic diagram of a three-dimensional interconnection structure of an embedded micro flow channel chip unit and a two-dimensional heterogeneous integrated structure unit.
FIG. 7 is a schematic diagram of a three-dimensional active heat dissipation package structure of the embedded micro flow channel according to the present invention.
Description of reference numerals: the chip comprises a 1-three-dimensional packaging structure, a 2-micro-channel chip structure unit, a 3-micro-channel structure embedded IC chip, a 4-micro-channel cover plate, a 5-two-dimensional heterogeneous integrated structure unit, a 6-rewiring layer, a 7-TSV adapter plate, an 8-IC chip, 9-array bumps, a 10-bottom filling layer, an 11-embedded micro-channel substrate, a 12-packaging shell and a 13-array external leading-out end.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
As shown in fig. 7, the three-dimensional active heat dissipation package structure of the embedded micro flow channel of the present invention includes a three-dimensional package structure 1; a micro-channel chip structure unit 2 is arranged on the top layer of the three-dimensional packaging structure 1, an IC chip 3 and a micro-channel cover plate 4 which are embedded into the micro-channel structure are arranged in the micro-channel chip structure unit 2, a two-dimensional heterogeneous integrated structure unit 5 is arranged on the bottom layer of the three-dimensional packaging structure 1, a TSV adapter plate 7 and an IC chip 8 are arranged in the two-dimensional heterogeneous integrated structure unit 5, and the TSV adapter plate 7 and the IC chip 8 are connected through a rewiring layer 6; the micro-channel chip structure unit 2 is connected with the two-dimensional heterogeneous integrated structure unit 5 through the array salient points 9 and the bottom filling layer 10, and finally packaged with the embedded micro-channel substrate 11 and the packaging shell 12 to form a three-dimensional active heat dissipation packaging structure, and electric signals are led out through an array external leading-out end 13 embedded in the surface of the micro-channel substrate 11.
The invention discloses a preparation method of a three-dimensional packaging structure based on an embedded micro-channel, which comprises the following steps:
the method comprises the following steps: providing a wafer of an IC chip, wherein the substrate material of the wafer of the IC chip comprises but is not limited to materials such as silicon, gallium arsenide and the like, and manufacturing a micro-channel structure with the pitch and the depth-width ratio meeting the design requirements by adopting a conventional deep reactive ion etching process on the back surface of the wafer to obtain an IC chip 3 embedded in the micro-channel structure, as shown in figure 1;
step two: providing a cover plate wafer, wherein the cover plate wafer is made of materials including but not limited to silicon, glass and the like, and a conventional deep reactive ion etching process or a laser drilling process is adopted to manufacture a microfluid inlet and outlet through hole with the diameter meeting the design requirement on the cover plate wafer to obtain a microchannel cover plate 4, as shown in figure 2;
step three: assembling the obtained IC chip 3 embedded with the micro-channel structure and the micro-channel cover plate 4 by adopting a wafer-level bonding process, and intercepting the micro-channel chip structure unit 2 with a corresponding size by adopting a standard scribing process, as shown in FIG. 3;
step four: a conventional TSV process is adopted to manufacture a TSV adapter plate 7, the obtained TSV adapter plate 7 and a three-dimensional packaging structure bottom layer IC chip 8 are integrated in an integrated mode through a wafer level fan-out packaging process to manufacture a two-dimensional heterogeneous integrated structure unit 5, a rewiring layer 6 is manufactured on the upper surface and the lower surface of the two-dimensional heterogeneous integrated structure unit 5 through photoetching but not limited to photoetching processes, and the TSV adapter plate 7 and the IC chip 8 are electrically connected as shown in fig. 4;
step five: manufacturing array bumps 9 on the upper surface and the lower surface of the obtained two-dimensional heterogeneous integrated structural unit 5 by adopting a conventional ball planting process or an electroplating process, as shown in fig. 5; the array bump material comprises but is not limited to copper, tin-lead, tin-silver-copper and other materials;
step six: the three-dimensional interconnection of the embedded micro flow channel chip unit 3 and the two-dimensional heterogeneous integrated structure unit 5 is realized by adopting a bump interconnection process and an underfill process, as shown in fig. 6; the bump interconnection process includes but is not limited to reflow soldering, hot-press soldering and other processes;
step seven: packaging the obtained three-dimensional integrated structure with a customized embedded micro-channel substrate 11 and a packaging shell 12 by adopting a bump interconnection process and a conventional cap sealing process to obtain a three-dimensional active heat dissipation packaging structure 1 of the embedded micro-channel, and preparing an array signal external leading-out terminal 13 by a conventional ball/column planting process, as shown in fig. 7; the micro-channel embedded substrate material includes but is not limited to ceramic, organic resin and the like, and the array bump material includes but is not limited to tin-lead, tin-silver-copper and the like.
Claims (6)
1. A three-dimensional active heat dissipation packaging structure of an embedded micro-channel is characterized in that: the micro-channel chip structure comprises a three-dimensional packaging structure (1), wherein a micro-channel chip structure unit (2) is arranged on the top layer of the three-dimensional packaging structure (1), the micro-channel chip structure unit (2) comprises an IC chip (3) embedded into the micro-channel structure and a micro-channel cover plate (4), a two-dimensional heterogeneous integrated structure unit (5) is arranged on the bottom layer of the three-dimensional packaging structure (1), the two-dimensional heterogeneous integrated structure unit (5) comprises a TSV adapter plate (7) and an IC chip (8), and the TSV adapter plate (7) and the IC chip (8) are connected through a rewiring layer (6); the micro-channel chip structure unit (2) is connected with the two-dimensional heterogeneous integrated structure unit (5) through the array salient points (9) and the bottom filling layer (10), and finally packaged with the embedded micro-channel substrate (11) and the packaging shell (12) to form a three-dimensional active heat dissipation packaging structure, and electric signals are led out through an array external leading-out end (13) embedded in the surface of the micro-channel substrate (11);
the micro-channel cover plate (4) is obtained by manufacturing micro-fluid inlet and outlet through holes on the cover plate wafer.
2. The three-dimensional active heat dissipation package structure of an embedded micro channel of claim 1, wherein: the micro-channel chip structure unit (2) is formed by directly manufacturing a micro-channel structure on the back of an IC chip substrate and bonding the micro-channel structure with a micro-channel cover plate (4).
3. The three-dimensional active heat dissipation package structure of embedded micro fluidic channel of claim 2, wherein: the micro-channel cover plate (4) is made of silicon or glass.
4. The three-dimensional active heat dissipation package structure of an embedded micro channel of claim 1, wherein: the material of the micro flow channel substrate (11) is ceramic or organic resin.
5. A manufacturing process of a three-dimensional active heat dissipation packaging structure of an embedded micro-channel is characterized by comprising the following steps:
(1) manufacturing a micro-nano scale micro-channel structure on the back of a top functional chip of the three-dimensional packaging structure to obtain an IC chip embedded with the micro-channel structure; bonding a micro-channel cover plate on the surface of the IC chip embedded into the channel structure by a wafer-level bonding process, and sealing the micro-channel to obtain a micro-channel chip structure unit;
the micro-channel cover plate (4) is obtained by manufacturing micro-fluid inlet and outlet through holes on a cover plate wafer;
(2) manufacturing a TSV adapter plate through a conventional TSV process, and integrally integrating the TSV adapter plate structure and a bottom IC chip of a three-dimensional packaging structure through a wafer level fan-out packaging process to manufacture a two-dimensional heterogeneous integrated structure unit; signal interconnection between the TSV adapter plate and the IC chip is achieved through rewiring on the upper surface and the lower surface of the two-dimensional heterogeneous integrated structure unit, and signal interconnection between the three-dimensional packaging structure is achieved through array bumps;
(3) the obtained embedded micro-channel chip unit and the two-dimensional heterogeneous integrated structure unit are interconnected up and down through a bump interconnection process to obtain a three-dimensional integrated structure; the top layer unit comprises a micro-channel structure, and the bottom layer unit comprises a TSV structure;
(4) and finally, packaging the obtained three-dimensional integrated structure, the embedded micro-channel substrate and the packaging shell by a bump interconnection process and a conventional cap sealing process, and leading out a packaging circuit signal by an array external leading-out terminal to obtain the three-dimensional active heat dissipation packaging structure of the embedded micro-channel.
6. The process of claim 5 for fabricating a three-dimensional active heat dissipation package structure for embedded micro fluidic channels, wherein: in the step (1), the micro-channel structure is directly manufactured on the back of the functional chip substrate through a deep reactive ion etching process, so that active heat dissipation of the chip scale is realized, and the micro-channel cover plate comprises a micro-fluid inlet and outlet through hole structure.
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| CN107240578B (en) * | 2017-07-21 | 2019-07-30 | 西安电子科技大学 | Silicon carbide fluid channel radiator structure of three dimensional integrated circuits and preparation method thereof |
| CN108598062A (en) * | 2018-05-10 | 2018-09-28 | 中国电子科技集团公司第五十八研究所 | A kind of novel three-dimensional integrated encapsulation structure |
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