CN113327904B - Double-sided efficient heat-dissipation airtight packaging structure and preparation method thereof - Google Patents
Double-sided efficient heat-dissipation airtight packaging structure and preparation method thereof Download PDFInfo
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 107
- 230000017525 heat dissipation Effects 0.000 title claims abstract description 82
- 238000002360 preparation method Methods 0.000 title abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 107
- 239000007788 liquid Substances 0.000 claims abstract description 14
- 238000001816 cooling Methods 0.000 claims abstract description 8
- 230000010354 integration Effects 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 15
- 239000000919 ceramic Substances 0.000 claims description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- 229910052710 silicon Inorganic materials 0.000 claims description 12
- 239000010703 silicon Substances 0.000 claims description 12
- 238000003466 welding Methods 0.000 claims description 11
- 238000007789 sealing Methods 0.000 claims description 8
- SWPMTVXRLXPNDP-UHFFFAOYSA-N 4-hydroxy-2,6,6-trimethylcyclohexene-1-carbaldehyde Chemical compound CC1=C(C=O)C(C)(C)CC(O)C1 SWPMTVXRLXPNDP-UHFFFAOYSA-N 0.000 claims description 3
- 230000003321 amplification Effects 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 2
- 238000004377 microelectronic Methods 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 description 4
- 230000008054 signal transmission Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B1/00—Devices without movable or flexible elements, e.g. microcapillary devices
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
- B81C1/00055—Grooves
- B81C1/00063—Trenches
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
- B81C1/00055—Grooves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4871—Bases, plates or heatsinks
- H01L21/4882—Assembly of heatsink parts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3731—Ceramic materials or glass
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/467—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing gases, e.g. air
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
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Abstract
The invention relates to the technical field of microelectronic heat dissipation, and discloses a double-sided efficient heat dissipation airtight packaging structure and a preparation method thereof, wherein the packaging structure comprises the following components: the packaging structure comprises a heat dissipation micro-channel, a packaging substrate, a first chip, a second chip, a surrounding frame, a cover plate, a liquid cooling connector and an electric connector; the heat dissipation micro-flow channel and the surrounding frame are welded on the packaging substrate; the first chip is welded on the heat dissipation micro-channel, the second chip is welded on the packaging substrate, and the first chip and the second chip are both interconnected with the packaging substrate; the cover plate is welded on the surrounding frame and the packaging substrate respectively; the liquid cooling connector and the electric connector are welded at the bottom of the packaging substrate. The invention can realize the efficient heat dissipation of the high-power chip and the medium-power chip, so that the heat in the packaging structure is uniformly distributed.
Description
Technical Field
The invention relates to the technical field of microelectronic heat dissipation, in particular to a double-sided efficient heat dissipation airtight packaging structure and a preparation method thereof.
Background
In order to meet the application requirements of high density, high performance and high reliability of electronic equipment, the packaging structure of the microwave component is continuously developed towards miniaturization, high integration level and high air tightness. The traditional plane integration mode can not meet the requirements, components and parts are required to be integrated on the packaging substrate in double sides, and the integration density is doubled under the same area. In addition, as the GaN microwave power technology is mature gradually, the power density of the power chip is increased gradually, and the heat flow density of the power chip is also increased. Conventional passive heat dissipation techniques have failed to meet the heat dissipation requirements of microwave components and require the use of more efficient microfluidic enhanced heat dissipation techniques.
There are many patents on efficient heat dissipation structures and double-sided package structures: as chinese patent ZL201810601226.5 proposes a packaging method for implementing heat dissipation of a high-power GaN device based on a silicon-based micro-channel and multi-cavity structure, so as to implement high-density integration for microwave application; however, the patent is based on silicon substrate integration, has great technical difficulty and has high cost in medium and small batch processing. Another example is the method for manufacturing a double-sided cavity structure of an LTCC substrate proposed in chinese patent 202010160541.6; however, the patent does not relate to an embedded micro flow channel of the LTCC substrate, and the integrated integration of the LTCC micro flow channel and the silicon-based micro flow channel cannot solve the problem of efficient heat dissipation of the power chip.
How to construct a double-sided efficient heat dissipation airtight packaging structure for typical microwave multi-chip assembly application, and the requirements of airtight packaging of the assembly and electromagnetic compatibility of microwave signals are met while high heat flux density heat dissipation is achieved.
Disclosure of Invention
The invention aims to solve the problems that: aiming at the problems existing in the prior art, the invention provides the double-sided efficient heat-dissipation airtight packaging structure and the preparation method thereof, which realize efficient heat dissipation of a high-power chip and efficient heat dissipation of a medium-power chip on the premise of meeting the air tightness of the packaging structure, finally realize uniform heat distribution in the package and meet the electromagnetic compatibility requirement of microwave signal transmission.
The technical scheme adopted by the invention is as follows: a double-sided high-efficiency heat-dissipating hermetic package structure, comprising: the packaging structure comprises a heat dissipation micro-channel, a packaging substrate, a first chip, a second chip, a surrounding frame, a first cover plate, a second cover plate, a liquid cooling connector and an electric connector;
the heat dissipation micro-flow channel and the surrounding frame are welded on the packaging substrate;
the first chip is welded on the heat dissipation micro-channel, the second chip is welded on the packaging substrate, and the first chip and the second chip are both interconnected with the packaging substrate;
the first cover plate is welded on the surrounding frame, and the second cover plate is welded on the packaging substrate;
the liquid cooling connector and the electric connector are welded at the bottom of the packaging substrate.
The heat dissipation micro-channel is a high-efficiency heat dissipation silicon-based micro-channel, wherein the micro-channel is a micro-channel with small size and high depth-to-width ratio, the size of the micro-channel is 10-100 mu m, and the depth-to-width ratio of the micro-channel is more than or equal to 5:1; the heat radiation capability of the microfluid is closely related to the cross section size of the micro-flow channel, and the narrower the cross section width and the larger the depth-to-width ratio of the flow channel, the stronger the heat exchange capability of the micro-flow channel; meanwhile, the silicon-based MEMS processing technology adopts micro-nano processing technologies such as photoetching, dry etching and the like, so that the high-efficiency heat dissipation micro-channel with the cross section width of tens of micrometers and the depth-to-width ratio of more than 5:1 can be prepared, local high-efficiency heat dissipation is realized, and the high-efficiency heat dissipation capacity is 500W/cm 2 ～1000W/cm 2 。
The first chip is a high-power radio frequency chip and comprises a power amplifying chip and a switch chip; the second chip is a medium-and-small power chip and comprises all chips except a high-power amplifying chip and a high-power switch chip.
The packaging substrate is a ceramic packaging substrate with embedded micro-channels and double-sided cavity grooves, wherein the flow channels are micro-channels with medium and small sizes, the flow channel size is between 100 mu m and 3mm, the flow channel depth-to-width ratio is less than or equal to 3:1, the micro-channels with medium and small sizes are used for common heat dissipation of the second chip, and the common heat dissipation capacity is 50W/cm 2 ～150W/cm 2 。
The ceramic package substrate with the embedded micro-flow channels and the double-sided cavity grooves is an LTCC or HTCC ceramic package substrate, and the HTCC or the LTCC ceramic substrate can conveniently realize the millimeter-scale deep cavity grooves in a single substrate, so that the millimeter-scale cavity grooves can be prepared on the front side and the back side of the package substrate, and then the package substrate and the heat dissipation micro-flow channels are integrated into a whole, so that the requirement that the top of the power first chip needs to be reserved with a high-air cavity is met.
The top surface of the packaging substrate is provided with a deep cavity groove, the depth of the deep cavity groove on the top surface of the packaging substrate is 1.5-3 mm, and the deep cavity groove on the top surface of the packaging substrate is used for integrating a heat dissipation micro-channel; the bottom surface of the packaging substrate is provided with a short cavity groove, the depth of the short cavity groove on the bottom surface of the packaging substrate is between 0.5mm and 1mm, and the short cavity groove on the bottom surface of the packaging substrate is used for integrating a second chip.
The surrounding frame is a metal surrounding frame; the first cover plate and the second cover plate are both metal cover plates.
An airtight high-air cavity is arranged among the deep cavity groove on the top surface of the packaging substrate, the surrounding frame and the cover plate I, and the height of the airtight high-air cavity is 1-3 mm; an airtight short air cavity is arranged between the short cavity groove on the bottom surface of the packaging substrate and the second cover plate, and the height of the airtight short air cavity is between 0.5mm and 1 mm; in the multi-chip high-power microwave component, the top of the power amplification chip needs to reserve a high air cavity with the thickness of 1-3 mm, and the tops of the rest chips need to reserve a low air cavity with the thickness of hundreds of microns, so that the phenomena of abnormal output signals, self-excitation, burnout and the like of the chips are prevented.
The invention also discloses a preparation method of the double-sided efficient heat-dissipation airtight packaging structure, which comprises the following steps:
step 1: hermetically welding the heat dissipation micro-channel and the surrounding frame on the top surface of the packaging substrate;
step 2: welding the first chip on the heat dissipation micro-channel in a low thermal resistance integration mode;
step 3: interconnecting the first chip and the package substrate by bonding wires;
step 4: welding the cover plate I on the surrounding frame for air sealing cover;
step 5: welding the second chip on the packaging substrate by a low thermal resistance integration method;
step 6: then, the second chip is interconnected with the packaging substrate through the lead bonding wire;
step 7: the second cover plate is used for sealing the packaging substrate by an air sealing cover, so that a double-sided efficient heat dissipation airtight packaging structure is obtained;
step 8: the liquid-cooled connector and the electrical connector are soldered to the package substrate.
Compared with the prior art, the beneficial effects of adopting the technical scheme are as follows:
(1) And integrating the high-efficiency heat dissipation silicon-based micro-channel and the embedded micro-channel double-sided cavity groove ceramic package substrate. Synchronously preparing a deep cavity groove on the top surface of the packaging substrate, and combining a metal surrounding frame and a metal cover plate to realize a high-air cavity; and preparing a short cavity groove on the bottom surface of the packaging substrate, and combining a metal cover plate to realize a short air cavity. On the premise of meeting the air tightness of the packaging structure, the electromagnetic compatibility requirement of microwave signal transmission is met.
(2) The ceramic package substrate with the embedded medium-small size micro flow channel and double-sided cavity grooves is used as a common heat dissipation carrier of a shunt network and a medium-small power chip, and 50W/cm of the ceramic package substrate can be realized 2 ～150W/cm 2 Is provided; the high-efficiency heat dissipation silicon-based micro-channel embedded with micro-channels with small size and high aspect ratio is used as a high-efficiency heat dissipation carrier of a high-power radio frequency chip, so that 500W/cm can be realized 2 ～1000W/cm 2 Is provided. After the size and the structure of the two flow channels are respectively and optimally designed, the two flow channels are integrated on two sides, so that the high-power chip can efficiently dissipate heat, the medium-power chip and the small-power chip can efficiently dissipate heat, and finally, the heat in the package can be uniformly distributed.
(3) The technical advantages of the small-size and high-aspect-ratio micro-flow channels and the ceramic substrate laminated rear sintering process, which are realized by comprehensively utilizing the silicon-based micro-nano processing technology, are realized, and the comprehensive optimization of the cost, the heat dissipation capacity and the microwave performance is realized.
(4) The double-sided integration of more components can be realized by using one package substrate, the integration density is higher, and the integration process is simpler.
Drawings
Fig. 1 is a schematic cross-sectional view of the present invention.
Fig. 2 is a schematic cross-sectional view of a heat dissipation microchannel according to the present invention.
FIG. 3 is a schematic cross-sectional view of a package substrate according to the present invention.
Fig. 4 is a process flow diagram of the preparation method of the present invention.
Reference numerals: 1-a heat dissipation micro-channel; 2-packaging a substrate; 3-small-sized, high aspect ratio microchannels; 4-a micro-channel with medium and small size; 5-a first chip; 6-a first chip low thermal resistance integrated interface; 7-a second chip low thermal resistance integrated interface; 8-a second chip; 9-bonding wires; 10-surrounding frames; 11-cover plate I; 12-bonding pads; 13-a metal wiring layer in the package substrate; 14-packaging metal through holes in the substrate; 15-a liquid inlet/outlet I; 16-a liquid inlet/outlet II; 17-split network; 18-a liquid inlet/outlet III; 19-liquid-cooled connectors; a 20-electrical connector; 21-deep cavity grooves on the top surface of the packaging substrate; 22-packaging the bottom short cavity groove of the substrate; 23-cover plate II.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
As shown in fig. 1-3, a dual-sided efficient heat dissipation hermetic package structure includes: the heat dissipation micro-channel 1, the packaging substrate 2, the first chip 5, the second chip 8, the enclosure frame 10, the first cover plate 11, the second cover plate 23, the liquid cooling connector 19 and the electric connector 20;
the heat dissipation micro-channel 1 and the surrounding frame 10 are welded on the packaging substrate 2;
the first chip 5 is welded on the heat dissipation micro-channel 1, the second chip 8 is welded on the packaging substrate 2, and the first chip 5 and the second chip 8 are both interconnected with the packaging substrate 2;
the first cover plate 11 is welded on the enclosure frame 10, and the second cover plate 23 is welded on the packaging substrate 2;
the liquid-cooled connector 19 and the electric connector 20 are soldered to the bottom of the package substrate 2.
In a preferred embodiment, the heat dissipation micro-channel 1 is a high-efficiency heat dissipation silicon-based micro-channel, wherein the micro-channel is a micro-channel 3 with small size and high aspect ratio, the size of the micro-channel is 25 μm, and the aspect ratio of the micro-channel is 10:1.
In a preferred embodiment, the bottom of the heat dissipation micro-fluidic channel 1 is further provided with an inlet/outlet i 15.
In a preferred embodiment, the package substrate 2 is a ceramic package substrate with embedded micro-fluidic channels and double-sided cavities, wherein the size of the micro-fluidic channels is 500um, and the aspect ratio of the micro-fluidic channels is 1:1.
In a preferred embodiment, the top surface of the package substrate 2 is provided with a liquid inlet/outlet port ii 16, and the bottom surface is provided with a liquid inlet/outlet port iii 18; and the middle part of the packaging substrate is provided with a micro-channel 4 with a medium and small size, and meanwhile, both sides of the interior of the packaging substrate are also provided with a shunt network 17.
In a preferred embodiment, the first chip 5 comprises a power amplifying chip and a switching chip; the second chip 8 includes all chips except a high-power amplifying chip and a high-power switching chip.
In a preferred embodiment, the top surface of the packaging substrate 2 is provided with a deep cavity groove, the depth of the deep cavity groove 21 on the top surface of the packaging substrate is between 1.5mm and 3mm, and the deep cavity groove 21 on the top surface of the packaging substrate is used for integrating a heat dissipation micro-channel; the bottom surface of the packaging substrate 2 is provided with a short cavity groove, the depth of the short cavity groove 22 on the bottom surface of the packaging substrate is between 0.5mm and 1mm, and the short cavity groove on the bottom surface of the packaging substrate is used for integrating a second chip.
In a preferred embodiment, an airtight high-air cavity of 2mm at the top of the first chip 5 is formed among the cover plate I11, the deep cavity groove 21 at the top surface of the packaging substrate and the surrounding frame 10; an airtight low air cavity of 800um at the top of the second chip 8 is formed between the low cavity groove 22 at the bottom of the packaging substrate and the second cover plate 23.
It should be noted that the heat dissipation micro flow channel 1 is used for realizing 600W/cm of the first chip 2 Is used for high-efficiency heat dissipation; the packaging substrate 2 is used for realizing liquid supply of 1 heat dissipation micro-channel and 100W/cm of the second chip 2 Is a common heat sink.
It should be noted that, 1 or more heat dissipation micro-channels may be integrated on the deep cavity 21 on the top surface of the package substrate.
It should be noted that, the dual-sided high-efficiency heat dissipation airtight package structure uses the liquid cooling connector 19 and the electrical connector 20 to interconnect the outside.
As shown in fig. 4, a method for preparing the double-sided efficient heat dissipation airtight packaging structure is provided:
step 1: hermetically welding the heat dissipation micro-channel 1 and the surrounding frame 10 on the packaging substrate 2;
step 2: the first chip 5 is welded on the heat dissipation micro-channel 1 in a low thermal resistance integration mode;
step 3: interconnecting the first chip 5 and the package substrate 2 by bonding wires;
step 4: welding the first cover plate 11 on the surrounding frame 10 for air sealing cover;
step 5: the second chip 8 is welded on the packaging substrate 2 through a low thermal resistance integration method;
step 6: then the middle and small power chips 8 are interconnected with the packaging substrate 2 through bonding wires;
step 7: welding an air sealing cover on the packaging substrate 2 by using a cover plate II 23 to obtain a double-sided efficient heat dissipation airtight packaging structure;
step 8: the liquid-cooled connector 19 and the electrical connector 20 are soldered to the package substrate.
The invention is not limited to the specific embodiments described above. The invention extends to any novel one, or any novel combination, of the features disclosed in this specification, as well as to any novel one, or any novel combination, of the steps of the method or process disclosed. It is intended that insubstantial changes or modifications from the invention as described herein be covered by the claims below, as viewed by a person skilled in the art, without departing from the true spirit of the invention.
Claims (9)
1. The utility model provides a two-sided high-efficient heat dissipation airtight packaging structure which characterized in that includes: the packaging structure comprises a heat dissipation micro-channel, a packaging substrate, a first chip, a second chip, a surrounding frame, a first cover plate, a second cover plate, a liquid cooling connector and an electric connector;
the heat dissipation micro-flow channel and the surrounding frame are welded on the packaging substrate;
the first chip is welded on the heat dissipation micro-channel, the second chip is welded on the packaging substrate, and the first chip and the second chip are both interconnected with the packaging substrate;
the first cover plate is welded on the surrounding frame, and the second cover plate is welded on the packaging substrate;
the liquid cooling connector and the electric connector are welded at the bottom of the packaging substrate;
the heat dissipation micro-channel is a high-efficiency heat dissipation silicon-based micro-channel, and the packaging substrate is a ceramic packaging substrate with embedded micro-channels and double-sided cavity grooves; the deep cavity groove on the top surface of the packaging substrate is used for integrating a heat dissipation micro-channel; the low cavity groove on the bottom surface of the packaging substrate is used for integrating a second chip;
the high-efficiency heat dissipation silicon-based micro-channel and the embedded micro-channel double-sided cavity groove ceramic package substrate are integrated; the deep cavity groove on the top surface of the packaging substrate is combined with the metal surrounding frame and the metal cover plate to form a high-air cavity; the short cavity groove on the bottom surface of the packaging substrate is combined with the metal cover plate to form a short air cavity.
2. The double-sided efficient heat-dissipation airtight packaging structure according to claim 1, wherein the heat-dissipation micro-channels are efficient heat-dissipation silicon-based micro-channels, wherein the micro-channels are small-size high-aspect-ratio micro-channels, the size of the micro-channels is 10-100 mu m, and the aspect ratio of the micro-channels is more than or equal to 5:1.
3. The double-sided efficient heat-dissipation airtight packaging structure according to claim 2, wherein the first chip is a high-power radio frequency chip, and comprises a power amplification chip and a switch chip; the second chip is a medium-and-small power chip and comprises all chips except a high-power amplifying chip and a high-power switch chip.
4. The double-sided efficient heat-dissipation airtight packaging structure according to claim 3, wherein the packaging substrate is an embedded micro-channel double-sided cavity groove ceramic packaging substrate, the channels are micro-channels with medium and small sizes, the channel size is between 100 mu m and 3mm, and the depth-to-width ratio of the channels is less than or equal to 3:1.
5. The dual-sided high-efficiency heat-dissipating hermetic package of claim 4, wherein the embedded micro-fluidic channel dual-sided cavity-slot ceramic package substrate is an LTCC or HTCC ceramic package substrate.
6. The double-sided efficient heat-dissipation airtight packaging structure according to claim 5, wherein the top surface of the packaging substrate is provided with a deep cavity groove, and the depth of the deep cavity groove on the top surface of the packaging substrate is 1.5-3 mm; the bottom surface of the packaging substrate is provided with a short cavity groove, and the depth of the short cavity groove on the bottom surface of the packaging substrate is between 0.5mm and 1 mm.
7. The double-sided efficient heat-dissipation airtight packaging structure of claim 6, wherein the enclosure is a metal enclosure; the first cover plate and the second cover plate are both metal cover plates.
8. The double-sided efficient heat-dissipation airtight packaging structure according to claim 7, wherein an airtight high-air cavity with the height of 1-3 mm is arranged among the deep cavity groove on the top surface of the packaging substrate, the surrounding frame and the cover plate I; and an airtight low air cavity with the height of 0.5-1 mm is arranged between the low cavity groove on the bottom surface of the packaging substrate and the second cover plate.
9. A method for preparing a double-sided efficient heat-dissipation airtight packaging structure, which is characterized in that the method is used for manufacturing the efficient heat-dissipation airtight packaging structure as claimed in any one of claims 1 to 8, and comprises the following steps:
step 1: hermetically welding the heat dissipation micro-channel and the surrounding frame on the top surface of the packaging substrate;
step 2: welding the first chip on the heat dissipation micro-channel in a low thermal resistance integration mode;
step 3: interconnecting the first chip and the package substrate by bonding wires;
step 4: welding the cover plate I on the surrounding frame for air sealing cover;
step 5: welding the second chip on the packaging substrate by a low thermal resistance integration method;
step 6: then, the second chip is interconnected with the packaging substrate through bonding wires;
step 7: the second cover plate is used for sealing the packaging substrate by an air sealing cover, so that a double-sided efficient heat dissipation airtight packaging structure is obtained;
step 8: the liquid-cooled connector and the electrical connector are soldered to the package substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110471099.3A CN113327904B (en) | 2021-04-29 | 2021-04-29 | Double-sided efficient heat-dissipation airtight packaging structure and preparation method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110471099.3A CN113327904B (en) | 2021-04-29 | 2021-04-29 | Double-sided efficient heat-dissipation airtight packaging structure and preparation method thereof |
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| CN113327904A CN113327904A (en) | 2021-08-31 |
| CN113327904B true CN113327904B (en) | 2023-06-02 |
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