CN113327904A - Double-sided efficient heat dissipation airtight packaging structure and preparation method thereof - Google Patents

Double-sided efficient heat dissipation airtight packaging structure and preparation method thereof Download PDF

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CN113327904A
CN113327904A CN202110471099.3A CN202110471099A CN113327904A CN 113327904 A CN113327904 A CN 113327904A CN 202110471099 A CN202110471099 A CN 202110471099A CN 113327904 A CN113327904 A CN 113327904A
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heat dissipation
channel
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double
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CN113327904B (en
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张剑
卢茜
向伟玮
岳帅旗
曾策
董东
陈春梅
赵明
叶惠婕
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CETC 29 Research Institute
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/46Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
    • H01L23/473Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B1/00Devices without movable or flexible elements, e.g. microcapillary devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00055Grooves
    • B81C1/00063Trenches
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00055Grooves
    • B81C1/00071Channels
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4871Bases, plates or heatsinks
    • H01L21/4882Assembly of heatsink parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3731Ceramic materials or glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/46Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
    • H01L23/467Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing gases, e.g. air
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Materials Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Ceramic Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The invention relates to the technical field of microelectronic heat dissipation, and discloses a double-sided efficient heat dissipation airtight packaging structure and a preparation method thereof, wherein the packaging structure comprises: the heat dissipation micro-channel comprises a heat dissipation micro-channel, a packaging substrate, a first chip, a second chip, a surrounding frame, a cover plate, a liquid cooling connector and an electric connector; the heat dissipation micro-channel and the enclosure frame are welded on the packaging substrate; the first chip is welded on the heat dissipation micro-channel, the second chip is welded on the packaging substrate, and the first chip and the second chip are both interconnected with the packaging substrate; the cover plate is respectively welded on the enclosing frame and the packaging substrate; the liquid cooling connector and the electric connector are welded at the bottom of the packaging substrate. The invention can realize high-efficiency heat dissipation of the high-power chip and effective heat dissipation of the medium-small power chip, and ensures that the heat in the packaging structure is uniformly distributed.

Description

Double-sided efficient heat dissipation airtight packaging structure and preparation method thereof
Technical Field
The invention relates to the technical field of microelectronic heat dissipation, in particular to a double-sided efficient heat dissipation airtight packaging structure and a preparation method thereof.
Background
In order to meet the application requirements of high density, high performance and high reliability of electronic devices, the packaging structure of the microwave component is continuously developed towards miniaturization, high integration and high air tightness. The traditional plane integration mode can not meet the requirement, components need to be integrated on the two sides of the packaging substrate, and the integration density is doubled under the same area. In addition, due to the gradual maturity of the GaN microwave power technology, the power density of the power chip is gradually increased, and the heat flux density is also increased accordingly. The common passive heat dissipation technology cannot meet the heat dissipation requirement of the microwave component, and a more efficient microfluid enhanced heat dissipation technology needs to be adopted.
There are many existing patents relating to efficient heat dissipation structures and double-sided packaging structures: for example, the chinese patent ZL201810601226.5 proposes a packaging method for realizing heat dissipation of a high-power GaN device based on a silicon-based micro channel and a multi-cavity groove structure, thereby realizing high-density integration for microwave application; however, the patent is based on silicon substrate integration, the technical difficulty is high, and the cost is high during medium and small-batch processing. For another example, chinese patent 202010160541.6 proposes a method for manufacturing a double-sided cavity structure of an LTCC substrate; however, the patent does not relate to the micro flow channel embedded in the LTCC substrate and the integrated integration of the LTCC micro flow channel and the silicon-based micro flow channel, and the problem of efficient heat dissipation of the power chip cannot be solved.
How to construct a double-sided efficient heat dissipation airtight packaging structure for typical microwave multi-chip module application, which meets the requirements of module airtight packaging and microwave signal electromagnetic compatibility while realizing high heat flux density heat dissipation, is currently reported.
Disclosure of Invention
The invention aims to solve the problems that: aiming at the problems in the prior art, the invention provides a double-sided high-efficiency heat-dissipation airtight packaging structure and a preparation method thereof, which realize high-efficiency heat dissipation of a high-power chip and effective heat dissipation of a medium-small power chip on the premise of meeting the air tightness of the packaging structure, finally realize uniform distribution of heat in the package and simultaneously meet the electromagnetic compatibility requirement of microwave signal transmission.
The technical scheme adopted by the invention is as follows: a double-sided, high-efficiency, heat-dissipating, hermetic package structure, comprising: the heat dissipation micro-channel comprises a heat dissipation micro-channel, a packaging substrate, a first chip, a second chip, a surrounding frame, a first cover plate, a second cover plate, a liquid cooling connector and an electric connector;
the heat dissipation micro-channel and the enclosure frame are welded on the packaging substrate;
the first chip is welded on the heat dissipation micro-channel, the second chip is welded on the packaging substrate, and the first chip and the second chip are both interconnected with the packaging substrate;
the first cover plate is welded on the surrounding frame, and the second cover plate is welded on the packaging substrate;
the liquid cooling connector and the electric connector are welded at the bottom of the packaging substrate.
The heat dissipation micro-channel is a high-efficiency heat dissipation silicon-based micro-channel, wherein the channel is small in size, high in depth and wide in widthCompared with a micro-channel, the size of the channel is 10-100 mu m, and the depth-to-width ratio of the channel is more than or equal to 5: 1; the heat dissipation capacity of the microfluid is closely related to the cross section size of the flow channel of the microchannel, and the narrower the cross section width and the larger the depth-to-width ratio of the flow channel are, the stronger the heat exchange capacity of the microchannel is; meanwhile, the silicon-based MEMS processing technology adopts micro-nano processing technologies such as photoetching and dry etching, so that a high-efficiency heat-dissipation micro-channel with the section width of tens of microns and the depth-to-width ratio of more than 5:1 can be prepared, local high-efficiency heat dissipation is realized, and the high-efficiency heat dissipation capacity is 500W/cm2~1000W/cm2
The first chip is a high-power radio frequency chip and comprises a power amplification chip and a switch chip; the second chip is a middle-small power chip and comprises all chips except a high-power amplification chip and a high-power switch chip.
The packaging substrate is a ceramic packaging substrate with embedded micro-channels and double-sided cavities, the channels are medium-sized and small-sized micro-channels, the size of each channel is 100 mu m-3 mm, the depth-to-width ratio of each channel is less than or equal to 3:1, the medium-sized and small-sized micro-channels are used for common heat dissipation of the second chip, and the common heat dissipation capacity of the medium-sized and small-sized micro-channels is 50W/cm2~150W/cm2
The ceramic packaging substrate with the embedded micro-channel double-sided cavity groove is an LTCC or HTCC ceramic packaging substrate, and a millimeter-scale deep cavity groove can be conveniently realized in a single substrate by the HTCC or LTCC ceramic substrate, so that millimeter-scale cavity grooves can be prepared on the front side and the back side of the packaging substrate and are integrated with the heat dissipation micro-channel, and the requirement that a high-altitude air cavity needs to be reserved at the top of a first chip of power is met.
The top surface of the packaging substrate is provided with a deep cavity groove, the depth of the deep cavity groove on the top surface of the packaging substrate is between 1.5mm and 3mm, and the deep cavity groove on the top surface of the packaging substrate is used for integrating a heat dissipation micro-channel; the bottom surface of the packaging substrate is provided with a short cavity groove, the depth of the short cavity groove is 0.5-1 mm, and the short cavity groove is used for integrating a second chip.
The enclosure frame is a metal enclosure frame; the first cover plate and the second cover plate are both metal cover plates.
An airtight high-altitude air cavity is arranged among the deep cavity groove on the top surface of the packaging substrate, the surrounding frame and the first cover plate, and the height of the airtight high-altitude air cavity is between 1mm and 3 mm; an airtight short air cavity is arranged between the package substrate bottom surface short cavity groove and the second cover plate, and the height of the airtight short air cavity is 0.5-1 mm; in the multi-chip high-power microwave assembly, the top of a power amplification chip needs to be reserved with a high-altitude air cavity of 1-3 mm, and the tops of other chips need to be reserved with short air cavities of hundreds of micrometers, so that the phenomena of chip output signal abnormity, self-excitation, burning and the like are prevented.
The invention also discloses a preparation method of the double-sided efficient heat dissipation airtight packaging structure, which comprises the following steps:
step 1: hermetically welding the heat dissipation micro-channel and the enclosure frame on the top surface of the packaging substrate;
step 2: welding a first chip on the heat dissipation micro-channel in a low-thermal resistance integration mode;
and step 3: interconnecting the first chip and the package substrate by bonding wires;
and 4, step 4: welding the first cover plate on the enclosing frame to form a gas sealing cover;
and 5: welding a second chip on the packaging substrate by a low-thermal resistance integration method;
step 6: then, the second chip is connected with the packaging substrate through a lead bonding wire;
and 7: performing gas sealing cover by using the two pairs of packaging substrates of the cover plate to obtain a double-sided efficient heat dissipation airtight packaging structure;
and 8: and welding the liquid cooling connector and the electric connector on the packaging substrate.
Compared with the prior art, the beneficial effects of adopting the technical scheme are as follows:
(1) the high-efficiency heat-dissipation silicon-based micro-channel and the embedded micro-channel double-sided cavity groove ceramic packaging substrate are integrated. Synchronously preparing a deep cavity groove on the top surface of the packaging substrate, and combining the metal surrounding frame and the metal cover plate to realize an air cavity; and preparing a low cavity groove on the bottom surface of the packaging substrate, and combining a metal cover plate to realize a low air cavity. On the premise of meeting the air tightness of the packaging structure, the electromagnetic compatibility requirement of microwave signal transmission is met.
(2) Make itThe ceramic packaging substrate with the double-sided cavity groove embedded with the middle-small-sized micro-flow channel is used as a common heat dissipation carrier of a shunt network and a middle-small power chip, and 50W/cm can be realized2~150W/cm2The heat dissipation capacity of (1); the high-efficiency heat dissipation silicon-based micro-channel embedded with the micro-channel with small size and high depth-to-width ratio is used as a high-efficiency heat dissipation carrier of a high-power radio frequency chip, and 500W/cm can be realized2~1000W/cm2The heat dissipation capability of the heat sink. After the sizes and the structures of the two runners are respectively optimally designed, the two runners are integrated on two sides, high-power chips are efficiently radiated, middle-small power chips are effectively radiated, and finally the uniform distribution of heat in the package is realized.
(3) The technical advantages that the silicon-based micro-nano processing technology can prepare micro-channels with small size and high depth-to-width ratio and the sintering technology can prepare micro-channels with medium and small size and millimeter scale cavities after the ceramic substrate is laminated are comprehensively utilized, and the comprehensive optimization of cost, heat dissipation capability and microwave performance is realized.
(4) The double-sided integration of more components can be realized by using one packaging substrate, the integration density is higher, and the integration process is simpler.
Drawings
Fig. 1 is a schematic cross-sectional view of the present invention.
FIG. 2 is a cross-sectional view of a heat sink micro flow channel according to the present invention.
Fig. 3 is a schematic cross-sectional view of a package substrate according to the present invention.
FIG. 4 is a process flow diagram of a manufacturing process of the present invention.
Reference numerals: 1-heat dissipation micro-channel; 2-a package substrate; 3-micro flow channel with small size and high depth-width ratio; 4-medium and small size micro flow channel; 5-a first chip; 6-first chip low thermal resistance integration interface; 7-a second chip low thermal resistance integrated interface; 8-a second chip; 9-bonding wire; 10-enclosing a frame; 11-cover plate one; 12-a pad; 13-metal wiring layer in package substrate; 14-metal vias in package substrates; 15-inlet/outlet port i; 16-liquid inlet/outlet port II; 17-a shunt network; 18-inlet/outlet port iii; 19-liquid cooled connectors; 20-an electrical connector; 21-packaging the deep cavity groove on the top surface of the substrate; 22-low cavity groove on the bottom surface of the packaging substrate; 23-cover plate two.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
As shown in fig. 1-3, a double-sided high-efficiency heat-dissipating airtight package structure includes: the heat dissipation micro flow channel comprises a heat dissipation micro flow channel 1, a packaging substrate 2, a first chip 5, a second chip 8, a surrounding frame 10, a first cover plate 11, a second cover plate 23, a liquid cooling connector 19 and an electric connector 20;
the heat dissipation micro-channel 1 and the enclosure frame 10 are welded on the packaging substrate 2;
the first chip 5 is welded on the heat dissipation micro-channel 1, the second chip 8 is welded on the packaging substrate 2, and the first chip 5 and the second chip 8 are both interconnected with the packaging substrate 2;
the first cover plate 11 is welded on the enclosure frame 10, and the second cover plate 23 is welded on the packaging substrate 2;
the liquid-cooled connector 19 and the electrical connector 20 are soldered to the bottom of the package substrate 2.
In a preferred embodiment, the heat dissipation micro flow channel 1 is a high efficiency heat dissipation silicon-based micro flow channel, wherein the flow channel is a small-sized micro flow channel 3 with a high aspect ratio, the size of the flow channel is 25 μm, and the aspect ratio of the flow channel is 10: 1.
In a preferred embodiment, the bottom of the heat sink micro flow channel 1 is further provided with an inlet/outlet I15.
In a preferred embodiment, the package substrate 2 is an embedded micro-channel double-sided cavity ceramic package substrate, and the embedded micro-channel double-sided cavity ceramic package substrate has a channel size of 500um and a channel aspect ratio of 1: 1.
In a preferred embodiment, the top surface of the package substrate 2 is provided with a liquid inlet/outlet port ii 16, and the bottom surface is provided with a liquid inlet/outlet port iii 18; and the middle part of the packaging substrate is provided with a medium-small-sized micro-channel 4, and two sides in the packaging substrate are also provided with a shunt network 17.
In a preferred embodiment, the first chip 5 includes a power amplification chip and a switch chip; the second chip 8 includes all chips except the high-power amplifying chip and the high-power switch chip.
In a preferred embodiment, the top surface of the package substrate 2 is provided with a deep cavity groove, the depth of the deep cavity groove 21 on the top surface of the package substrate is between 1.5mm and 3mm, and the deep cavity groove 21 on the top surface of the package substrate is used for integrating a heat dissipation micro-channel; the bottom surface of the packaging substrate 2 is provided with a short cavity groove, the depth of the short cavity groove 22 on the bottom surface of the packaging substrate is 0.5 mm-1 mm, and the short cavity groove on the bottom surface of the packaging substrate is used for integrating a second chip.
In a preferred embodiment, an airtight high-air-space cavity with 2mm of the top of the first chip 5 is formed among the first cover plate 11, the deep cavity groove 21 on the top surface of the packaging substrate and the surrounding frame 10; an airtight short air cavity of 800um at the top of the second chip 8 is formed between the package substrate bottom short cavity groove 22 and the second cover plate 23.
It should be noted that the heat-dissipating micro flow channel 1 is used for realizing the first chip 600W/cm2The high-efficiency heat dissipation is realized; the packaging substrate 2 is used for realizing liquid supply of 1 heat dissipation micro-channel and 100W/cm second chip2The common heat dissipation.
It should be noted that 1 or more heat dissipation micro channels may be integrated on the deep cavity 21 on the top surface of the package substrate.
It should be noted that the double-sided, high-efficiency, heat-dissipating, hermetically sealed package structure uses liquid-cooled connectors 19 and electrical connectors 20 to interconnect the package to the outside.
As shown in fig. 4, a method for manufacturing the double-sided efficient heat dissipation airtight package structure is provided:
step 1: hermetically welding the heat dissipation micro-channel 1 and the enclosure frame 10 on the packaging substrate 21;
step 2: welding the first chip 5 on the heat dissipation micro-channel 1 in a low-thermal resistance integration mode;
and step 3: interconnecting the first chip 5 and the package substrate 2 by means of bonding wires;
and 4, step 4: welding the cover plate I11 on the enclosure frame 10 to form an air sealing cover;
and 5: welding the second chip 8 on the packaging substrate 2 by a low thermal resistance integration method;
step 6: then, the middle and small power chips 8 and the packaging substrate 2 are interconnected through bonding leads;
and 7: welding the air sealing cover on the packaging substrate 2 by using the second cover plate 23 to obtain a double-sided efficient heat dissipation airtight packaging structure;
and 8: the liquid-cooled connector 19 and the electrical connector 20 are soldered to the package substrate.
The invention is not limited to the foregoing embodiments. The invention extends to any novel one, or any novel combination, of the features disclosed in this specification and any novel one, or any novel combination, of the steps of any method or process so disclosed. Those skilled in the art to which the invention pertains will appreciate that insubstantial changes or modifications can be made without departing from the spirit of the invention as defined by the appended claims.

Claims (9)

1. The utility model provides a two-sided high-efficient heat dissipation airtight packaging structure which characterized in that includes: the heat dissipation micro-channel comprises a heat dissipation micro-channel, a packaging substrate, a first chip, a second chip, a surrounding frame, a first cover plate, a second cover plate, a liquid cooling connector and an electric connector;
the heat dissipation micro-channel and the enclosure frame are welded on the packaging substrate;
the first chip is welded on the heat dissipation micro-channel, the second chip is welded on the packaging substrate, and the first chip and the second chip are both interconnected with the packaging substrate;
the first cover plate is welded on the surrounding frame, and the second cover plate is welded on the packaging substrate;
the liquid cooling connector and the electric connector are welded at the bottom of the packaging substrate.
2. The double-sided high-efficiency heat-dissipation airtight package structure of claim 1, wherein the heat-dissipation micro-channel is a high-efficiency heat-dissipation silicon-based micro-channel, wherein the channel is a small-sized micro-channel with a high aspect ratio, the size of the channel is 10-100 μm, and the aspect ratio of the channel is greater than or equal to 5: 1.
3. The double-sided efficient heat dissipation hermetic package structure of claim 2, wherein the first chip is a high-power radio frequency chip comprising a power amplification chip and a switch chip; the second chip is a middle-small power chip and comprises all chips except a high-power amplification chip and a high-power switch chip.
4. The double-sided efficient heat dissipation airtight package structure of claim 3, wherein the package substrate is an embedded micro-channel double-sided cavity ceramic package substrate, wherein the channel is a medium-small sized micro-channel, the size of the channel is between 100 μm and 3mm, and the aspect ratio of the channel is less than or equal to 3: 1.
5. The double-sided efficient heat dissipation hermetic package structure of claim 4, wherein the micro flow channel embedded double-sided cavity ceramic package substrate is an LTCC or HTCC ceramic package substrate.
6. The double-sided efficient heat dissipation airtight package structure of claim 5, wherein the top surface of the package substrate has a deep cavity groove, the depth of the deep cavity groove is between 1.5mm and 3mm, and the deep cavity groove is used for integrating a heat dissipation micro channel; the bottom surface of the packaging substrate is provided with a short cavity groove, the depth of the short cavity groove is 0.5-1 mm, and the short cavity groove is used for integrating a second chip.
7. The double-sided efficient heat dissipation hermetic package structure of claim 6, wherein the enclosure frame is a metal enclosure frame; the first cover plate and the second cover plate are both metal cover plates.
8. The double-sided efficient heat dissipation airtight package structure of claim 7, wherein an airtight high-altitude cavity with a height of 1mm to 3mm is arranged between the deep cavity groove on the top surface of the package substrate, the enclosure frame and the first cover plate; an airtight short air cavity with the height of 0.5-1 mm is arranged between the short cavity groove on the bottom surface of the packaging substrate and the second cover plate.
9. A method for manufacturing a double-sided efficient heat dissipation airtight package structure, wherein the method is used for manufacturing the efficient heat dissipation airtight package structure as claimed in any one of claims 1 to 8, and comprises the following steps:
step 1: hermetically welding the heat dissipation micro-channel and the enclosure frame on the top surface of the packaging substrate;
step 2: welding a first chip on the heat dissipation micro-channel in a low-thermal resistance integration mode;
and step 3: interconnecting the first chip and the package substrate by bonding wires;
and 4, step 4: welding the first cover plate on the enclosing frame to form a gas sealing cover;
and 5: welding a second chip on the packaging substrate by a low-thermal resistance integration method;
step 6: then, the second chip is connected with the packaging substrate through a bonding lead;
and 7: performing gas sealing cover by using the two pairs of packaging substrates of the cover plate to obtain a double-sided efficient heat dissipation airtight packaging structure;
and 8: and welding the liquid cooling connector and the electric connector on the packaging substrate.
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Cited By (1)

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