WO2020248905A1 - Wafer-level 3d stacked microchannel heat dissipation structure and manufacturing method therefor - Google Patents

Wafer-level 3d stacked microchannel heat dissipation structure and manufacturing method therefor Download PDF

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WO2020248905A1
WO2020248905A1 PCT/CN2020/094542 CN2020094542W WO2020248905A1 WO 2020248905 A1 WO2020248905 A1 WO 2020248905A1 CN 2020094542 W CN2020094542 W CN 2020094542W WO 2020248905 A1 WO2020248905 A1 WO 2020248905A1
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bonding pad
chip
micro
channel
heat dissipation
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PCT/CN2020/094542
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French (fr)
Chinese (zh)
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曹立强
徐健
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上海先方半导体有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
    • H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices

Definitions

  • the present invention relates to the technical field of semiconductor devices. More specifically, the present invention relates to a wafer-level three-dimensional stacked micro-channel heat dissipation structure and a manufacturing method thereof.
  • the natural heat dissipation or cooling method does not require any external auxiliary energy to allow the electronic components themselves to cool down and dissipate heat.
  • the heat transfer methods mainly include heat conduction, convection and radiation.
  • This method is mainly suitable for the situation where the power required for the operation of the electronic components is small, and no heat sink is required, the temperature control requirements are not high, and the heat flux density of the device should not be too large.
  • liquid cooling methods need to be considered. Let the coolant directly contact the electronic components, and the heat is directly taken away by the coolant, and the purpose of cooling and heat dissipation can be achieved. For electronic components with high heat consumption volume and density or under high temperature environment, the heat dissipation method generally chooses this direct liquid cooling method.
  • a wafer-level three-dimensional stacked micro-channel heat dissipation structure including:
  • a substrate the front surface of the substrate has a first micro-channel bonding pad and a first signal bonding pad, and the substrate has at least two first through holes as inlets and outlets for the heat dissipation fluid;
  • the two micro-channel bonding pads correspond to the first micro-channel bonding pad and form a hermetic bond, so that the first micro-channel bonding pad and the second micro-channel bonding pad are formed
  • a first layer of liquid flow channels are formed in the sealing area, and the second signal bonding pads correspond to the first signal bonding pads and form electrical connections.
  • the first chip has at least two second layers for forming micro flow channels.
  • a through hole and a third through hole for signal connection the second through hole is respectively connected to the inlet and outlet of the heat dissipation fluid, the third through hole is electrically connected to the second signal bonding pad, and the second surface of the first chip There is a third micro-channel bonding pad and a third signal bonding pad, and the third signal bonding pad is electrically connected to the third through hole;
  • the second chip laminated on the first chip the first side of the second chip is opposite to the second side of the first chip, and the first side of the second chip has a fourth micro-channel bonding pad and a fourth signal Bonding pad, the fourth micro-channel bonding pad corresponds to the third micro-channel bonding pad, and forms a hermetic bond, so that the fourth micro-channel bonding pad and the third micro-channel bonding pad A second layer of liquid flow channel is formed in the sealing area formed by the bonding pad, and the fourth signal bonding pad corresponds to the third signal bonding pad and forms an electrical connection.
  • a conductive circuit is provided on the front surface of the substrate, and the conductive circuit is electrically connected to the first signal bonding pad.
  • the first micro-channel bonding pad, the second micro-channel bonding pad, the third micro-channel bonding pad, and the fourth micro-channel bonding pad are conductive Material or non-conductive material.
  • the inlet and the outlet are respectively communicated with the first layer liquid flow channel.
  • one end of the second through hole is in communication with the first layer of liquid channel, and the other end is in communication with the second layer of liquid channel.
  • the third through hole is filled with conductive metal.
  • the microfluid enters the first layer of liquid flow channel through the substrate from the inlet, then enters the second layer of liquid flow channel through the second through hole on the first chip, and then passes through the first chip.
  • the upper second through hole returns to the first layer of liquid flow channel, passes through the outlet and leaves the wafer-level three-dimensional stacked micro flow channel heat dissipation structure.
  • a method for manufacturing a wafer-level three-dimensional stacked micro-channel heat dissipation structure including:
  • the first chip and the second chip are pasted on the substrate.
  • the first chip and the second chip are bonded using a wafer bonding process.
  • the substrate material is an organic material, silicon-based, ceramic, or glass-based material.
  • FIG. 1 shows a schematic cross-sectional view of a wafer-level three-dimensional stacked micro-channel heat dissipation structure 300 according to an embodiment of the present invention.
  • FIGS. 2A to 2C show cross-sectional views of a manufacturing process of a wafer-level three-dimensional stacked micro-channel heat dissipation structure according to an embodiment of the present invention.
  • the traditional packaging structure adopts a heat dissipation structure with a heat dissipation cover and a fan, which is limited by the design requirements of the packaging structure, and the heat dissipation effect is limited, which is not suitable for high-power system requirements.
  • the present invention provides a three-dimensional stacked system packaging structure, the packaging size can be thinner, and the system packaging structure can be realized.
  • the package adopts a micro-channel design scheme, and the package has a heat dissipation channel on the overall three-dimensional structure, and the overall heat dissipation effect of the package is better.
  • This solution adopts a wafer-level stacking and bonding solution, and the packaging cost is more advantageous.
  • FIG. 1 shows a schematic cross-sectional view of a wafer-level three-dimensional stacked micro-channel heat dissipation structure 300 according to an embodiment of the present invention.
  • the wafer-level three-dimensional stacked microfluidic heat dissipation structure 300 includes a substrate 310, a first chip 320 stacked on the substrate 310, and a second chip 330 stacked on the first chip 320.
  • the substrate 310 has at least two through holes 311 and 312 as an inlet and an outlet for the heat dissipation fluid.
  • the front surface of the substrate 310 has a micro channel bonding pad 313 and a signal bonding pad 314.
  • the front surface of the substrate 310 may also be provided with a conductive circuit (not shown), and the conductive circuit is electrically connected to the signal bonding pad 314.
  • the first surface of the first chip 320 is opposite to the front surface of the substrate 310.
  • the first surface of the first chip 320 has a micro-channel bonding pad 321 and a signal bonding pad 322.
  • the micro-channel bonding pad 321 corresponds to the micro-channel bonding pad 313 and forms a sealed bond, so that the micro-channel bonding pad 321 and the micro-channel bonding pad 313 form a sealing area Form the first layer of liquid flow channels.
  • the signal bonding pad 322 corresponds to the signal bonding pad 314 and forms an electrical connection.
  • the first chip 320 has at least two through holes 323 and 324 for forming micro flow channels and at least one through hole 325 for signal connection.
  • the through holes 323 and 324 communicate with the inlet and outlet of the heat dissipation fluid, respectively.
  • the through hole 325 is electrically connected to the signal bonding pad 322.
  • the inlet and outlet, the through holes 323 and 324 are respectively communicated with the first layer liquid channel.
  • the second surface of the first chip 320 has a micro-channel bonding pad 326 and a signal bonding pad 327.
  • the signal bonding pad 327 is electrically connected to the through hole 325.
  • the first chip 320 may be various types of chips, for example, a processor chip, a memory chip, and so on.
  • the first surface of the second chip 330 is opposite to the second surface of the first chip 320.
  • the first surface of the second chip 330 has a micro channel bonding pad 331 and a signal bonding pad 332.
  • the micro-channel bonding pad 331 corresponds to the micro-channel bonding pad 326, and forms a sealing bond, so that the micro-channel bonding pad 331 and the micro-channel bonding pad 326 form a sealing area Form a second layer of liquid flow channels.
  • the signal bonding pad 332 corresponds to the signal bonding pad 327 and forms an electrical connection.
  • the second chip 330 is an ordinary chip and has no through holes for fluid to pass through.
  • the microfluid enters the first layer of liquid flow through the substrate from the inlet, then enters the second layer of liquid flow through one or more through holes on the first chip, and then passes through one or more through holes on the first chip.
  • the hole returns to the first layer of liquid flow channel, passes through the outlet to leave the package, and completes the flow of the microfluid in the package.
  • FIGS. 2A to 2C show cross-sectional views of a manufacturing process of a wafer-level three-dimensional stacked micro-channel heat dissipation structure according to an embodiment of the present invention.
  • TSV drilling is performed on the surface of the chip.
  • the TSV hole on the signal end is plated and filled. TSV holes in other areas are empty.
  • bonding pads 220 are designed and processed respectively.
  • the first chip 210 and the second chip 230 are bonded, and the second chip 230 is a normal chip without TSV holes.
  • the bonding uses a wafer bonding process.
  • the bonding of the signal terminal needs to use conductive materials, and the micro-channel bonding terminal can be made of conductive materials or non-conductive materials.
  • the substrate material can be an organic material or a silicon-based, ceramic, glass-based, or other material.
  • the above-mentioned embodiment of the present invention adopts a micro-channel design scheme, the package has a heat dissipation channel on the overall three-dimensional structure, and the overall heat dissipation effect of the package is better.
  • the package size can be made thinner, and the system packaging structure can be realized.
  • the invention adopts a wafer-level stacking and bonding scheme, and the packaging cost is more advantageous.

Abstract

A 3D stacked microchannel heat dissipation structure, comprising: a substrate (310), wherein a front face of the substrate (310) is provided with a first microchannel bonding pad (313) and a first signal bonding pad (314), and the substrate (310) is provided with at least two first through holes (311/312) acting as an inlet and an outlet of a heat dissipation fluid; a first chip (320) stacked on the substrate (310), wherein a first face of the first chip (320) is opposite the front face of the substrate (310), the first chip (320) is provided with at least two second through holes (323/324) used for forming micro-channels and a third through hole (325) used for signal connection, a second face of the first chip (320) is provided with a third microchannel bonding pad (326) and a third signal bonding pad (327), and the third signal bonding pad (327) and the third through hole (325) form an electrical connection; and a second chip (330) stacked on the first chip (320), wherein a first face of the second chip (330) is opposite the second face of the first chip (320), the first face of the second chip (330) is provided with a fourth microchannel bonding pad (331) and a fourth signal bonding pad (332), and the fourth signal bonding pad (332) and the third signal bonding pad (327) correspond to each other and form an electrical connection.

Description

一种晶圆级三维堆叠微流道散热结构及其制造方法Wafer-level three-dimensional stacked micro runner heat dissipation structure and manufacturing method thereof 技术领域Technical field
本发明涉及半导体器件技术领域，更具体而言，本发明涉及一种晶圆级三维堆叠微流道散热结构及其制造方法。The present invention relates to the technical field of semiconductor devices. More specifically, the present invention relates to a wafer-level three-dimensional stacked micro-channel heat dissipation structure and a manufacturing method thereof.
背景技术Background technique
随着电子产品多功能化和小型化的发展，高密度微电子组装技术在新一代电子产品上逐渐成为主流。在工业技术水平的发展下，人们对于电子元件的散热性能也提出了更为严格的要求,电子元件散热方式多种多样，需要综合考虑各类因素进行选取。通常电子元件的散热是通过周围的环境或散热器来实现的。可以通过下面的方法对电子元件的散热性能进行优化。With the development of multifunction and miniaturization of electronic products, high-density microelectronic assembly technology has gradually become the mainstream in the new generation of electronic products. With the development of industrial technology, people have also put forward more stringent requirements for the heat dissipation performance of electronic components. There are various heat dissipation methods for electronic components, and various factors need to be comprehensively considered for selection. Generally, the heat dissipation of electronic components is achieved through the surrounding environment or a radiator. The heat dissipation performance of electronic components can be optimized by the following methods.
如果从热回路的角度来分析电子元件的散热的情况，功耗等同于温差除以电热阻，热阻越大，电子元件的散热能力就越差，那么减少内热阻就成为电子元件散热设计的重要工作。自然散热或冷却的方法不需要借助任何外部的辅助能量，让电子元件本身实现降温散热。一般来讲，当采用自然散热的方法时，电子元件内部的局部发热器件会通过向周围环境的散热来达到控制温度的目的。其传热方式主要有导热、对流和辐射。这种方式主要适用于电子元件运行所需功率较小，不需要装配散热器的情况，对温度的控制要求不高，器件的热流密度不宜太大。但是针对热流密度较大的电子封装结构，需要考虑采用液体冷却的方法。让冷却剂直接与电子元件进行接触，热量直接被冷却剂带走，即可达到降温散热的目的。对于热耗体积和密度都很高或者高温环境下的电子元件，散热方法一般都选择这种直接的液体冷却法。If you analyze the heat dissipation of electronic components from the perspective of the thermal circuit, the power consumption is equivalent to the temperature difference divided by the electrical thermal resistance. The greater the thermal resistance, the worse the heat dissipation capability of the electronic component. Then reducing the internal thermal resistance becomes the heat dissipation design of the electronic component Important work. The natural heat dissipation or cooling method does not require any external auxiliary energy to allow the electronic components themselves to cool down and dissipate heat. Generally speaking, when the natural heat dissipation method is adopted, the local heating devices inside the electronic components will achieve the purpose of temperature control by dissipating heat to the surrounding environment. The heat transfer methods mainly include heat conduction, convection and radiation. This method is mainly suitable for the situation where the power required for the operation of the electronic components is small, and no heat sink is required, the temperature control requirements are not high, and the heat flux density of the device should not be too large. However, for electronic packaging structures with high heat flux density, liquid cooling methods need to be considered. Let the coolant directly contact the electronic components, and the heat is directly taken away by the coolant, and the purpose of cooling and heat dissipation can be achieved. For electronic components with high heat consumption volume and density or under high temperature environment, the heat dissipation method generally chooses this direct liquid cooling method.
对于芯片晶圆工艺，受限于芯片工艺及制作结构，很难在芯片内部增加散热结构，液体冷却法难以实现。For the chip wafer process, limited by the chip process and production structure, it is difficult to add a heat dissipation structure inside the chip, and the liquid cooling method is difficult to implement.
发明内容Summary of the invention
根据本发明的一个方面，提供一种晶圆级三维堆叠微流道散热结构，包括：According to one aspect of the present invention, there is provided a wafer-level three-dimensional stacked micro-channel heat dissipation structure, including:
基板，基板的正面具有第一微流道键合焊盘和第一信号键合焊盘，基板具有至少两个第一通孔作为散热流体的入口和出口；A substrate, the front surface of the substrate has a first micro-channel bonding pad and a first signal bonding pad, and the substrate has at least two first through holes as inlets and outlets for the heat dissipation fluid;
层叠在基板上的第一芯片，第一芯片的第一面与基板的正面相对，第一芯片的第一面上具有第二微流道键合焊盘和第二信号键合焊盘，第二微流道键合焊盘与第一微流道键合焊盘相对应，并形成密封键合，从而在第一微流道键合焊盘与第二微流道键合焊盘形成的密封区域内形成第一层液体流道，第二信号键合焊盘与第一信号键合焊盘相对应，并形成电连接，第一芯片具有至少两个用于形成微流道的第二通孔和用于信号连接的第三通孔，第二通孔分别与散热流体的入口和出口相连通，第三通孔与第二信号键合焊盘电连接，第一芯片的第二面上具有第三微流道键合焊盘和第三信号键合焊盘，第三信号键合焊盘与第三通孔形成电连接；以及The first chip laminated on the substrate, the first surface of the first chip is opposite to the front surface of the substrate, and the first surface of the first chip has the second micro-channel bonding pad and the second signal bonding pad. The two micro-channel bonding pads correspond to the first micro-channel bonding pad and form a hermetic bond, so that the first micro-channel bonding pad and the second micro-channel bonding pad are formed A first layer of liquid flow channels are formed in the sealing area, and the second signal bonding pads correspond to the first signal bonding pads and form electrical connections. The first chip has at least two second layers for forming micro flow channels. A through hole and a third through hole for signal connection, the second through hole is respectively connected to the inlet and outlet of the heat dissipation fluid, the third through hole is electrically connected to the second signal bonding pad, and the second surface of the first chip There is a third micro-channel bonding pad and a third signal bonding pad, and the third signal bonding pad is electrically connected to the third through hole; and
层叠在第一芯片上的第二芯片，第二芯片的第一面与第一芯片的第二面相对，第二芯片的第一面上具有第四微流道键合焊盘和第四信号键合焊盘，第四微流道键合焊盘与第三微流道键合焊盘相对应，并形成密封键合，从而在第四微流道键合焊盘与第三微流道键合焊盘形成的密封区域内形成第二层液体流道，第四信号键合焊盘与信号键合焊盘第三相对应，并形成电连接。The second chip laminated on the first chip, the first side of the second chip is opposite to the second side of the first chip, and the first side of the second chip has a fourth micro-channel bonding pad and a fourth signal Bonding pad, the fourth micro-channel bonding pad corresponds to the third micro-channel bonding pad, and forms a hermetic bond, so that the fourth micro-channel bonding pad and the third micro-channel bonding pad A second layer of liquid flow channel is formed in the sealing area formed by the bonding pad, and the fourth signal bonding pad corresponds to the third signal bonding pad and forms an electrical connection.
在本发明的一个实施例中，基板的正面设置有导电线路，所述导电线路与第一信号键合焊盘形成电连接。In an embodiment of the present invention, a conductive circuit is provided on the front surface of the substrate, and the conductive circuit is electrically connected to the first signal bonding pad.
在本发明的一个实施例中，第一微流道键合焊盘、第二微流道键合焊盘、第三微流道键合焊盘、第四微流道键合焊盘采用导电材料或非导电材料。In an embodiment of the present invention, the first micro-channel bonding pad, the second micro-channel bonding pad, the third micro-channel bonding pad, and the fourth micro-channel bonding pad are conductive Material or non-conductive material.
在本发明的一个实施例中，所述入口和出口分别与第一层液体流道连通。In an embodiment of the present invention, the inlet and the outlet are respectively communicated with the first layer liquid flow channel.
在本发明的一个实施例中，所述第二通孔的一端与第一层液体流道连通，另一端与第二层液体流道连通。In an embodiment of the present invention, one end of the second through hole is in communication with the first layer of liquid channel, and the other end is in communication with the second layer of liquid channel.
在本发明的一个实施例中，所述第三通孔内填充导电金属。In an embodiment of the present invention, the third through hole is filled with conductive metal.
在本发明的一个实施例中，微流体从入口穿过基板进入第一层液体流道，再穿过第一芯片上的第二通孔进入第二层液体流道，之后穿过第一芯片上的第二通孔返回第一层液体流道，穿过出口离开晶圆级三维堆叠微流道散热结构。In an embodiment of the present invention, the microfluid enters the first layer of liquid flow channel through the substrate from the inlet, then enters the second layer of liquid flow channel through the second through hole on the first chip, and then passes through the first chip. The upper second through hole returns to the first layer of liquid flow channel, passes through the outlet and leaves the wafer-level three-dimensional stacked micro flow channel heat dissipation structure.
根据本发明的另一个实施例，提供一种制造晶圆级三维堆叠微流道散热结构的方法，包括：According to another embodiment of the present invention, there is provided a method for manufacturing a wafer-level three-dimensional stacked micro-channel heat dissipation structure, including:
对第一芯片进行打孔，形成第二通孔和第三通孔，对第三孔进行电镀填孔；Drilling the first chip to form a second through hole and a third through hole, and electroplating and filling the third hole;
在第一芯片的第一面上形成第二微流道键合焊盘和第二信号键合焊盘；Forming a second micro-channel bonding pad and a second signal bonding pad on the first surface of the first chip;
在第一芯片的第二面上形成第三微流道键合焊盘和第三信号键合焊盘；Forming a third micro-channel bonding pad and a third signal bonding pad on the second surface of the first chip;
在第二芯片的第一面上形成第四微流道键合焊盘和第四信号键合焊盘；Forming a fourth micro-channel bonding pad and a fourth signal bonding pad on the first surface of the second chip;
将第一芯片与第二芯片进行键合；Bonding the first chip and the second chip;
对基板进行打孔形成散热流体的入口和出口；Punching the substrate to form the inlet and outlet of the heat dissipation fluid;
在基板的正面形成第一微流道键合焊盘和第一信号键合焊盘；Forming a first micro-channel bonding pad and a first signal bonding pad on the front surface of the substrate;
将第一芯片与第二芯片贴在基板上。The first chip and the second chip are pasted on the substrate.
在本发明的另一个实施例中，将第一芯片与第二芯片进行键合采用晶圆键合工艺。In another embodiment of the present invention, the first chip and the second chip are bonded using a wafer bonding process.
在本发明的另一个实施例中，基板材料为有机材料、硅基、陶瓷、玻璃基材料。In another embodiment of the present invention, the substrate material is an organic material, silicon-based, ceramic, or glass-based material.
附图说明Description of the drawings
为了进一步阐明本发明的各实施例的以上和其它优点和特征，将参考附图来呈现本发明的各实施例的更具体的描述。可以理解，这些附图只描绘本发明的典型实施例，因此将不被认为是对其范围的限制。在附图中，为了清楚明了，相同或相应的部件将用相同或类似的标记表示。In order to further clarify the above and other advantages and features of the embodiments of the present invention, a more specific description of the embodiments of the present invention will be presented with reference to the accompanying drawings. It will be understood that these drawings only depict typical embodiments of the present invention and therefore should not be considered as limiting its scope. In the drawings, for clarity, the same or corresponding components will be denoted by the same or similar symbols.
图1示出根据本发明的一个实施例的晶圆级三维堆叠微流道散热结构300的横截面示意图。FIG. 1 shows a schematic cross-sectional view of a wafer-level three-dimensional stacked micro-channel heat dissipation structure 300 according to an embodiment of the present invention.
图2A至2C示出根据本发明的一个实施例晶圆级三维堆叠微流道散热结构的制造过程的截面图。2A to 2C show cross-sectional views of a manufacturing process of a wafer-level three-dimensional stacked micro-channel heat dissipation structure according to an embodiment of the present invention.
具体实施方式Detailed ways
在以下的描述中，参考各实施例对本发明进行描述。然而，本领域的技术人员将认识到可在没有一个或多个特定细节的情况下或者与其它替换和/或附加方法、材料或组件一起实施各实施例。在其它情形中，未示出或未详细描述 公知的结构、材料或操作以免使本发明的各实施例的诸方面晦涩。类似地，为了解释的目的，阐述了特定数量、材料和配置，以便提供对本发明的实施例的全面理解。然而，本发明可在没有特定细节的情况下实施。此外，应理解附图中示出的各实施例是说明性表示且不一定按比例绘制。In the following description, the present invention is described with reference to various embodiments. However, those skilled in the art will recognize that the various embodiments may be implemented without one or more specific details or with other alternative and/or additional methods, materials or components. In other cases, well-known structures, materials, or operations are not shown or described in detail so as not to obscure aspects of the various embodiments of the present invention. Similarly, for the purpose of explanation, specific quantities, materials, and configurations are set forth in order to provide a thorough understanding of the embodiments of the present invention. However, the present invention can be implemented without specific details. In addition, it should be understood that the various embodiments shown in the drawings are illustrative representations and are not necessarily drawn to scale.
在本说明书中，对“一个实施例”或“该实施例”的引用意味着结合该实施例描述的特定特征、结构或特性被包括在本发明的至少一个实施例中。在本说明书各处中出现的短语“在一个实施例中”并不一定全部指代同一实施例。In this specification, reference to "one embodiment" or "the embodiment" means that a specific feature, structure, or characteristic described in conjunction with the embodiment is included in at least one embodiment of the present invention. The appearances of the phrase "in one embodiment" in various places in this specification do not necessarily all refer to the same embodiment.
传统封装结构采用增加散热盖及风扇的散热结构，其受限于封装结构的设计要求，散热效果有限，不适合大功率的系统要求。The traditional packaging structure adopts a heat dissipation structure with a heat dissipation cover and a fan, which is limited by the design requirements of the packaging structure, and the heat dissipation effect is limited, which is not suitable for high-power system requirements.
本发明提出一种三维堆叠的系统封装结构，其封装尺寸可以更薄，可实现系统封装结构。在本发明的实施例中，封装采用微流道设计方案，封装在整体三维结构上都有散热通道，封装整体散热效果更好。本方案采用晶圆级堆叠键合方案，封装成本更加有优势。The present invention provides a three-dimensional stacked system packaging structure, the packaging size can be thinner, and the system packaging structure can be realized. In the embodiment of the present invention, the package adopts a micro-channel design scheme, and the package has a heat dissipation channel on the overall three-dimensional structure, and the overall heat dissipation effect of the package is better. This solution adopts a wafer-level stacking and bonding solution, and the packaging cost is more advantageous.
图1示出根据本发明的一个实施例的晶圆级三维堆叠微流道散热结构300的横截面示意图。如图1所示，晶圆级三维堆叠微流道散热结构300包括基板310、层叠在基板310上的第一芯片320以及层叠在第一芯片320上的第二芯片330。基板310具有至少两个通孔311和312作为散热流体的入口和出口。FIG. 1 shows a schematic cross-sectional view of a wafer-level three-dimensional stacked micro-channel heat dissipation structure 300 according to an embodiment of the present invention. As shown in FIG. 1, the wafer-level three-dimensional stacked microfluidic heat dissipation structure 300 includes a substrate 310, a first chip 320 stacked on the substrate 310, and a second chip 330 stacked on the first chip 320. The substrate 310 has at least two through holes 311 and 312 as an inlet and an outlet for the heat dissipation fluid.
基板310的正面具有微流道键合焊盘313和信号键合焊盘314。基板310的正面还可设置有导电线路(未示出)，该导电线路与信号键合焊盘314形成电连接。The front surface of the substrate 310 has a micro channel bonding pad 313 and a signal bonding pad 314. The front surface of the substrate 310 may also be provided with a conductive circuit (not shown), and the conductive circuit is electrically connected to the signal bonding pad 314.
第一芯片320的第一面与基板310的正面相对。第一芯片320的第一面上具有微流道键合焊盘321和信号键合焊盘322。微流道键合焊盘321与微流道键合焊盘313相对应，并形成密封键合，从而在微流道键合焊盘321与微流道键合焊盘313形成的密封区域内形成第一层液体流道。信号键合焊盘322与信号键合焊盘314相对应，并形成电连接。The first surface of the first chip 320 is opposite to the front surface of the substrate 310. The first surface of the first chip 320 has a micro-channel bonding pad 321 and a signal bonding pad 322. The micro-channel bonding pad 321 corresponds to the micro-channel bonding pad 313 and forms a sealed bond, so that the micro-channel bonding pad 321 and the micro-channel bonding pad 313 form a sealing area Form the first layer of liquid flow channels. The signal bonding pad 322 corresponds to the signal bonding pad 314 and forms an electrical connection.
第一芯片320具有至少两个用于形成微流道的通孔323、324和至少一个用于信号连接的通孔325。通孔323和324分别与散热流体的入口和出口相连通。通孔325与信号键合焊盘322电连接。入口和出口、通孔323和324分别与第一层液体流道连通。The first chip 320 has at least two through holes 323 and 324 for forming micro flow channels and at least one through hole 325 for signal connection. The through holes 323 and 324 communicate with the inlet and outlet of the heat dissipation fluid, respectively. The through hole 325 is electrically connected to the signal bonding pad 322. The inlet and outlet, the through holes 323 and 324 are respectively communicated with the first layer liquid channel.
第一芯片320的第二面上具有微流道键合焊盘326和信号键合焊盘327。信号键合焊盘327与通孔325形成电连接。The second surface of the first chip 320 has a micro-channel bonding pad 326 and a signal bonding pad 327. The signal bonding pad 327 is electrically connected to the through hole 325.
第一芯片320可以是各种类型的芯片，例如，处理器芯片、存储器芯片等。The first chip 320 may be various types of chips, for example, a processor chip, a memory chip, and so on.
第二芯片330的第一面与第一芯片320的第二面相对。第二芯片330的第一面上具有微流道键合焊盘331和信号键合焊盘332。微流道键合焊盘331与微流道键合焊盘326相对应，并形成密封键合，从而在微流道键合焊盘331与微流道键合焊盘326形成的密封区域内形成第二层液体流道。信号键合焊盘332与信号键合焊盘327相对应，并形成电连接。The first surface of the second chip 330 is opposite to the second surface of the first chip 320. The first surface of the second chip 330 has a micro channel bonding pad 331 and a signal bonding pad 332. The micro-channel bonding pad 331 corresponds to the micro-channel bonding pad 326, and forms a sealing bond, so that the micro-channel bonding pad 331 and the micro-channel bonding pad 326 form a sealing area Form a second layer of liquid flow channels. The signal bonding pad 332 corresponds to the signal bonding pad 327 and forms an electrical connection.
第二芯片330为普通芯片，没有用于流体穿过的通孔。The second chip 330 is an ordinary chip and has no through holes for fluid to pass through.
微流体从入口穿过基板进入第一层液体流道，再穿过第一芯片上的一个或多个通孔进入第二层液体流道，之后穿过第一芯片上的一个或多个通孔返回第一层液体流道，穿过出口离开封装体，完成微流体在封装体内的流动。The microfluid enters the first layer of liquid flow through the substrate from the inlet, then enters the second layer of liquid flow through one or more through holes on the first chip, and then passes through one or more through holes on the first chip. The hole returns to the first layer of liquid flow channel, passes through the outlet to leave the package, and completes the flow of the microfluid in the package.
在本发明的实施例中，本领域的技术人员可根据芯片上热点区域设置液体流道的位置的尺寸。本发明的保护范围不限于实施例中所示的流体流道的具体形状和尺寸。In the embodiment of the present invention, those skilled in the art can set the size of the position of the liquid flow channel according to the hot spot area on the chip. The protection scope of the present invention is not limited to the specific shape and size of the fluid channel shown in the embodiments.
图2A至2C示出根据本发明的一个实施例晶圆级三维堆叠微流道散热结构的制造过程的截面图。2A to 2C show cross-sectional views of a manufacturing process of a wafer-level three-dimensional stacked micro-channel heat dissipation structure according to an embodiment of the present invention.
首先，如图2A所示，针对第一芯片210，在芯片表面进行TSV打孔制作。在信号端的TSV孔进行电镀填孔。其他区域的TSV孔空置。First, as shown in FIG. 2A, for the first chip 210, TSV drilling is performed on the surface of the chip. The TSV hole on the signal end is plated and filled. TSV holes in other areas are empty.
在第一芯片的第一面和第二面，分别设计加工键合焊盘220。On the first side and the second side of the first chip, bonding pads 220 are designed and processed respectively.
如图2B所示，将第一芯片210与第二芯片230进行键合，第二芯片230为正常芯片，无TSV孔。键合采用晶圆键合工艺。信号端的键合需要采用导电材料，而微流道键合端可采用导电材料，也可采用非导电材料进行。As shown in FIG. 2B, the first chip 210 and the second chip 230 are bonded, and the second chip 230 is a normal chip without TSV holes. The bonding uses a wafer bonding process. The bonding of the signal terminal needs to use conductive materials, and the micro-channel bonding terminal can be made of conductive materials or non-conductive materials.
如图2C所示，将第一芯片210与第二芯片230贴在基板240上，基板材料可为有机材料也可为硅基、陶瓷、玻璃基等材料。As shown in FIG. 2C, the first chip 210 and the second chip 230 are attached to the substrate 240. The substrate material can be an organic material or a silicon-based, ceramic, glass-based, or other material.
本发明的上述实施例采用微流道设计方案，封装在整体三维结构上都有散热通道，封装整体散热效果更好。The above-mentioned embodiment of the present invention adopts a micro-channel design scheme, the package has a heat dissipation channel on the overall three-dimensional structure, and the overall heat dissipation effect of the package is better.
并且，由于采用三维堆叠的系统封装结构，其封装尺寸可以做得更薄，可实现系统封装结构。Moreover, due to the use of a three-dimensional stacked system packaging structure, the package size can be made thinner, and the system packaging structure can be realized.
本发明采用晶圆级堆叠键合方案，封装成本更加有优势。The invention adopts a wafer-level stacking and bonding scheme, and the packaging cost is more advantageous.
尽管上文描述了本发明的各实施例，但是，应该理解，它们只是作为示例来呈现的，而不作为限制。对于相关领域的技术人员显而易见的是，可以对其做出各种组合、变型和改变而不背离本发明的精神和范围。因此，此处所公开的本发明的宽度和范围不应被上述所公开的示例性实施例所限制，而应当仅根据所附权利要求书及其等同替换来定义。Although the various embodiments of the present invention have been described above, it should be understood that they are presented only as examples and not as limitations. It is obvious to those skilled in the related art that various combinations, modifications, and changes can be made without departing from the spirit and scope of the present invention. Therefore, the breadth and scope of the present invention disclosed herein should not be limited by the exemplary embodiments disclosed above, but should be defined only according to the appended claims and their equivalents.

Claims (10)

  1. 一种三维堆叠微流道散热结构，包括：A three-dimensional stacked micro-channel heat dissipation structure, including:
    基板，基板的正面具有第一微流道键合焊盘和第一信号键合焊盘，基板具有至少两个第一通孔作为散热流体的入口和出口；A substrate, the front surface of the substrate has a first micro-channel bonding pad and a first signal bonding pad, and the substrate has at least two first through holes as inlets and outlets for the heat dissipation fluid;
    层叠在基板上的第一芯片，第一芯片的第一面与基板的正面相对，第一芯片的第一面上具有第二微流道键合焊盘和第二信号键合焊盘，第二微流道键合焊盘与第一微流道键合焊盘相对应，并形成密封键合，从而在第一微流道键合焊盘与第二微流道键合焊盘形成的密封区域内形成第一层液体流道，第二信号键合焊盘与第一信号键合焊盘相对应，并形成电连接，第一芯片具有至少两个用于形成微流道的第二通孔和用于信号连接的第三通孔，第二通孔分别与散热流体的入口和出口相连通，第三通孔与第二信号键合焊盘电连接，第一芯片的第二面上具有第三微流道键合焊盘和第三信号键合焊盘，第三信号键合焊盘与第三通孔形成电连接；以及The first chip laminated on the substrate, the first surface of the first chip is opposite to the front surface of the substrate, and the first surface of the first chip has the second micro-channel bonding pad and the second signal bonding pad. The two micro-channel bonding pads correspond to the first micro-channel bonding pad and form a hermetic bond, so that the first micro-channel bonding pad and the second micro-channel bonding pad are formed A first layer of liquid flow channels are formed in the sealing area, and the second signal bonding pads correspond to the first signal bonding pads and form electrical connections. The first chip has at least two second layers for forming micro flow channels. A through hole and a third through hole for signal connection, the second through hole is respectively connected to the inlet and outlet of the heat dissipation fluid, the third through hole is electrically connected to the second signal bonding pad, and the second surface of the first chip There is a third micro-channel bonding pad and a third signal bonding pad, and the third signal bonding pad is electrically connected to the third through hole; and
    层叠在第一芯片上的第二芯片，第二芯片的第一面与第一芯片的第二面相对，第二芯片的第一面上具有第四微流道键合焊盘和第四信号键合焊盘，第四微流道键合焊盘与第三微流道键合焊盘相对应，并形成密封键合，从而在第四微流道键合焊盘与第三微流道键合焊盘形成的密封区域内形成第二层液体流道，第四信号键合焊盘与信号键合焊盘第三相对应，并形成电连接。The second chip laminated on the first chip, the first side of the second chip is opposite to the second side of the first chip, and the first side of the second chip has a fourth micro-channel bonding pad and a fourth signal Bonding pad, the fourth micro-channel bonding pad corresponds to the third micro-channel bonding pad, and forms a hermetic bond, so that the fourth micro-channel bonding pad and the third micro-channel bonding pad A second layer of liquid flow channel is formed in the sealing area formed by the bonding pad, and the fourth signal bonding pad corresponds to the third signal bonding pad and forms an electrical connection.
  2. 如权利要求1所述的三维堆叠微流道散热结构，其特征在于，基板的正面设置有导电线路，所述导电线路与第一信号键合焊盘形成电连接。The three-dimensional stacked microfluidic heat dissipation structure of claim 1, wherein a conductive circuit is provided on the front surface of the substrate, and the conductive circuit is electrically connected to the first signal bonding pad.
  3. 如权利要求1所述的三维堆叠微流道散热结构，其特征在于，第一微流道键合焊盘、第二微流道键合焊盘、第三微流道键合焊盘、第四微流道键合焊盘采用导电材料或非导电材料。The three-dimensional stacked micro-channel heat dissipation structure of claim 1, wherein the first micro-channel bonding pad, the second micro-channel bonding pad, the third micro-channel bonding pad, and the The four-microchannel bonding pads are made of conductive or non-conductive materials.
  4. 如权利要求1所述的三维堆叠微流道散热结构，其特征在于，所述入口和出口分别与第一层液体流道连通。The three-dimensional stacked micro-channel heat dissipation structure according to claim 1, wherein the inlet and the outlet are respectively connected with the first-layer liquid channel.
  5. 如权利要求1所述的三维堆叠微流道散热结构，其特征在于，所述第二通孔的一端与第一层液体流道连通，另一端与第二层液体流道连通。The three-dimensional stacked micro-channel heat dissipation structure of claim 1, wherein one end of the second through hole is connected with the first layer of liquid channel, and the other end is connected with the second layer of liquid channel.
  6. 如权利要求1所述的三维堆叠微流道散热结构，其特征在于，所述第三通孔内填充导电金属。The three-dimensional stacked microfluidic heat dissipation structure according to claim 1, wherein the third through hole is filled with conductive metal.
  7. 如权利要求1所述的三维堆叠微流道散热结构，其特征在于，微流体从入口穿过基板进入第一层液体流道，再穿过第一芯片上的第二通孔进入第二层液体流道，之后穿过第一芯片上的第二通孔返回第一层液体流道，穿过出口离开三维堆叠微流道散热结构。The three-dimensional stacked microchannel heat dissipation structure according to claim 1, wherein the microfluid enters the first layer of liquid channel through the substrate from the inlet, and then enters the second layer through the second through hole on the first chip. The liquid flow channel then passes through the second through hole on the first chip to return to the first layer of liquid flow channel, and leaves the three-dimensional stacked micro flow channel heat dissipation structure through the outlet.
  8. 一种制造权利要求1至7中任一项所述的三维堆叠微流道散热结构的方法，包括：A method for manufacturing the three-dimensional stacked micro-channel heat dissipation structure according to any one of claims 1 to 7, comprising:
    对第一芯片进行打孔，形成第二通孔和第三通孔，对第三孔进行电镀填孔；Drilling the first chip to form a second through hole and a third through hole, and electroplating and filling the third hole;
    在第一芯片的第一面上形成第二微流道键合焊盘和第二信号键合焊盘；Forming a second micro-channel bonding pad and a second signal bonding pad on the first surface of the first chip;
    在第一芯片的第二面上形成第三微流道键合焊盘和第三信号键合焊盘；Forming a third micro-channel bonding pad and a third signal bonding pad on the second surface of the first chip;
    在第二芯片的第一面上形成第四微流道键合焊盘和第四信号键合焊盘；Forming a fourth micro-channel bonding pad and a fourth signal bonding pad on the first surface of the second chip;
    将第一芯片与第二芯片进行键合；Bonding the first chip and the second chip;
    对基板进行打孔形成散热流体的入口和出口；Punching the substrate to form the inlet and outlet of the heat dissipation fluid;
    在基板的正面形成第一微流道键合焊盘和第一信号键合焊盘；Forming a first micro-channel bonding pad and a first signal bonding pad on the front surface of the substrate;
    将第一芯片与第二芯片贴在基板上。The first chip and the second chip are pasted on the substrate.
  9. 如权利要求8所述的方法，其特征在于，将第一芯片与第二芯片进行键合采用晶圆键合工艺。8. The method of claim 8, wherein the first chip and the second chip are bonded using a wafer bonding process.
  10. 如权利要求8所述的方法，其特征在于，基板材料为有机材料、硅基、陶瓷、玻璃基材料。The method according to claim 8, wherein the substrate material is an organic material, silicon-based, ceramic, or glass-based material.
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CN110246816A (en) * 2019-06-12 2019-09-17 上海先方半导体有限公司 A kind of three-dimensional stacked fluid channel radiator structure of wafer scale and its manufacturing method

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