CN110246816A - A kind of three-dimensional stacked fluid channel radiator structure of wafer scale and its manufacturing method - Google Patents
A kind of three-dimensional stacked fluid channel radiator structure of wafer scale and its manufacturing method Download PDFInfo
- Publication number
- CN110246816A CN110246816A CN201910506694.9A CN201910506694A CN110246816A CN 110246816 A CN110246816 A CN 110246816A CN 201910506694 A CN201910506694 A CN 201910506694A CN 110246816 A CN110246816 A CN 110246816A
- Authority
- CN
- China
- Prior art keywords
- welding pad
- bonding welding
- fluid channel
- chip
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Micromachines (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention discloses a kind of three-dimensional stacked fluid channel radiator structures of wafer scale, comprising: substrate, the front of substrate have the first fluid channel bonding welding pad and the first signal bonding welding pad, and substrate has entrance and exit of at least two first through hole as heat dissipating fluid;The first chip being layered on substrate, first face of the first chip and the front of substrate are opposite, the third through-hole that there are first chip at least two the second through-holes for being used to form fluid channel to connect with for signal, there is third fluid channel bonding welding pad and third signal bonding welding pad, third signal bonding welding pad is electrically connected with third through-hole formation on second face of the first chip;And it is layered in the second chip on the first chip, first face of the second chip and the second face of the first chip are opposite, there is the 4th fluid channel bonding welding pad and fourth signal bonding welding pad on first face of the second chip, fourth signal bonding welding pad is corresponding with signal bonding welding pad third, and forms electrical connection.
Description
Technical field
The present invention relates to technical field of semiconductor device, more particularly it relates to which a kind of wafer scale is three-dimensional stacked
Fluid channel radiator structure and its manufacturing method.
Background technique
With the development of electronic product multifunction and miniaturization, high density microelectronic mounting technology is produced in electronics of new generation
Mainstream is increasingly becoming on product.Under the development of industrial technology level, people also proposed more the heat dissipation performance of electronic component
For strict requirements, electronic element radiating mode is varied, needs to comprehensively consider all kinds of factors and is chosen.Usual electronics member
The heat dissipation of part is realized by the environment or radiator of surrounding.It can be by following method to the thermal diffusivity of electronic component
It can be carried out optimization.
If the case where carrying out the heat dissipation of analysing electronic component from the angle of hot loop, power consumption is equal to the temperature difference divided by electric heating
Resistance, thermal resistance is bigger, and the heat-sinking capability of electronic component is poorer, then reducing internal thermal resistance just becomes the weight of electronic element radiating design
It works.Natural heat dissipation or the method for cooling do not need the auxiliary energy by any outside, and electronic component itself is allowed to realize drop
Temperature heat dissipation.In general, when using the method for natural heat dissipation, local pyrexia device inside electronic component can be by surrounding
Environment radiates to achieve the purpose that control temperature.Its heat transfer type mainly has thermally conductive, convection current and radiation.This mode is mainly fitted
The case where power needed for running for electronic component is smaller, does not need assembly radiator, device of less demanding to the control of temperature
Heat flow density should not be too big.But it is directed to the biggish electron package structure of heat flow density, need to be considered as liquid cooling
Method.Coolant is allowed directly to be contacted with electronic component, heat is directly taken away by coolant, that is, can reach the mesh of cooling and heat dissipation
's.Electronic component under or hot environment all very high for heat consumption volume and density, heat dissipating method generally all select this straight
The liquid cooling method connect.
For chip die technique, it is limited to chip technology and production structure, the portion in the chip that is difficult increases radiator structure,
Liquid cooling method is difficult to realize.
Summary of the invention
According to an aspect of the present invention, a kind of three-dimensional stacked fluid channel radiator structure of wafer scale is provided, comprising:
Substrate, the front of substrate have the first fluid channel bonding welding pad and the first signal bonding welding pad, and substrate has at least
Entrance and exit of two first through hole as heat dissipating fluid;
The front of the first chip being layered on substrate, the first face of the first chip and substrate is opposite, and the of the first chip
It is upper on one side that there is the second fluid channel bonding welding pad and second signal bonding welding pad, the second fluid channel bonding welding pad and the first fluid channel
Bonding welding pad is corresponding, and forms sealing bonding, thus in the first fluid channel bonding welding pad and the second fluid channel bonding welding pad shape
At sealing area in formed first layer flow channel for liquids, second signal bonding welding pad is corresponding with the first signal bonding welding pad, and
Electrical connection is formed, the third that there are the first chip at least two the second through-holes for being used to form fluid channel to connect with for signal is logical
Hole, the second through-hole are connected with the entrance and exit of heat dissipating fluid respectively, and third through-hole is electrically connected with second signal bonding welding pad,
On second face of the first chip have third fluid channel bonding welding pad and third signal bonding welding pad, third signal bonding welding pad with
Third through-hole forms electrical connection;And
The second chip being layered on the first chip, the first face of the second chip and the second face of the first chip are opposite, the
On first face of two chips have the 4th fluid channel bonding welding pad and fourth signal bonding welding pad, the 4th fluid channel bonding welding pad with
Third fluid channel bonding welding pad is corresponding, and forms sealing bonding, thus in the 4th fluid channel bonding welding pad and third fluid channel
Second layer flow channel for liquids, fourth signal bonding welding pad and signal bonding welding pad third are formed in the sealing area that bonding welding pad is formed
It is corresponding, and form electrical connection.
In one embodiment of the invention, the front of substrate is provided with conducting wire, the conducting wire and the first letter
Number bonding welding pad forms electrical connection.
In one embodiment of the invention, the first fluid channel bonding welding pad, the second fluid channel bonding welding pad, third miniflow
Road bonding welding pad, the 4th fluid channel bonding welding pad use conductive material or non-conducting material.
In one embodiment of the invention, the entrance and exit is connected to first layer flow channel for liquids respectively.
In one embodiment of the invention, one end of second through-hole is connected to first layer flow channel for liquids, the other end
It is connected to second layer flow channel for liquids.
In one embodiment of the invention, conductive metal is filled in the third through-hole.
In one embodiment of the invention, microfluid enters first layer flow channel for liquids across substrate from entrance, is then passed through
The second through-hole on first chip enters second layer flow channel for liquids, and the second through-hole passed through on the first chip later returns to first layer
Flow channel for liquids leaves the three-dimensional stacked fluid channel radiator structure of wafer scale across outlet.
According to another embodiment of the invention, a kind of side manufacturing the three-dimensional stacked fluid channel radiator structure of wafer scale is provided
Method, comprising:
First chip is punched, the second through-hole and third through-hole is formed, plating filling perforation is carried out to third hole;
The second fluid channel bonding welding pad and second signal bonding welding pad are formed on the first face of the first chip;
Third fluid channel bonding welding pad and third signal bonding welding pad are formed on the second face of the first chip;
The 4th fluid channel bonding welding pad and fourth signal bonding welding pad are formed on the first face of the second chip;
First chip is bonded with the second chip;
The entrance and exit that punching forms heat dissipating fluid is carried out to substrate;
The first fluid channel bonding welding pad and the first signal bonding welding pad are formed in the front of substrate;
First chip and the second chip are attached on substrate.
In another embodiment of the present invention, the first chip be bonded using wafer bonding work with the second chip
Skill.
In another embodiment of the present invention, baseplate material is organic material, silicon substrate, ceramics, glass-based material.
Detailed description of the invention
For the above and other advantages and features for each embodiment that the present invention is furture elucidated, will be presented with reference to attached drawing
The more specific description of various embodiments of the present invention.It is appreciated that these attached drawings only describe exemplary embodiments of the invention, therefore
It is not to be regarded as being restriction on its scope.In the accompanying drawings, in order to cheer and bright, identical or corresponding component will use identical or class
As mark indicate.
Fig. 1 shows the transversal of the three-dimensional stacked fluid channel radiator structure 300 of wafer scale according to an embodiment of the invention
Face schematic diagram.
Fig. 2A to 2C shows the manufacture of the three-dimensional stacked fluid channel radiator structure of wafer scale according to one embodiment of present invention
The sectional view of process.
Specific embodiment
In the following description, with reference to each embodiment, present invention is described.However, those skilled in the art will recognize
Know can in the case where none or multiple specific details or with other replacements and/or addition method, material or component
Implement each embodiment together.In other situations, well known structure, material or operation are not shown or are not described in detail in order to avoid making this
The aspects of each embodiment of invention is obscure.Similarly, for purposes of explanation, specific quantity, material and configuration are elaborated, with
Comprehensive understanding to the embodiment of the present invention is just provided.However, the present invention can be implemented in the case where no specific detail.This
Outside, it should be understood that each embodiment shown in the accompanying drawings is illustrative expression and is not drawn necessarily to scale.
In the present specification, the reference of " one embodiment " or " embodiment " is meaned to combine embodiment description
A particular feature, structure, or characteristic is included at least one embodiment of the invention.Occur in everywhere in this specification short
Language " in one embodiment " is not necessarily all referring to the same embodiment.
Conventional package using the radiator structure for increasing dissipating cover and fan, want by the design for being limited to encapsulating structure
It asks, heat dissipation effect is limited, is not suitable for powerful system requirements.
The present invention proposes that a kind of three-dimensional stacked system packaging structure, package dimension can be thinner, it can be achieved that system is sealed
Assembling structure.In an embodiment of the present invention, encapsulation uses microchannel structural design scheme, and being encapsulated in whole three-dimensional structure has heat dissipation
Channel, encapsulation integral heat sink effect are more preferable.This programme uses crystal circular piled bonding strategy, and packaging cost is more advantageous.
Fig. 1 shows the transversal of the three-dimensional stacked fluid channel radiator structure 300 of wafer scale according to an embodiment of the invention
Face schematic diagram.As shown in Figure 1, the three-dimensional stacked fluid channel radiator structure 300 of wafer scale includes substrate 310, is layered on substrate 310
The first chip 320 and the second chip 330 for being layered on the first chip 320.Substrate 310 has at least two through-holes 311
With 312 entrance and exit as heat dissipating fluid.
The front of substrate 310 has fluid channel bonding welding pad 313 and signal bonding welding pad 314.May be used also in the front of substrate 310
It is provided with conducting wire (not shown), which is electrically connected with the formation of signal bonding welding pad 314.
First face of the first chip 320 and the front of substrate 310 are opposite.There is miniflow on first face of the first chip 320
Road bonding welding pad 321 and signal bonding welding pad 322.Fluid channel bonding welding pad 321 is corresponding with fluid channel bonding welding pad 313, and
Sealing bonding is formed, to form the in the sealing area that fluid channel bonding welding pad 321 and fluid channel bonding welding pad 313 are formed
One layer of flow channel for liquids.Signal bonding welding pad 322 is corresponding with signal bonding welding pad 314, and forms electrical connection.
First chip 320 have at least two through-holes 323,324 for being used to form fluid channel and at least one for signal
The through-hole 325 of connection.Through-hole 323 and 324 is connected with the entrance and exit of heat dissipating fluid respectively.Through-hole 325 is bonded with signal
Pad 322 is electrically connected.Entrance and exit, through-hole 323 and 324 are connected to first layer flow channel for liquids respectively.
There is fluid channel bonding welding pad 326 and signal bonding welding pad 327 on second face of the first chip 320.Signal bonding
Pad 327 is electrically connected with the formation of through-hole 325.
First chip 320 can be various types of chips, for example, processor chips, memory chip etc..
First face of the second chip 330 is opposite with the second face of the first chip 320.Have on first face of the second chip 330
There are fluid channel bonding welding pad 331 and signal bonding welding pad 332.Fluid channel bonding welding pad 331 and fluid channel bonding welding pad 326 are opposite
It answers, and forms sealing bonding, thus in the sealing area that fluid channel bonding welding pad 331 and fluid channel bonding welding pad 326 are formed
Form second layer flow channel for liquids.Signal bonding welding pad 332 is corresponding with signal bonding welding pad 327, and forms electrical connection.
Second chip 330 is common chip, the through-hole not passed through for fluid.
Microfluid passes through substrate from entrance and enters first layer flow channel for liquids, and the one or more being then passed through on the first chip is logical
Hole enters second layer flow channel for liquids, and the one or more through-holes passed through on the first chip later return to first layer flow channel for liquids, wears
It crosses outlet and leaves packaging body, complete microfluid and encapsulating intracorporal flowing.
In an embodiment of the present invention, those skilled in the art can be according to setting flow channel for liquids in hot spot region on chip
The size of position.Protection scope of the present invention is not limited to the concrete shape and size of fluid course shown in embodiment.
Fig. 2A to 2C shows the manufacture of the three-dimensional stacked fluid channel radiator structure of wafer scale according to one embodiment of present invention
The sectional view of process.
Firstly, as shown in Figure 2 A, for the first chip 210, carrying out TSV punching production in chip surface.In signal end
The hole TSV carries out plating filling perforation.The hole TSV in other regions is vacant.
In the first face and the second face of the first chip, processing bonding welding pad 220 is separately designed.
As shown in Figure 2 B, the first chip 210 being bonded with the second chip 230, the second chip 230 is normal chip,
Without the hole TSV.Bonding uses wafer bonding technique.The bonding of signal end needs to use conductive material, and fluid channel bonding end can be adopted
With conductive material, non-conducting material progress can also be used.
As shown in Figure 2 C, the first chip 210 and the second chip 230 are attached on substrate 240, baseplate material can be organic material
Material can also be the materials such as silicon substrate, ceramics, glass base.
The above embodiment of the present invention uses microchannel structural design scheme, and being encapsulated in whole three-dimensional structure has heat dissipation logical
Road, encapsulation integral heat sink effect are more preferable.
Also, due to using three-dimensional stacked system packaging structure, package dimension can be made thinner, it can be achieved that system
Encapsulating structure.
The present invention uses crystal circular piled bonding strategy, and packaging cost is more advantageous.
Although described above is various embodiments of the present invention, however, it is to be understood that they are intended only as example to present
, and without limitation.For those skilled in the relevant art it is readily apparent that various combinations, modification can be made to it
Without departing from the spirit and scope of the invention with change.Therefore, the width of the invention disclosed herein and range should not be upper
It states disclosed exemplary embodiment to be limited, and should be defined according only to the appended claims and its equivalent replacement.
Claims (10)
1. a kind of three-dimensional stacked fluid channel radiator structure of wafer scale, comprising:
Substrate, the front of substrate have the first fluid channel bonding welding pad and the first signal bonding welding pad, and substrate has at least two
Entrance and exit of the first through hole as heat dissipating fluid;
The first chip being layered on substrate, the first face of the first chip and the front of substrate are opposite, the first face of the first chip
Upper to have the second fluid channel bonding welding pad and second signal bonding welding pad, the second fluid channel bonding welding pad is bonded with the first fluid channel
Pad is corresponding, and forms sealing bonding, thus formed in the first fluid channel bonding welding pad and the second fluid channel bonding welding pad
First layer flow channel for liquids is formed in sealing area, second signal bonding welding pad is corresponding with the first signal bonding welding pad, and is formed
Electrical connection, the third through-hole that there are the first chip at least two the second through-holes for being used to form fluid channel to connect with for signal,
Second through-hole is connected with the entrance and exit of heat dissipating fluid respectively, and third through-hole is electrically connected with second signal bonding welding pad, the
There is third fluid channel bonding welding pad and third signal bonding welding pad, third signal bonding welding pad and the on second face of one chip
Three through-holes form electrical connection;And
The second chip being layered on the first chip, the first face of the second chip and the second face of the first chip are opposite, the second core
There is the 4th fluid channel bonding welding pad and fourth signal bonding welding pad, the 4th fluid channel bonding welding pad and third on first face of piece
Fluid channel bonding welding pad is corresponding, and forms sealing bonding, to be bonded in the 4th fluid channel bonding welding pad with third fluid channel
Second layer flow channel for liquids, fourth signal bonding welding pad and signal bonding welding pad third phase pair are formed in the sealing area that pad is formed
It answers, and forms electrical connection.
2. the three-dimensional stacked fluid channel radiator structure of wafer scale as described in claim 1, which is characterized in that the front setting of substrate
There is conducting wire, the conducting wire is electrically connected with the formation of the first signal bonding welding pad.
3. the three-dimensional stacked fluid channel radiator structure of wafer scale as described in claim 1, which is characterized in that the bonding of the first fluid channel
Pad, the second fluid channel bonding welding pad, third fluid channel bonding welding pad, the 4th fluid channel bonding welding pad use conductive material or non-
Conductive material.
4. the three-dimensional stacked fluid channel radiator structure of wafer scale as described in claim 1, which is characterized in that the entrance and exit
It is connected to respectively with first layer flow channel for liquids.
5. the three-dimensional stacked fluid channel radiator structure of wafer scale as described in claim 1, which is characterized in that second through-hole
One end is connected to first layer flow channel for liquids, and the other end is connected to second layer flow channel for liquids.
6. the three-dimensional stacked fluid channel radiator structure of wafer scale as described in claim 1, which is characterized in that in the third through-hole
Fill conductive metal.
7. the three-dimensional stacked fluid channel radiator structure of wafer scale as described in claim 1, which is characterized in that microfluid is worn from entrance
It crosses substrate and enters first layer flow channel for liquids, the second through-hole being then passed through on the first chip enters second layer flow channel for liquids, wears later
The second through-hole crossed on the first chip returns to first layer flow channel for liquids, leaves the three-dimensional stacked fluid channel heat dissipation of wafer scale across outlet
Structure.
8. the method for the three-dimensional stacked fluid channel radiator structure of wafer scale described in a kind of any one of manufacturing claims 1 to 7, packet
It includes:
First chip is punched, the second through-hole and third through-hole is formed, plating filling perforation is carried out to third hole;
The second fluid channel bonding welding pad and second signal bonding welding pad are formed on the first face of the first chip;
Third fluid channel bonding welding pad and third signal bonding welding pad are formed on the second face of the first chip;
The 4th fluid channel bonding welding pad and fourth signal bonding welding pad are formed on the first face of the second chip;
First chip is bonded with the second chip;
The entrance and exit that punching forms heat dissipating fluid is carried out to substrate;
The first fluid channel bonding welding pad and the first signal bonding welding pad are formed in the front of substrate;
First chip and the second chip are attached on substrate.
9. method according to claim 8, which is characterized in that be bonded using wafer key with the second chip the first chip
Close technique.
10. method according to claim 8, which is characterized in that baseplate material is organic material, silicon substrate, ceramics, glass baseplate
Material.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910506694.9A CN110246816A (en) | 2019-06-12 | 2019-06-12 | A kind of three-dimensional stacked fluid channel radiator structure of wafer scale and its manufacturing method |
PCT/CN2020/094542 WO2020248905A1 (en) | 2019-06-12 | 2020-06-05 | Wafer-level 3d stacked microchannel heat dissipation structure and manufacturing method therefor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910506694.9A CN110246816A (en) | 2019-06-12 | 2019-06-12 | A kind of three-dimensional stacked fluid channel radiator structure of wafer scale and its manufacturing method |
Publications (1)
Publication Number | Publication Date |
---|---|
CN110246816A true CN110246816A (en) | 2019-09-17 |
Family
ID=67886872
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910506694.9A Pending CN110246816A (en) | 2019-06-12 | 2019-06-12 | A kind of three-dimensional stacked fluid channel radiator structure of wafer scale and its manufacturing method |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN110246816A (en) |
WO (1) | WO2020248905A1 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111128976A (en) * | 2019-12-20 | 2020-05-08 | 青岛歌尔智能传感器有限公司 | Chip stacking packaging heat dissipation structure and manufacturing method |
CN111128917A (en) * | 2019-12-30 | 2020-05-08 | 上海先方半导体有限公司 | Chip packaging structure and manufacturing method thereof |
WO2020248905A1 (en) * | 2019-06-12 | 2020-12-17 | 上海先方半导体有限公司 | Wafer-level 3d stacked microchannel heat dissipation structure and manufacturing method therefor |
CN112169851A (en) * | 2020-10-13 | 2021-01-05 | 中国科学院微电子研究所 | Micro-channel inlet cover plate and preparation and use methods thereof |
CN113299618A (en) * | 2021-04-29 | 2021-08-24 | 中国电子科技集团公司第二十九研究所 | Three-dimensional integrated efficient heat dissipation packaging structure and preparation method thereof |
CN117202481A (en) * | 2023-09-08 | 2023-12-08 | 中国电子科技集团公司第二十六研究所 | Module based on three-dimensional stacked structure and preparation method thereof |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090057879A1 (en) * | 2007-08-28 | 2009-03-05 | Reseach Triangle Institute | Structure and process for electrical interconnect and thermal management |
CN106356344A (en) * | 2016-09-08 | 2017-01-25 | 华进半导体封装先导技术研发中心有限公司 | Air cooling radiating structure on basis of three-dimensional stacked packaging and method for manufacturing air cooling radiating structure |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5380956A (en) * | 1993-07-06 | 1995-01-10 | Sun Microsystems, Inc. | Multi-chip cooling module and method |
US8106505B2 (en) * | 2007-10-31 | 2012-01-31 | International Business Machines Corporation | Assembly including plural through wafer vias, method of cooling the assembly and method of fabricating the assembly |
CN102024782B (en) * | 2010-10-12 | 2012-07-25 | 北京大学 | Three-dimensional vertical interconnecting structure and manufacturing method thereof |
US8933540B2 (en) * | 2013-02-28 | 2015-01-13 | International Business Machines Corporation | Thermal via for 3D integrated circuits structures |
CN110246816A (en) * | 2019-06-12 | 2019-09-17 | 上海先方半导体有限公司 | A kind of three-dimensional stacked fluid channel radiator structure of wafer scale and its manufacturing method |
-
2019
- 2019-06-12 CN CN201910506694.9A patent/CN110246816A/en active Pending
-
2020
- 2020-06-05 WO PCT/CN2020/094542 patent/WO2020248905A1/en active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090057879A1 (en) * | 2007-08-28 | 2009-03-05 | Reseach Triangle Institute | Structure and process for electrical interconnect and thermal management |
US20120048596A1 (en) * | 2007-08-28 | 2012-03-01 | Research Triangle Institute | Structure And Process For Electrical Interconnect And Thermal Management |
CN106356344A (en) * | 2016-09-08 | 2017-01-25 | 华进半导体封装先导技术研发中心有限公司 | Air cooling radiating structure on basis of three-dimensional stacked packaging and method for manufacturing air cooling radiating structure |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020248905A1 (en) * | 2019-06-12 | 2020-12-17 | 上海先方半导体有限公司 | Wafer-level 3d stacked microchannel heat dissipation structure and manufacturing method therefor |
CN111128976A (en) * | 2019-12-20 | 2020-05-08 | 青岛歌尔智能传感器有限公司 | Chip stacking packaging heat dissipation structure and manufacturing method |
CN111128976B (en) * | 2019-12-20 | 2021-10-01 | 青岛歌尔智能传感器有限公司 | Chip stacking packaging heat dissipation structure and manufacturing method |
CN111128917A (en) * | 2019-12-30 | 2020-05-08 | 上海先方半导体有限公司 | Chip packaging structure and manufacturing method thereof |
CN112169851A (en) * | 2020-10-13 | 2021-01-05 | 中国科学院微电子研究所 | Micro-channel inlet cover plate and preparation and use methods thereof |
CN113299618A (en) * | 2021-04-29 | 2021-08-24 | 中国电子科技集团公司第二十九研究所 | Three-dimensional integrated efficient heat dissipation packaging structure and preparation method thereof |
CN113299618B (en) * | 2021-04-29 | 2023-07-14 | 中国电子科技集团公司第二十九研究所 | Three-dimensional integrated high-efficiency heat dissipation packaging structure and preparation method thereof |
CN117202481A (en) * | 2023-09-08 | 2023-12-08 | 中国电子科技集团公司第二十六研究所 | Module based on three-dimensional stacked structure and preparation method thereof |
Also Published As
Publication number | Publication date |
---|---|
WO2020248905A1 (en) | 2020-12-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110246816A (en) | A kind of three-dimensional stacked fluid channel radiator structure of wafer scale and its manufacturing method | |
CN104716109B (en) | With packaging part of thermal management component for reducing hot crosstalk and forming method thereof | |
CN109524373B (en) | Three-dimensional active heat dissipation packaging structure of embedded micro-channel and manufacturing process thereof | |
TWI423404B (en) | Thermal improvement for hotspots on dies in integrated circuit packages | |
CN105188260B (en) | Printed circuit board embeds runner liquid cooling heat-exchanger rig | |
US20140138075A1 (en) | Heat exchanger and semiconductor module | |
EP1294022B1 (en) | Electronic module including a cooling substrate having a fluid cooling circuit therein and related methods | |
US8466486B2 (en) | Thermal management system for multiple heat source devices | |
CN108766897A (en) | Realize the packaging method of the 3-D heterojunction structure of high-power GaN device layer heat dissipation | |
CN108292637A (en) | More benchmark integrated radiators(IHS)Solution | |
CN110364501B (en) | Micro-channel heat dissipation structure, manufacturing method and electronic device | |
JP3905580B2 (en) | High density CMOS integrated circuit with heat transfer structure for improved cooling | |
CN104486901A (en) | Heat-radiating insulating lining board, packaging module comprising lining board and manufacturing method thereof | |
JP2014199829A (en) | Semiconductor module and inverter mounting the same | |
CN102779808B (en) | Integrated circuit package and packaging methods | |
CN213752684U (en) | Stacked silicon package with vertical thermal management | |
CN111584448B (en) | Chip embedded micro-channel module packaging structure and manufacturing method | |
CN106920783A (en) | Semiconductor device with improved heat and electrical property | |
EP3392907A1 (en) | Semiconductor device | |
CN109560054A (en) | A kind of metallic micro channel heat sink structure and its manufacturing method applied to chip cooling | |
CN109860131A (en) | A kind of system-in-package structure with interior radiator | |
CN104112736B (en) | 3D IC with the complicated microchannel fluid cooling of interlayer | |
US20070200226A1 (en) | Cooling micro-channels | |
JP2008235576A (en) | Heat dissipation structure of electronic component and semiconductor device | |
KR102088019B1 (en) | Heat dissipating device and package for heat dissipating using the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190917 |
|
RJ01 | Rejection of invention patent application after publication |