CN109473525B - Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof - Google Patents

Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof Download PDF

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CN109473525B
CN109473525B CN201811287249.XA CN201811287249A CN109473525B CN 109473525 B CN109473525 B CN 109473525B CN 201811287249 A CN201811287249 A CN 201811287249A CN 109473525 B CN109473525 B CN 109473525B
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gallium nitride
epitaxial wafer
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nitride layer
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CN109473525A (en
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葛永晖
郭炳磊
王群
吕蒙普
胡加辉
李鹏
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Boe Huacan Optoelectronics Suzhou Co ltd
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HC Semitek Suzhou Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H01L33/325—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials

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Abstract

The invention discloses a gallium nitride-based light emitting diode epitaxial wafer and a manufacturing method thereof, belonging to the technical field of semiconductors. The GaN-based light emitting diode epitaxial wafer comprises a substrate, an N-type semiconductor layer, an active layer and a P-type semiconductor layer, wherein the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially stacked on the substrate; the active layer comprises a plurality of periodic structures which are sequentially stacked, and each periodic structure comprises a quantum well and a quantum barrier which are sequentially stacked; a plurality of composite structures are inserted into the quantum barrier, and each composite structure comprises a P-type doped gallium nitride layer, an undoped aluminum gallium nitride layer and an N-type doped gallium nitride layer which are sequentially stacked. According to the invention, a plurality of composite structures are inserted into the quantum barrier layer, and each composite structure comprises the P-type doped gallium nitride layer, the undoped aluminum gallium nitride layer and the N-type doped gallium nitride layer which are sequentially stacked, so that good two-dimensional electron gas can be formed, and the current expansion is increased.

Description

Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to a gallium nitride-based light emitting diode epitaxial wafer and a manufacturing method thereof.
Background
A Light Emitting Diode (LED) is a semiconductor electronic component capable of Emitting Light. The LED has received much attention because of its advantages of energy saving, environmental protection, high reliability, long service life, etc., and in recent years, it has been widely used in the fields of background light sources and display screens, and has started to advance to the civil illumination market. Since the civil lighting focuses on the power saving, energy saving and service life of the product, it is very critical to reduce the series resistance of the LED and improve the antistatic capability of the LED.
The epitaxial wafer is a primary finished product in the LED preparation process. The conventional LED epitaxial wafer includes a substrate, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer, which are sequentially stacked on the substrate. The P-type semiconductor layer is used for providing holes for carrying out compound luminescence, the N-type semiconductor layer is used for providing electrons for carrying out compound luminescence, the active layer is used for carrying out radiation compound luminescence of the electrons and the holes, and the substrate is used for providing a growth surface for the epitaxial material.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
the electrode material absorbs light emitted from the active layer, and thus the electrode is generally disposed on a portion of the N-type semiconductor layer and the P-type semiconductor layer, so that light emitted from the active layer can be transmitted from a region where the electrode is not disposed. However, carriers (including electrons and holes) are weak in lateral expansion capability in a semiconductor material, and therefore, the carriers in the electrode region are generally injected into the active layer to perform recombination light emission, and the active layer in the electrode region is not fully utilized due to lack of carriers, so that the recombination efficiency of the electrons and holes in the active layer is low, and finally, the light emitting efficiency of the LED is low.
Disclosure of Invention
The embodiment of the invention provides a gallium nitride-based light emitting diode epitaxial wafer and a manufacturing method thereof, which can solve the problem that the combination efficiency of electrons and holes in an active layer is low due to the fact that the transverse expansion capability of a current carrier in a semiconductor material is weak in the prior art. The technical scheme is as follows:
in one aspect, an embodiment of the present invention provides a gallium nitride-based light emitting diode epitaxial wafer, where the gallium nitride-based light emitting diode epitaxial wafer includes a substrate, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer, where the N-type semiconductor layer, the active layer, and the P-type semiconductor layer are sequentially stacked on the substrate; the active layer comprises a plurality of periodic structures which are sequentially stacked, and each periodic structure comprises a quantum well and a quantum barrier which are sequentially stacked; a plurality of composite structures are inserted into the quantum barrier, and each composite structure comprises a P-type doped gallium nitride layer, an undoped aluminum gallium nitride layer and an N-type doped gallium nitride layer which are sequentially stacked.
Optionally, the N-type doped gallium nitride layer employs germanium as the N-type dopant.
Optionally, the doping concentration of germanium in the N-type doped gallium nitride layer is 5 x 1016/cm3～6*1017/cm3。
Optionally, the doping concentration of the P-type dopant in the P-type doped gallium nitride layer is 5 × 1015/cm3～6*1017/cm3。
Optionally, the content of the aluminum component in the undoped aluminum gallium nitride layer is 0.04-0.5.
Optionally, the number of the composite structures is 2 to 10.
Optionally, the thickness of the composite structure is 0.5nm to 8 nm.
In another aspect, an embodiment of the present invention provides a method for manufacturing a gallium nitride-based light emitting diode epitaxial wafer, where the method includes:
providing a substrate;
sequentially forming an N-type semiconductor layer, an active layer and a P-type semiconductor layer on the substrate;
the active layer comprises a plurality of periodic structures which are sequentially stacked, and each periodic structure comprises a quantum well and a quantum barrier which are sequentially stacked; a plurality of composite structures are inserted into the quantum barrier, and each composite structure comprises a P-type doped gallium nitride layer, an undoped aluminum gallium nitride layer and an N-type doped gallium nitride layer which are sequentially stacked.
Optionally, the growth temperature of the composite structure is 850 ℃ to 959 ℃.
Optionally, the growth pressure of the composite structure is 100torr to 500 torr.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
through inserting a plurality of composite construction in the quantum barrier layer, every composite construction is including the P type doped gallium nitride layer that stacks gradually, undoped aluminium gallium nitride layer and the N type doped gallium nitride layer, the potential barrier on undoped aluminium gallium nitride layer is higher, can form two-dimentional hole air between P type doped gallium nitride layer and the undoped aluminium gallium nitride layer, can play good effect of spreading to the hole, can form two-dimentional electron gas between N type doped gallium nitride layer and the undoped aluminium gallium nitride layer simultaneously, can play good effect of spreading to the electron. The multiple composite structures are sequentially stacked, so that carriers injected into the active layer can be fully expanded, the recombination efficiency of electrons and holes in the active layer is improved, and the luminous efficiency of the LED is finally improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a gan-based led epitaxial wafer according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of an active layer provided in an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a quantum barrier provided by an embodiment of the invention;
fig. 4 is a flowchart of a method for manufacturing an epitaxial wafer of a gallium nitride-based light emitting diode according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
The embodiment of the invention provides a gallium nitride-based light emitting diode epitaxial wafer. Fig. 1 is a schematic structural diagram of a gallium nitride-based light emitting diode epitaxial wafer according to an embodiment of the present invention. Referring to fig. 1, the gan-based light emitting diode epitaxial wafer includes a substrate 10, an N-type semiconductor layer 20, an active layer 30, and a P-type semiconductor layer 40, and the N-type semiconductor layer 20, the active layer 30, and the P-type semiconductor layer 40 are sequentially stacked on the substrate 10.
Fig. 2 is a schematic structural diagram of an active layer according to an embodiment of the present invention. Referring to fig. 2, the active layer 30 includes a plurality of periodic structures 31, and each periodic structure 31 includes a quantum well 32 and a quantum barrier 33, which are sequentially stacked.
Fig. 3 is a schematic structural diagram of a quantum barrier according to an embodiment of the present invention. Referring to fig. 3, a plurality of composite structures 34 are inserted into the quantum barrier 33, and each composite structure 34 includes a P-type doped gallium nitride layer 35, an undoped aluminum gallium nitride layer 36, and an N-type doped gallium nitride layer 37, which are sequentially stacked.
According to the embodiment of the invention, a plurality of composite structures are inserted into the quantum barrier layer, each composite structure comprises the P-type doped gallium nitride layer, the undoped aluminum gallium nitride layer and the N-type doped gallium nitride layer which are sequentially stacked, the potential barrier of the undoped aluminum gallium nitride layer is higher, two-dimensional hole air can be formed between the P-type doped gallium nitride layer and the undoped aluminum gallium nitride layer, the good spreading effect on holes can be achieved, and meanwhile, two-dimensional electron air can be formed between the N-type doped gallium nitride layer and the undoped aluminum gallium nitride layer, and the good spreading effect on electrons can be achieved. The multiple composite structures are sequentially stacked, so that carriers injected into the active layer can be fully expanded, the recombination efficiency of electrons and holes in the active layer is improved, and the luminous efficiency of the LED is finally improved.
Alternatively, the N-type doped gan layer 37 may use germanium as an N-type dopant, which is beneficial to maintain a good crystal structure, and has high electron mobility, which is beneficial to carrier injection.
Preferably, the doping concentration of germanium in the N-type doped gallium nitride layer 37 may be 5 × 1016/cm3～6*1017/cm3. If the doping concentration of germanium in the N-type doped gallium nitride layer is less than 5 x 1016/cm3The series resistance may be higher due to the lower doping concentration of germanium in the N-type doped gallium nitride layer; if the doping concentration of germanium in the N-type doped gallium nitride layer is largeAt 6 x 1017/cm3Electron overflow may occur due to the higher doping concentration of germanium in the N-type doped gallium nitride layer.
Alternatively, the doping concentration of the P-type dopant in the P-type doped gallium nitride layer 35 may be 5 × 1015/cm3～6*1017/cm3. If the doping concentration of the P-type dopant in the P-type doped gallium nitride layer is less than 5 x 1015/cm3The lateral expansion of holes may not be effectively promoted due to the low doping concentration of the P-type dopant in the P-type doped gan layer; if the doping concentration of the P-type dopant in the P-type doped gallium nitride layer is greater than that, the crystal quality of the active layer may be affected due to the higher doping concentration of the P-type dopant in the P-type doped gallium nitride layer.
Alternatively, the content of the aluminum component in the undoped aluminum gallium nitride layer 36 may be 0.04 to 0.5. If the content of the aluminum component in the undoped aluminum gallium nitride layer is less than 0.04, it may be impossible to effectively promote the lateral extension of the carriers due to the low content of the aluminum component in the undoped aluminum gallium nitride layer; if the content of the aluminum component in the undoped aluminum gallium nitride layer is greater than 0.5, the crystal quality of the active layer may be affected due to the higher content of the aluminum component in the undoped aluminum gallium nitride layer.
Alternatively, the number of composite structures 34 may be 2 to 10. If the number of composite structures is less than 2, it may be impossible to effectively promote lateral expansion of carriers due to the small number of composite structures; if the number of the composite structures is greater than 10, a process may be complicated due to the large number of the composite structures, increasing production costs.
Alternatively, the thickness of the composite structure may be 0.5nm to 8 nm. If the thickness of the composite structure is less than 0.5nm, it may not be possible to effectively promote lateral expansion of carriers due to the thin composite structure; if the thickness of the composite structure is greater than 8nm, lattice matching within the active layer may be affected due to the composite structure being thicker, reducing the crystal quality of the active layer.
Specifically, the thickness of the N-type doped gallium nitride layer 37 may be 0.2nm to 5nm, the thickness of the undoped aluminum gallium nitride layer 36 may be 0.1nm to 2nm, and the thickness of the P-type doped gallium nitride layer 35 may be 0.2nm to 5 nm.
In this embodiment, the material of the quantum well 32 may be indium gallium nitride (InGaN), such as InxGa1-xN, x is more than 0 and less than 1; the material of the quantum barrier 33 may be gallium nitride.
Alternatively, the quantum well 32 may have a thickness of 2.5nm to 3.5nm, preferably 3 nm; the thickness of the quantum barrier 33 may be 9nm to 20nm, preferably 15 nm; the number of periodic structures 31 may be 5 to 15, preferably 10.
Specifically, the material of the substrate 10 may employ sapphire (the main material is alumina), such as sapphire having a crystal orientation of [0001 ]. The material of the N-type semiconductor layer 20 may be N-type doped (e.g., silicon) gan. The P-type semiconductor layer 40 may be P-type doped (e.g., mg) gan.
Further, the thickness of the N-type semiconductor layer 20 may be 1 to 5 μm, preferably 3 μm; the doping concentration of the N-type dopant in the N-type semiconductor layer 20 may be 1018cm-3～1019cm-3Preferably 5 x 1018cm-3. The thickness of the P-type semiconductor layer 40 may be 100nm to 800nm, preferably 450 nm; the doping concentration of the P-type dopant in the P-type semiconductor layer 40 may be 1018/cm3～1020/cm3Preferably 1019/cm3。
In practical applications, the substrate 10 may be provided with a patterned silicon dioxide layer, so as to reduce the dislocation density of the GaN epitaxial material, and change the light exit angle to improve the light extraction efficiency. Specifically, a layer of silicon dioxide material can be laid on a sapphire substrate; forming a photoresist with a certain pattern on the silicon dioxide material by adopting a photoetching technology; then removing the silicon dioxide material which is not covered by the photoresist by adopting a dry etching technology, and forming a patterned silicon dioxide layer by using the left silicon dioxide material; and finally removing the photoresist.
Optionally, as shown in fig. 1, the gan-based led epitaxial wafer may further include a buffer layer 51, where the buffer layer 51 is disposed between the substrate 10 and the N-type semiconductor layer 20 to relieve stress and defects generated by lattice mismatch between the substrate material and the gan and provide nucleation centers for epitaxial growth of the gan material.
Specifically, gallium nitride may be used as the material of the buffer layer 51.
Further, the thickness of the buffer layer 51 may be 15nm to 35nm, preferably 25 nm.
Preferably, as shown in fig. 1, the gan-based led epitaxial wafer may further include an undoped gan layer 52, where the undoped gan layer 52 is disposed between the buffer layer 51 and the N-type semiconductor layer 20 to further alleviate stress and defects caused by lattice mismatch between the substrate material and the gan, and provide a growth surface with good crystal quality for the main structure of the epitaxial wafer.
In a specific implementation, the buffer layer is a thin layer of gallium nitride that is first grown at low temperature on the patterned substrate, and is therefore also referred to as a low temperature buffer layer. Then, the longitudinal growth of gallium nitride is carried out on the low-temperature buffer layer, and a plurality of mutually independent three-dimensional island-shaped structures called three-dimensional nucleation layers can be formed; then, transverse growth of gallium nitride is carried out on all the three-dimensional island structures and among the three-dimensional island structures to form a two-dimensional plane structure which is called a two-dimensional recovery layer; and finally, growing a thicker gallium nitride layer called an intrinsic gallium nitride layer on the two-dimensional growth layer at a high temperature. The three-dimensional nucleation layer, two-dimensional recovery layer, and intrinsic gallium nitride layer are collectively referred to as undoped gallium nitride layer in this embodiment.
Further, the thickness of the undoped gallium nitride layer 52 may be 1 μm to 5 μm, preferably 3 μm.
Optionally, as shown in fig. 1, the gan-based LED epitaxial wafer may further include an electron blocking layer 61, where the electron blocking layer 61 is disposed between the active layer 30 and the P-type semiconductor layer 40 to prevent electrons from jumping into the P-type semiconductor layer to combine with holes in a non-radiative manner, thereby reducing the light emitting efficiency of the LED.
Specifically, the electron blocking layer 61 may be made of P-type doped aluminum gallium nitride, such as AlyGa1-yN，0.1＜y＜0.5。
Further, the thickness of the electron blocking layer 61 may be 50nm to 150nm, preferably 100 nm.
Preferably, as shown in fig. 1, the gan-based led epitaxial wafer may further include a low temperature P-type layer 62, where the low temperature P-type layer 62 is disposed between the active layer 30 and the electron blocking layer 61, so as to avoid indium atoms in the active layer from being precipitated due to a high growth temperature of the electron blocking layer, which affects the light emitting efficiency of the led.
Specifically, the material of the low temperature P-type layer 62 may be the same as the material of the P-type semiconductor layer 40. In the present embodiment, the material of the low temperature P-type layer 62 may be P-type doped gan.
Further, the thickness of the low-temperature P-type layer 62 may be 10nm to 50nm, preferably 30 nm; the doping concentration of the P-type dopant in the low temperature P-type layer 62 may be 1018/cm3～1020/cm3Preferably 1019/cm3。
Optionally, as shown in fig. 1, the gan-based led epitaxial wafer may further include a contact layer 70, where the contact layer 70 is disposed on the P-type semiconductor layer 40 to form an ohmic contact with an electrode or a transparent conductive film formed in a chip manufacturing process.
Specifically, the contact layer 70 may be made of P-type doped indium gallium nitride or gallium nitride.
Further, the thickness of the contact layer 70 may be 5nm to 300nm, preferably 100 nm; the doping concentration of the P-type dopant in the contact layer 70 may be 1021/cm3～1022/cm3Preferably 5 x 1021/cm3。
The embodiment of the invention provides a method for manufacturing a gallium nitride-based light-emitting diode epitaxial wafer, which is suitable for manufacturing the gallium nitride-based light-emitting diode epitaxial wafer shown in figure 1. Fig. 4 is a flowchart of a method for manufacturing an epitaxial wafer of a gallium nitride-based light emitting diode according to an embodiment of the present invention. Referring to fig. 4, the manufacturing method includes:
step 201: a substrate is provided.
Optionally, the step 201 may include:
controlling the temperature to be 1000-1200 ℃ (preferably 1100 ℃), and annealing the substrate for 6-10 minutes (preferably 8 minutes) in a hydrogen atmosphere;
the substrate is subjected to a nitridation process.
The surface of the substrate is cleaned through the steps, impurities are prevented from being doped into the epitaxial wafer, and the growth quality of the epitaxial wafer is improved.
Step 202: an N-type semiconductor layer, an active layer and a P-type semiconductor layer are sequentially formed on a substrate.
In the present embodiment, the active layer includes a plurality of periodic structures sequentially stacked, each periodic structure including a quantum well and a quantum barrier sequentially stacked. A plurality of composite structures are inserted into the quantum barrier, and each composite structure comprises a P-type doped gallium nitride layer, an undoped aluminum gallium nitride layer and an N-type doped gallium nitride layer which are sequentially stacked.
Alternatively, the growth temperature of the composite structure may be 850 ℃ to 959 ℃. The growth conditions of the quantum barrier are consistent, and the realization is convenient.
Alternatively, the growth pressure of the composite structure may be 100torr to 500 torr. The growth conditions of the quantum barrier are consistent, and the realization is convenient.
Preferably, the growth pressure of the undoped aluminum gallium nitride layer may be smaller than that of the quantum barrier to facilitate the doping of aluminum.
In this embodiment, the growth temperature of the quantum well may be 720 ℃ to 829 ℃, preferably 760 ℃; the growth pressure of the quantum well may be 100to 500torr, and preferably 300 torr. The growth temperature of the quantum barrier can be 850-959 ℃, and is preferably 900 ℃; the growth pressure of the quantum barrier may be 100to 500torr, and preferably 300 torr.
Specifically, this step 202 may include:
a first step of growing an N-type semiconductor layer on a substrate at a temperature of 1000 ℃ to 1200 ℃ (preferably 1100 ℃) and a pressure of 100torr to 500torr (preferably 300 torr);
secondly, growing an active layer on the N-type semiconductor layer;
and thirdly, controlling the temperature to be 850-1080 ℃ (preferably 960 ℃) and the pressure to be 100-300 torr (preferably 200torr), and growing the P-type semiconductor layer on the active layer.
Optionally, before the first step, the manufacturing method may further include:
a buffer layer is grown on a substrate.
Accordingly, an N-type semiconductor layer is grown on the buffer layer.
Specifically, growing a buffer layer on a substrate may include:
controlling the temperature to be 400-600 ℃ (preferably 500 ℃), and the pressure to be 400-600 torr (preferably 500torr), and growing a buffer layer on the substrate;
the buffer layer is subjected to in-situ annealing treatment for 5 to 10 minutes (preferably 8 minutes) at a controlled temperature of 1000 to 1200 c (preferably 1100 c) and a pressure of 400to 600torr (preferably 500 torr).
Preferably, after growing the buffer layer on the substrate, the manufacturing method may further include:
and growing an undoped gallium nitride layer on the buffer layer.
Accordingly, an N-type semiconductor layer is grown on the undoped gallium nitride layer.
Specifically, growing an undoped gallium nitride layer on the buffer layer may include:
an undoped gallium nitride layer is grown on the buffer layer at a temperature of 1000 ℃ to 1100 ℃ (preferably 1050 ℃) and a pressure of 100torr to 500torr (preferably 300 torr).
Optionally, before the second step, the manufacturing method may further include:
and growing a stress release layer on the N-type semiconductor layer.
Accordingly, an active layer is grown on the stress relieving layer.
Specifically, growing the stress relief layer on the N-type semiconductor layer may include:
the temperature is controlled to be 800 ℃ to 1100 ℃ (preferably 950 ℃) and the pressure is controlled to be 100torr to 500torr (preferably 300torr), and the stress release layer is grown on the N-type semiconductor layer.
Optionally, before the third step, the manufacturing method may further include:
an electron blocking layer is grown on the active layer.
Accordingly, a P-type semiconductor layer is grown on the electron blocking layer.
Specifically, growing an electron blocking layer on the active layer may include:
the temperature is controlled to be 850 ℃ to 1080 ℃ (preferably 960 ℃), the pressure is controlled to be 200torr to 500torr (preferably 350torr), and the electron blocking layer is grown on the active layer.
Preferably, before growing the electron blocking layer on the active layer, the manufacturing method may further include:
a low temperature P-type layer is grown on the active layer.
Accordingly, an electron blocking layer is grown on the low temperature P-type layer.
Specifically, growing the low temperature P-type layer on the active layer may include:
the temperature is controlled to be 600 ℃ to 850 ℃ (preferably 750 ℃) and the pressure is controlled to be 100torr to 600torr (preferably 300torr), and the low-temperature P type layer is grown on the active layer.
Optionally, after the third step, the manufacturing method may further include:
and growing a contact layer on the P-type semiconductor layer.
Specifically, growing a contact layer on the P-type semiconductor layer may include:
the contact layer is grown on the P-type semiconductor layer at a temperature of 850 to 1050 deg.C (preferably 950 deg.C) and a pressure of 100to 300torr (preferably 200 torr).
After the completion of the epitaxial growth, the temperature is lowered to 650 to 850 ℃ (preferably 750 ℃), the epitaxial wafer is annealed in a nitrogen atmosphere for 5 to 15 minutes (preferably 10 minutes), and then the temperature of the epitaxial wafer is lowered to room temperature.
The control of the temperature and the pressure both refer to the control of the temperature and the pressure in a reaction chamber for growing the epitaxial wafer, and specifically refer to the reaction chamber of a Metal-organic Chemical Vapor Deposition (MOCVD) device. During implementation, trimethyl gallium or triethyl gallium is used as a gallium source, high-purity ammonia gas is used as a nitrogen source, trimethyl indium is used as an indium source, trimethyl aluminum is used as an aluminum source, silane is used as an N-type dopant, and magnesium diclocide is used as a P-type dopant.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (9)

1. A gallium nitride-based light emitting diode epitaxial wafer comprises a substrate, an N-type semiconductor layer, an active layer and a P-type semiconductor layer, wherein the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially laminated on the substrate; the active layer comprises a plurality of periodic structures which are sequentially stacked, and each periodic structure comprises a quantum well and a quantum barrier which are sequentially stacked; the quantum barrier is characterized in that a plurality of composite structures are inserted into the quantum barrier, and each composite structure comprises a P-type doped gallium nitride layer, an undoped aluminum gallium nitride layer and an N-type doped gallium nitride layer which are sequentially stacked;
the content of the aluminum component in the undoped aluminum gallium nitride layer is 0.04-0.5.
2. The gan-based led epitaxial wafer according to claim 1, wherein the N-type doped gan layer uses germanium as an N-type dopant.
3. The GaN-based LED epitaxial wafer as claimed in claim 2, wherein the doping concentration of Ge in the N-type doped GaN layer is 5 x 1016/cm3～6*1017/cm3。
4. The GaN-based LED epitaxial wafer according to any one of claims 1 to 3, wherein the doping concentration of the P-type dopant in the P-type doped GaN layer is 5 x 1015/cm3～6*1017/cm3。
5. The GaN-based LED epitaxial wafer according to any one of claims 1 to 3, wherein the number of the composite structures is 2-10.
6. The GaN-based LED epitaxial wafer according to any one of claims 1 to 3, wherein the thickness of the composite structure is 0.5nm to 8 nm.
7. A manufacturing method of a gallium nitride-based light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing a substrate;
sequentially forming an N-type semiconductor layer, an active layer and a P-type semiconductor layer on the substrate;
the active layer comprises a plurality of periodic structures which are sequentially stacked, and each periodic structure comprises a quantum well and a quantum barrier which are sequentially stacked; the quantum barrier is inserted with a plurality of composite structures, each composite structure comprises a P-type doped gallium nitride layer, an undoped aluminum gallium nitride layer and an N-type doped gallium nitride layer which are sequentially stacked, and the content of aluminum components in the undoped aluminum gallium nitride layer is 0.04-0.5.
8. The method of claim 7, wherein the growth temperature of the composite structure is 850 ℃ to 959 ℃.
9. The method of claim 7 or 8, wherein the growth pressure of the composite structure is 100to 500 torr.
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Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103035790A (en) * 2012-12-13 2013-04-10 华灿光电股份有限公司 Light emitting diode epitaxial wafer and preparation method thereof
CN104795476A (en) * 2015-04-24 2015-07-22 广西盛和电子科技股份有限公司 Epitaxial structure of gallium nitride LED
CN105405939A (en) * 2015-12-02 2016-03-16 华灿光电(苏州）有限公司 Light-emitting diode and manufacturing method thereof
CN105932125A (en) * 2016-05-17 2016-09-07 太原理工大学 GaN-base green light LED epitaxial structure and preparation method therefor
CN105932123A (en) * 2016-05-18 2016-09-07 扬州中科半导体照明有限公司 Nitride light-emitting diode epitaxial wafer with low-temperature AlInN insertion barrier layer, and production technology for nitride light-emitting diode epitaxial wafer
CN106057995A (en) * 2016-05-31 2016-10-26 华灿光电(苏州）有限公司 Nitride-based luminous diode epitaxial wafer and manufacturing method thereof
CN106098862A (en) * 2016-06-16 2016-11-09 厦门乾照光电股份有限公司 A kind of LED epitaxial growing method with well region doping
CN108336198A (en) * 2017-12-26 2018-07-27 华灿光电（浙江）有限公司 Light emitting diode epitaxial wafer and manufacturing method thereof
CN108695416A (en) * 2018-03-26 2018-10-23 华灿光电（浙江）有限公司 A kind of LED epitaxial slice and preparation method thereof

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103035790A (en) * 2012-12-13 2013-04-10 华灿光电股份有限公司 Light emitting diode epitaxial wafer and preparation method thereof
CN104795476A (en) * 2015-04-24 2015-07-22 广西盛和电子科技股份有限公司 Epitaxial structure of gallium nitride LED
CN105405939A (en) * 2015-12-02 2016-03-16 华灿光电(苏州）有限公司 Light-emitting diode and manufacturing method thereof
CN105932125A (en) * 2016-05-17 2016-09-07 太原理工大学 GaN-base green light LED epitaxial structure and preparation method therefor
CN105932123A (en) * 2016-05-18 2016-09-07 扬州中科半导体照明有限公司 Nitride light-emitting diode epitaxial wafer with low-temperature AlInN insertion barrier layer, and production technology for nitride light-emitting diode epitaxial wafer
CN106057995A (en) * 2016-05-31 2016-10-26 华灿光电(苏州）有限公司 Nitride-based luminous diode epitaxial wafer and manufacturing method thereof
CN106098862A (en) * 2016-06-16 2016-11-09 厦门乾照光电股份有限公司 A kind of LED epitaxial growing method with well region doping
CN108336198A (en) * 2017-12-26 2018-07-27 华灿光电（浙江）有限公司 Light emitting diode epitaxial wafer and manufacturing method thereof
CN108695416A (en) * 2018-03-26 2018-10-23 华灿光电（浙江）有限公司 A kind of LED epitaxial slice and preparation method thereof

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