CN109065675B - Gallium nitride-based light emitting diode epitaxial wafer and growth method thereof - Google Patents

Gallium nitride-based light emitting diode epitaxial wafer and growth method thereof Download PDF

Info

Publication number
CN109065675B
CN109065675B CN201810650541.7A CN201810650541A CN109065675B CN 109065675 B CN109065675 B CN 109065675B CN 201810650541 A CN201810650541 A CN 201810650541A CN 109065675 B CN109065675 B CN 109065675B
Authority
CN
China
Prior art keywords
layer
type
temperature
low
gallium nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201810650541.7A
Other languages
Chinese (zh)
Other versions
CN109065675A (en
Inventor
程丁
韦春余
周飚
胡加辉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HC Semitek Zhejiang Co Ltd
Original Assignee
HC Semitek Zhejiang Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HC Semitek Zhejiang Co Ltd filed Critical HC Semitek Zhejiang Co Ltd
Priority to CN201810650541.7A priority Critical patent/CN109065675B/en
Publication of CN109065675A publication Critical patent/CN109065675A/en
Application granted granted Critical
Publication of CN109065675B publication Critical patent/CN109065675B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention discloses a gallium nitride-based light emitting diode epitaxial wafer and a growth method thereof, belonging to the technical field of semiconductors. The GaN-based light emitting diode epitaxial wafer comprises a substrate, a buffer layer, an N-type layer, an active layer, a low-temperature P-type layer, an electronic barrier layer and a high-temperature P-type layer, wherein the buffer layer, the N-type layer, the active layer, the low-temperature P-type layer, the electronic barrier layer and the high-temperature P-type layer are sequentially stacked on the substrate, the low-temperature P-type layer is made of P-type doped aluminum gallium nitride, and the electronic barrier layer is made of a P-type doped aluminum indium gallium nitride layer. According to the invention, the material of the low-temperature P-type layer is changed into the P-type doped aluminum gallium nitride, the barrier height of the low-temperature P-type layer is increased by utilizing the higher barrier of the aluminum component, meanwhile, the material of the electron barrier layer is changed into the P-type doped aluminum indium gallium nitride layer, the barrier height of the electron barrier layer is reduced by utilizing the lower barrier of the indium component, and the luminous efficiency of the LED is finally improved.

Description

Gallium nitride-based light emitting diode epitaxial wafer and growth method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to a gallium nitride-based light emitting diode epitaxial wafer and a growth method thereof.
Background
A Light Emitting Diode (LED) is a semiconductor electronic component capable of Emitting Light. Gallium nitride (GaN) has good thermal conductivity, and also has excellent properties of high temperature resistance, acid and alkali resistance, high hardness, and the like, and is widely applied to light emitting diodes of various wave bands. The core component of the gallium nitride-based light emitting diode is a chip, and the chip comprises an epitaxial wafer and an electrode arranged on the epitaxial wafer.
The conventional gallium nitride-based light emitting diode epitaxial wafer comprises a substrate, a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer, wherein the buffer layer, the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially laminated on the substrate. The P-type semiconductor layer is used for providing holes for carrying out compound luminescence, the N-type semiconductor layer is used for providing electrons for carrying out compound luminescence, the active layer is used for carrying out radiation compound luminescence of the electrons and the holes, and the substrate is used for providing a growth surface for the epitaxial material; the substrate is made of sapphire, the N-type semiconductor layer is made of N-type doped gallium nitride, the sapphire and the gallium nitride are heterogeneous materials, large lattice mismatch exists between the sapphire and the gallium nitride, and the buffer layer is used for relieving the lattice mismatch between the substrate and the N-type semiconductor layer.
The number of electrons provided by the N-type semiconductor layer is much greater than the number of holes of the P-type semiconductor layer, plus the volume of electrons is much smaller than the volume of holes, resulting in the number of electrons injected into the active layer being much greater than the number of holes. In order to avoid the electrons provided by the N-type semiconductor layer from migrating into the P-type semiconductor layer and non-radiatively recombining with the holes, an electron blocking layer is typically provided between the active layer and the P-type semiconductor layer to block the electrons from migrating from the active layer to the P-type semiconductor layer.
The active layer is mainly made of indium gallium nitride, the electron blocking layer is usually made of aluminum gallium nitride, and the growth temperature of the aluminum gallium nitride is high, so that indium atoms in the active layer can be analyzed, and the recombination luminescence of electrons and holes in the active layer is influenced. In order to avoid indium atom analysis in the active layer caused by high-temperature growth of the electron blocking layer, a low-temperature P-type layer is arranged between the active layer and the electron blocking layer, so that the active layer is prevented from being influenced by high temperature of the electron blocking layer.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
the material of the low-temperature P-type layer is usually selected as the P-type semiconductor layer, i.e., P-type doped gallium nitride, so that the low-temperature P-type layer can also provide holes for recombination light emission. When electrons provided by the N-type semiconductor layer are transited to the low-temperature P-type layer, the electrons and holes in the low-temperature P-type layer are subjected to non-radiative recombination, the radiative recombination light-emitting efficiency of the electrons and the holes is influenced, and the light-emitting efficiency of the LED is low.
Disclosure of Invention
The embodiment of the invention provides a gallium nitride-based light-emitting diode epitaxial wafer and a growth method thereof, which can solve the problem that in the prior art, electrons are easy to jump into a low-temperature P-type layer to be non-radiatively compounded with holes, so that the luminous efficiency of an LED is low. The technical scheme is as follows:
in one aspect, an embodiment of the present invention provides a gallium nitride-based light emitting diode epitaxial wafer, where the gallium nitride-based light emitting diode epitaxial wafer includes a substrate, a buffer layer, an N-type layer, an active layer, a low-temperature P-type layer, an electron blocking layer, and a high-temperature P-type layer, where the buffer layer, the N-type layer, the active layer, the low-temperature P-type layer, the electron blocking layer, and the high-temperature P-type layer are sequentially stacked on the substrate, the low-temperature P-type layer is made of P-type doped aluminum gallium nitride, and the electron blocking layer is made of a P-type doped aluminum indium gallium nitride layer.
Optionally, a molar content of the aluminum component in the low-temperature P-type layer is less than a molar content of the aluminum component in the electron blocking layer.
Preferably, the molar content of the aluminum component in the low-temperature P-type layer is 0.05-0.1.
Preferably, the molar content of the aluminum component in the electron blocking layer is 0.1-0.5.
Optionally, the molar content of the indium component in the electron blocking layer is 0.05-0.3.
Optionally, a doping concentration of a P-type dopant in the low-temperature P-type layer is higher than a doping concentration of a P-type dopant in the high-temperature P-type layer.
Preferably, the doping concentration of the P-type dopant in the low-temperature P-type layer is 1020/cm3~1021/cm3
Optionally, the doping concentration of the P-type dopant in the electron blocking layer is lower than the doping concentration of the P-type dopant in the high-temperature P-type layer.
Preferably, the doping concentration of the P-type dopant in the electron blocking layer is 1017/cm3~1018/cm3
On the other hand, the embodiment of the invention provides a growth method of a gallium nitride-based light emitting diode epitaxial wafer, which comprises the following steps:
providing a substrate;
sequentially growing a buffer layer, an N-type layer, an active layer, a low-temperature P-type layer, an electron blocking layer and a high-temperature P-type layer on the substrate;
the low-temperature P-type layer is made of P-type doped aluminum gallium nitride, and the electron blocking layer is made of P-type doped aluminum indium gallium nitride.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
the material of the low-temperature P-type layer is changed into P-type doped aluminum gallium nitride, the barrier height of the low-temperature P-type layer is improved by utilizing the higher barrier of the aluminum component, electrons provided by the N-type semiconductor layer can be effectively prevented from jumping into the low-temperature P-type layer to be non-radiatively compounded with holes in the low-temperature P-type layer, the non-radiatively compounded luminescence of the electrons and the holes is further prevented from influencing the radiative recombination luminescence of the electrons and the holes, and the luminous efficiency of the LED is improved. And the low-temperature P-type layer still adopts P-type doping, and can also provide holes which are injected into the active layer and emit light by radiation recombination with electrons, increase the number of the holes which emit light by radiation recombination with the electrons in the active layer, increase the light-emitting efficiency of the recombination of the electrons and the holes in the active layer, and further improve the light-emitting efficiency of the LED. Meanwhile, the material of the electron blocking layer is changed into a P-type doped aluminum indium gallium nitride layer, the potential barrier height of the electron blocking layer is reduced by utilizing the low potential barrier of the indium component, and the phenomenon that the hole injection of the high-temperature P-type layer into the active layer is influenced by the too high potential barrier between the active layer and the P-type semiconductor layer to carry out radiation composite luminescence with electrons is avoided, so that the negative influence on the luminous efficiency of the LED is avoided, and the luminous efficiency of the LED is equivalently improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a gan-based led epitaxial wafer according to an embodiment of the present invention;
fig. 2 is a flowchart of a method for growing a gan-based led epitaxial wafer according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
An embodiment of the present invention provides a gallium nitride-based light emitting diode epitaxial wafer, where fig. 1 is a schematic structural diagram of the gallium nitride-based light emitting diode epitaxial wafer provided in the embodiment of the present invention, and referring to fig. 1, the gallium nitride-based light emitting diode epitaxial wafer includes a substrate 10, a buffer layer 20, an N-type layer 30, an active layer 40, a low-temperature P-type layer 50, an electron blocking layer 60, and a high-temperature P-type layer 70, and the buffer layer 20, the N-type layer 30, the active layer 40, the low-temperature P-type layer 50, the electron blocking layer 60, and the high-temperature P-type layer 70 are sequentially stacked on the substrate.
In the present embodiment, the low temperature P-type layer 50 is made of P-type doped aluminum gallium nitride, and the electron blocking layer 60 is made of P-type doped aluminum indium gallium nitride.
According to the embodiment of the invention, the material of the low-temperature P-type layer is changed into P-type doped aluminum gallium nitride, the barrier height of the low-temperature P-type layer is improved by utilizing the higher barrier of the aluminum component, electrons provided by the N-type semiconductor layer can be effectively prevented from jumping into the low-temperature P-type layer to be non-radiatively compounded with holes in the low-temperature P-type layer, the non-radiatively compounded luminescence of the electrons and the holes is further prevented from being influenced, and the luminous efficiency of the LED is improved. And the low-temperature P-type layer still adopts P-type doping, and can also provide holes which are injected into the active layer and emit light by radiation recombination with electrons, increase the number of the holes which emit light by radiation recombination with the electrons in the active layer, increase the light-emitting efficiency of the recombination of the electrons and the holes in the active layer, and further improve the light-emitting efficiency of the LED. Meanwhile, the material of the electron blocking layer is changed into a P-type doped aluminum indium gallium nitride layer, the potential barrier height of the electron blocking layer is reduced by utilizing the low potential barrier of the indium component, and the phenomenon that the hole injection of the high-temperature P-type layer into the active layer is influenced by the too high potential barrier between the active layer and the P-type semiconductor layer to carry out radiation composite luminescence with electrons is avoided, so that the negative influence on the luminous efficiency of the LED is avoided, and the luminous efficiency of the LED is equivalently improved.
Alternatively, the molar content of the aluminum component in the low-temperature P-type layer 50 may be smaller than the molar content of the aluminum component in the electron blocking layer 60.
The molar content of the aluminum component in the low-temperature P-type layer is limited to be smaller than that of the aluminum component in the electron blocking layer, so that the barrier height of the low-temperature P-type layer is lower than that of the electron blocking layer, the low-temperature P-type layer is matched with the electron blocking layer, electrons can be effectively prevented from jumping into the high-temperature P-type layer to be subjected to non-radiative recombination with holes, and the hole injection of the high-temperature P-type layer is facilitated to be injected into the active layer to be subjected to radiative recombination with the electrons to emit light.
Preferably, the molar content of the aluminum component in the low-temperature P-type layer 50 may be 0.05 to 0.1, such as 0.08.
If the molar content of the aluminum component in the low-temperature P-type layer is less than 0.05, electrons can not be effectively prevented from migrating into the low-temperature P-type layer to be non-radiatively compounded with holes due to too small molar content of the aluminum component in the low-temperature P-type layer, so that the luminous efficiency of the LED is influenced; if the molar content of the aluminum component in the low-temperature P-type layer is greater than 0.1, a certain obstruction may be caused to the radiation recombination luminescence of electrons and holes injected into the active layer due to the too large molar content of the aluminum component in the low-temperature P-type layer, and the luminous efficiency of the LED may be affected.
Preferably, the molar content of the aluminum component in the electron blocking layer 60 may be 0.1 to 0.5, such as 0.3.
If the molar content of the aluminum component in the electron blocking layer is less than 0.1, the electron cannot be effectively prevented from jumping into the high-temperature P-type layer to be non-radiatively compounded with the hole due to too small molar content of the aluminum component in the electron blocking layer, so that the luminous efficiency of the LED is influenced; if the molar content of the aluminum component in the electron blocking layer is greater than 0.5, a certain obstruction may be caused to the hole injection into the active layer to perform radiative recombination luminescence with electrons due to too large molar content of the aluminum component in the electron blocking layer, and the luminous efficiency of the LED may be affected.
Alternatively, the molar content of the indium component in the electron blocking layer 60 may be 0.05 to 0.3, such as 0.15.
If the molar content of the indium component in the electron blocking layer is less than 0.05, the potential barrier height of the electron blocking layer cannot be effectively reduced due to too small molar content of the indium component in the electron blocking layer, so that the potential barrier of the electron blocking layer is higher, hole injection of the high-temperature P-type layer into the active layer is influenced to perform radiation recombination luminescence with electrons, and the luminous efficiency of the LED is reduced; if the molar content of the indium component in the electron blocking layer is greater than 0.3, the molar content of the indium component in the electron blocking layer is too high, which may cause too low potential barrier of the electron blocking layer, and the electron cannot be effectively blocked from jumping into the high-temperature P-type layer to carry out non-radiative recombination with holes, thereby affecting the luminous efficiency of the LED.
Alternatively, the doping concentration of the P-type dopant in the low-temperature P-type layer 50 may be higher than that in the high-temperature P-type layer 70.
By limiting the doping concentration of the P-type dopant in the low-temperature P-type layer to be higher than that of the P-type dopant in the high-temperature P-type layer, more holes can be injected into the active layer, the hole concentration in the active layer can be improved, and the light emitting efficiency of the LED can be improved.
Preferably, the doping concentration of the P-type dopant in the low-temperature P-type layer 50 may be 1020/cm3~1021/cm3E.g. 5 x 1020/cm3
If the doping concentration of the P-type dopant in the low-temperature P-type layer is less than 1020/cm3The doping concentration of the P-type dopant in the low-temperature P-type layer is too low, so that a sufficient number of holes and electrons are not injected into the active layer to perform radiative recombination and light emission, which may affect the light emitting efficiency of the LED; if the doping concentration of the P-type dopant in the low-temperature P-type layer is higher than 1021/cm3The doping concentration of the P-type dopant in the low-temperature P-type layer is too high, so that the impurities in the low-temperature P-type layer are too much, the quality is poor, and the light emitting efficiency of the LED is negatively affected.
Alternatively, the doping concentration of the P-type dopant in the electron blocking layer 60 may be lower than the doping concentration of the P-type dopant in the high temperature P-type layer 70.
By limiting the doping concentration of the P-type dopant in the electron blocking layer to be lower than that of the P-type dopant in the high-temperature P-type layer, holes in the high-temperature P-type layer are injected into the active layer to perform radiation recombination luminescence with electrons, and the luminous efficiency of the LED is improved.
Preferably, the electron blocking layer 60 is doped P-typeThe doping concentration of the agent may be 1017/cm3~1018/cm3
If the doping concentration of the P-type dopant in the electron blocking layer is less than 1017/cm3The migration of holes into the active layer may be affected due to too low doping concentration of the P-type dopant in the electron blocking layer, which affects the light emitting efficiency of the LED; if the doping concentration of the P-type dopant in the electron blocking layer is higher than 1018/cm3Therefore, the doping concentration of the P-type dopant in the electron blocking layer is too high, which may affect the injection of holes in the high-temperature P-type layer into the active layer to perform radiative recombination with electrons to emit light, thereby negatively affecting the light emitting efficiency of the LED.
Specifically, sapphire may be used as the material of the substrate 10. Aluminum nitride (AlN) may be used as the material of the buffer layer 20. The material of the N-type semiconductor layer 30 may be N-type doped gallium nitride. The active layer 40 may include a plurality of quantum wells and a plurality of quantum barriers, which are alternately stacked; the quantum well may be indium gallium nitride (InGaN), and the quantum barrier may be gallium nitride (gan). The material of the high-temperature P-type layer 70 may be P-type doped gallium nitride.
Specifically, the thickness of the buffer layer 20 may be 80nm to 150nm, preferably 120 nm. The thickness of the N-type semiconductor layer 30 may be 1.2 to 6 μm, preferably 3.6 μm; the doping concentration of the N-type dopant in the N-type semiconductor layer 30 may be 1018cm-3~1019cm-3Preferably 5 x 1018cm-3. The thickness of the quantum well can be 0.5 nm-4.5 nm, preferably 2.5 nm; the thickness of the quantum barrier can be 7 nm-20 nm, preferably 13.5 nm; the number of quantum wells is the same as the number of quantum barriers, and the number of quantum barriers may be 6 to 12, preferably 9. The thickness of the high-temperature P-type layer 70 may be 80nm to 800nm, preferably 440 nm; the doping concentration of the P-type dopant in the high temperature P-type layer 70 may be 1019/cm3~1020/cm3Preferably 5 x 1019cm-3
Optionally, as shown in fig. 1, the gan-based led epitaxial wafer may further include undoped gan 81, and the undoped gan layer 81 is disposed between the buffer layer 20 and the N-type semiconductor layer 30to alleviate lattice mismatch between the substrate and the N-type semiconductor layer.
Further, the thickness of the undoped gallium nitride layer 81 may be 0.4 to 4.8 μm, preferably 2.6 μm.
In a specific implementation, the buffer layer is a thin layer of gallium nitride that is first grown on the substrate at a low temperature, and is therefore also referred to as a low temperature buffer layer. Then, the longitudinal growth of gallium nitride is carried out on the low-temperature buffer layer, and a plurality of mutually independent three-dimensional island-shaped structures called three-dimensional nucleation layers can be formed; then, transverse growth of gallium nitride is carried out on all the three-dimensional island structures and among the three-dimensional island structures to form a two-dimensional plane structure which is called a two-dimensional recovery layer; and finally, growing a thicker gallium nitride layer called a high-temperature buffer layer on the two-dimensional growth layer at a high temperature. The three-dimensional nucleation layer, the two-dimensional recovery layer, and the high-temperature buffer layer are collectively referred to as an undoped gallium nitride layer in this embodiment.
Optionally, as shown in fig. 1, the light emitting diode epitaxial wafer may further include a stress relief layer 82, and the stress relief layer 82 is disposed between the N-type semiconductor layer 30 and the active layer 40 to relieve stress and defects generated during the epitaxial growth process, so as to improve the growth quality of the active layer, and further improve the light emitting efficiency of the LED.
Specifically, the stress release layer 82 may include a plurality of first sublayers and a plurality of second sublayers, which are alternately stacked; the first sub-layer may be made of indium gallium nitride, and the second sub-layer may be made of gallium nitride.
Further, the thickness of the indium gallium nitride layer can be 1nm to 3nm, preferably 2 nm; the thickness of the gallium nitride layer can be 20 nm-40 nm, preferably 30 nm; the number of the indium gallium nitride layers is the same as that of the gallium nitride layers, and the number of the gallium nitride layers may be 3 to 9, preferably 6.
Optionally, as shown in fig. 1, the light emitting diode epitaxial wafer may further include a P-type contact layer 83, and the P-type contact layer 83 is laid on the high-temperature P-type layer 70 to form an ohmic contact with an electrode or a transparent conductive film formed in a chip manufacturing process.
Specifically, the P-type contact layer 83 may be made of P-type doped indium gallium nitride.
Further, the thickness of the P-type contact layer 83 may be 5nm to 200nm, preferably 102.5 nm; the doping concentration of the P-type dopant in the P-type contact layer 83 may be 1021/cm3~1022/cm3Preferably 6 x 1021/cm3
The embodiment of the invention provides a growth method of a gallium nitride-based light-emitting diode epitaxial wafer, which is suitable for growing the gallium nitride-based light-emitting diode epitaxial wafer shown in figure 1. Fig. 2 is a flowchart of a growth method of a gallium nitride-based light emitting diode epitaxial wafer according to an embodiment of the present invention, and referring to fig. 2, the growth method includes:
step 201: a substrate is provided.
Optionally, the step 201 may include:
controlling the temperature to be 1000-1200 ℃ (preferably 1100 ℃), and annealing the substrate for 6-10 minutes (preferably 8 minutes) in a hydrogen atmosphere;
the substrate is subjected to a nitridation process.
The surface of the substrate is cleaned through the steps, impurities are prevented from being doped into the epitaxial wafer, and the growth quality of the epitaxial wafer is improved.
Step 202: a buffer layer, an N-type layer, an active layer, a low-temperature P-type layer, an electron blocking layer and a high-temperature P-type layer are sequentially grown on a substrate.
The low-temperature P-type layer is made of P-type doped aluminum gallium nitride, and the electron blocking layer is made of P-type doped aluminum indium gallium nitride.
According to the embodiment of the invention, the material of the low-temperature P-type layer is changed into P-type doped aluminum gallium nitride, the barrier height of the low-temperature P-type layer is improved by utilizing the higher barrier of the aluminum component, electrons provided by the N-type semiconductor layer can be effectively prevented from jumping into the low-temperature P-type layer to be non-radiatively compounded with holes in the low-temperature P-type layer, the non-radiatively compounded luminescence of the electrons and the holes is further prevented from being influenced, and the luminous efficiency of the LED is improved. And the low-temperature P-type layer still adopts P-type doping, and can also provide holes which are injected into the active layer and emit light by radiation recombination with electrons, increase the number of the holes which emit light by radiation recombination with the electrons in the active layer, increase the light-emitting efficiency of the recombination of the electrons and the holes in the active layer, and further improve the light-emitting efficiency of the LED. Meanwhile, the material of the electron blocking layer is changed into a P-type doped aluminum indium gallium nitride layer, the potential barrier height of the electron blocking layer is reduced by utilizing the low potential barrier of the indium component, and the phenomenon that the hole injection of the high-temperature P-type layer into the active layer is influenced by the too high potential barrier between the active layer and the P-type semiconductor layer to carry out radiation composite luminescence with electrons is avoided, so that the negative influence on the luminous efficiency of the LED is avoided, and the luminous efficiency of the LED is equivalently improved.
Specifically, this step 202 may include:
firstly, forming a buffer layer on a substrate by adopting a Physical Vapor Deposition (PVD for short);
secondly, controlling the temperature to be 900-1180 ℃ (preferably 1040 ℃), and the pressure to be 30-480 torr (preferably 255torr), and growing an N-type semiconductor layer on the buffer layer;
thirdly, growing an active layer on the N-type semiconductor layer; wherein the growth temperature of the quantum well is 700 ℃ -890 ℃ (preferably 795 ℃), and the pressure is 30 torr-600 torr (preferably 345 torr); the growth temperature of the quantum barrier is 800-980 deg.C (preferably 890 deg.C), and the pressure is 10-580 torr (preferably 395 torr);
fourthly, controlling the temperature to be 500-800 ℃ (preferably 675 ℃) and the pressure to be 50-500 torr (preferably 300torr), and growing a low-temperature P-type layer on the active layer;
fifthly, controlling the temperature to be 800-1050 ℃ (preferably 850 ℃) and the pressure to be 30-300 torr (preferably 250torr), and growing an electron blocking layer on the low-temperature P-type layer;
and sixthly, controlling the temperature to be 750-1050 ℃ (preferably 900 ℃) and the pressure to be 50-450 torr (preferably 250torr), and growing a high-temperature P-type layer on the electron blocking layer.
Optionally, after the first step, the preparation method may further comprise:
the buffer layer is subjected to in-situ annealing treatment for 5to 10 minutes (preferably 8 minutes) at a controlled temperature of 1000 to 1200 c (preferably 1100 c) and a pressure of 400to 600torr (preferably 500 torr).
Optionally, before the second step, the growing method may further include:
and growing an undoped gallium nitride layer on the buffer layer.
Accordingly, an N-type semiconductor layer is grown on the undoped gallium nitride layer.
Specifically, growing an undoped gallium nitride layer on the buffer layer may include:
the undoped gallium nitride layer is grown on the buffer layer by controlling the temperature to be 800-1180 ℃ (preferably 990 ℃) and the pressure to be 120-600 torr (preferably 360 torr).
Optionally, before the third step, the growing method may further include:
and growing a stress release layer on the N-type semiconductor layer.
Accordingly, an active layer is grown on the stress relieving layer.
Specifically, growing the stress relief layer on the N-type semiconductor layer may include:
the temperature is controlled to be 550 ℃ to 900 ℃ (preferably 755 ℃), the pressure is 50torr to 500torr (preferably 400torr), and the stress release layer is grown on the N-type semiconductor layer.
Optionally, after the sixth step, the growing method may further include:
and growing a P-type contact layer on the high-temperature P-type layer.
Specifically, growing the P-type contact layer on the high-temperature P-type layer may include:
and controlling the temperature to be 800-1150 deg.C (preferably 975 deg.C) and the pressure to be 50-300 torr (preferably 175torr), and growing a P-type contact layer on the high-temperature P-type layer.
After the completion of the epitaxial growth, the temperature is lowered to 500to 900 ℃ (preferably 700 ℃), the epitaxial wafer is annealed in a nitrogen atmosphere for 5to 15 minutes (preferably 10 minutes), and then the temperature of the epitaxial wafer is lowered to room temperature.
The control of the temperature and the pressure refers to the control of the temperature and the pressure in a reaction cavity for growing the epitaxial wafer. During implementation, trimethyl gallium or trimethyl ethyl is used as a gallium source, high-purity nitrogen is used as a nitrogen source, trimethyl indium is used as an indium source, trimethyl aluminum is used as an aluminum source, silane is used as an N-type dopant, and magnesium diclocide is used as a P-type dopant.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (9)

1. The utility model provides a gallium nitride base emitting diode epitaxial wafer, gallium nitride base emitting diode epitaxial wafer includes substrate, buffer layer, N type layer, active layer, low temperature P type layer, electron barrier layer and high temperature P type layer, the buffer layer, the N type layer, the active layer, low temperature P type layer, electron barrier layer and high temperature P type layer range upon range of in proper order on the substrate, its characterized in that, the material of low temperature P type layer adopts P type doped aluminium gallium nitride, the material of electron barrier layer adopts P type doped aluminium indium gallium nitrogen layer, the molar content of indium component is 0.05 ~ 0.3 in the electron barrier layer.
2. The GaN-based LED epitaxial wafer as claimed in claim 1, wherein the molar content of the Al component in the low-temperature P-type layer is less than the molar content of the Al component in the electron blocking layer.
3. The GaN-based LED epitaxial wafer according to claim 2, wherein the molar content of the aluminum component in the low-temperature P-type layer is 0.05-0.1.
4. The GaN-based LED epitaxial wafer according to claim 2, wherein the molar content of the aluminum component in the electron blocking layer is 0.1-0.5.
5. The GaN-based LED epitaxial wafer according to any one of claims 1 to 4, wherein the doping concentration of the P-type dopant in the low-temperature P-type layer is higher than that in the high-temperature P-type layer.
6. The GaN-based LED epitaxial wafer as claimed in claim 5, wherein the doping concentration of the P-type dopant in the low-temperature P-type layer is 1020/cm3~1021/cm3
7. The GaN-based LED epitaxial wafer according to any one of claims 1 to 4, wherein the doping concentration of the P-type dopant in the electron blocking layer is lower than that of the P-type dopant in the high-temperature P-type layer.
8. The GaN-based LED epitaxial wafer as claimed in claim 7, wherein the doping concentration of the P-type dopant in the electron blocking layer is 1017/cm3~1018/cm3
9. A growth method of a gallium nitride-based light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing a substrate;
sequentially growing a buffer layer, an N-type layer, an active layer, a low-temperature P-type layer, an electron blocking layer and a high-temperature P-type layer on the substrate;
the low-temperature P-type layer is made of P-type doped aluminum gallium nitride, the electron blocking layer is made of P-type doped aluminum indium gallium nitride, and the molar content of an indium component in the electron blocking layer is 0.05-0.3.
CN201810650541.7A 2018-06-22 2018-06-22 Gallium nitride-based light emitting diode epitaxial wafer and growth method thereof Active CN109065675B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810650541.7A CN109065675B (en) 2018-06-22 2018-06-22 Gallium nitride-based light emitting diode epitaxial wafer and growth method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810650541.7A CN109065675B (en) 2018-06-22 2018-06-22 Gallium nitride-based light emitting diode epitaxial wafer and growth method thereof

Publications (2)

Publication Number Publication Date
CN109065675A CN109065675A (en) 2018-12-21
CN109065675B true CN109065675B (en) 2020-07-07

Family

ID=64820775

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810650541.7A Active CN109065675B (en) 2018-06-22 2018-06-22 Gallium nitride-based light emitting diode epitaxial wafer and growth method thereof

Country Status (1)

Country Link
CN (1) CN109065675B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113675303A (en) * 2021-08-20 2021-11-19 江西兆驰半导体有限公司 Nitride light-emitting diode epitaxial wafer and preparation method thereof
CN116154059A (en) * 2023-04-04 2023-05-23 江西兆驰半导体有限公司 Gallium nitride light-emitting diode epitaxial structure, LED and preparation method thereof

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101834248B (en) * 2010-04-21 2012-07-04 中国科学院半导体研究所 Gallium nitride light emitting diode
CN105206714A (en) * 2015-09-01 2015-12-30 映瑞光电科技(上海)有限公司 GaN-based LED epitaxy structure and preparation method thereof
TWI565095B (en) * 2015-11-09 2017-01-01 錼創科技股份有限公司 Light emitting module

Also Published As

Publication number Publication date
CN109065675A (en) 2018-12-21

Similar Documents

Publication Publication Date Title
CN109904288B (en) Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof
CN109786529B (en) Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof
CN106098882B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN109860358B (en) Gallium nitride-based light emitting diode epitaxial wafer and preparation method thereof
CN109346576B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN109860359B (en) Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof
CN109524522B (en) GaN-based light emitting diode epitaxial wafer and preparation method thereof
CN109671813B (en) GaN-based light emitting diode epitaxial wafer and preparation method thereof
CN109103303B (en) Preparation method of light-emitting diode epitaxial wafer and light-emitting diode epitaxial wafer
CN109346583B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN109065679B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN110265514B (en) Growth method of light emitting diode epitaxial wafer and light emitting diode epitaxial wafer
CN109768133B (en) Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof
CN108447952B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN109346568B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN109671817B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN109192829B (en) Gallium nitride-based light emitting diode epitaxial wafer and growth method thereof
CN109473516B (en) Gallium nitride-based light emitting diode epitaxial wafer and growth method thereof
CN109309150B (en) Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof
CN109103312B (en) Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof
CN109065675B (en) Gallium nitride-based light emitting diode epitaxial wafer and growth method thereof
CN108987544B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN109545918B (en) Gallium nitride-based light emitting diode epitaxial wafer and preparation method thereof
CN109087976B (en) Preparation method of light-emitting diode epitaxial wafer and light-emitting diode epitaxial wafer
CN108598224B (en) Manufacturing method of light emitting diode epitaxial wafer and light emitting diode epitaxial wafer

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant