CN109256445B - Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof - Google Patents
Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof Download PDFInfo
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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Abstract
The invention discloses a gallium nitride-based light emitting diode epitaxial wafer and a manufacturing method thereof, belonging to the technical field of semiconductors. The epitaxial wafer comprises a substrate, a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer, wherein the buffer layer, the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially stacked on the substrate, the P-type semiconductor layer comprises M undoped scandium aluminum nitride layers and (M +1) P-type doped gallium nitride layers, the M scandium aluminum nitride layers and the (M +1) gallium nitride layers are alternately stacked, and M is a positive integer. According to the invention, at least one undoped scandium aluminum nitride layer is inserted into the P-type doped gallium nitride layer, and stronger two-dimensional cavity gas exists at the interface of the scandium aluminum nitride layer and the gallium nitride layer, so that the transverse expansion capability of the cavity in the P-type semiconductor layer can be effectively improved, the series resistance of the LED is reduced, the forward voltage of the LED is further reduced, and the application of the LED in civil illumination is facilitated.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a gallium nitride-based light emitting diode epitaxial wafer and a manufacturing method thereof.
Background
A Light Emitting Diode (LED) is a semiconductor electronic component capable of Emitting Light. The LED has the advantages of energy conservation, environmental protection, high reliability, long service life and the like, so the LED is widely concerned, has great diversity in the fields of backlight sources and display screens in recent years, and starts to advance to the civil illumination market. For civil illumination, power saving and durability are two important criteria, so that reducing the series resistance of the LED and improving the antistatic capability of the LED are very critical.
Gallium nitride (GaN) has good thermal conductivity, and also has excellent characteristics of high temperature resistance, acid and alkali resistance, high hardness and the like, so that gallium nitride (GaN) based LEDs are receiving more and more attention and research. The conventional gallium nitride-based LED epitaxial wafer comprises a substrate, a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer, wherein the buffer layer, the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially laminated on the substrate. The P-type semiconductor layer is used for providing holes for carrying out compound luminescence, the N-type semiconductor layer is used for providing electrons for carrying out compound luminescence, the active layer is used for carrying out radiation compound luminescence of the electrons and the holes, and the substrate is used for providing a growth surface for the epitaxial material; the substrate is made of sapphire, the N-type semiconductor layer and other structures are made of gallium nitride, the sapphire and the gallium nitride are heterogeneous materials, large lattice mismatch exists between the sapphire and the gallium nitride, and the buffer layer is used for relieving the lattice mismatch between the substrate and the N-type semiconductor layer.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
in a chip process, an electrode is arranged on a partial region of a P-type semiconductor layer, and current injected into the P-type semiconductor layer through the electrode needs to be laterally expanded in the P-type semiconductor layer. The hole provided by the P-type semiconductor layer has a large volume and is difficult to move, so that the current in the P-type semiconductor layer is relatively poor in lateral expansion, and the series resistance of the LED is relatively large, so that the forward voltage of the LED is relatively high, and the application of the LED in civil illumination is influenced.
Disclosure of Invention
The embodiment of the invention provides a gallium nitride-based light emitting diode epitaxial wafer and a manufacturing method thereof, which can solve the problem that the current in the prior art has poor transverse expansion in a P-type semiconductor layer and influences the application of an LED in civil illumination. The technical scheme is as follows:
in one aspect, an embodiment of the present invention provides a gallium nitride-based light emitting diode epitaxial wafer, where the gallium nitride-based light emitting diode epitaxial wafer includes a substrate, a buffer layer, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer, where the buffer layer, the N-type semiconductor layer, the active layer, and the P-type semiconductor layer are sequentially stacked on the substrate, the P-type semiconductor layer includes M undoped scandium aluminum nitride layers and (M +1) P-type doped gallium nitride layers, the M scandium aluminum nitride layers and the (M +1) gallium nitride layers are alternately stacked, and M is a positive integer.
Optionally, the scandium-aluminum nitride layer is ScaAl1-aN layer, 0.2 < a < 0.7.
Optionally, the thickness of the scandium aluminum nitride layer is 1nm to 5 nm.
Preferably, the thickness of the gallium nitride layer is 5 to 20 times that of the scandium aluminum nitride layer.
Alternatively, 2 ≦ M ≦ 10.
Preferably, the thickness of the P-type semiconductor layer is 100nm to 300 nm.
Optionally, the doping concentration of the P-type dopant in the gallium nitride layer is 1018/cm3～1020/cm3。
In another aspect, an embodiment of the present invention provides a method for manufacturing a gallium nitride-based light emitting diode epitaxial wafer, where the method includes:
providing a substrate;
growing a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer on the substrate in sequence;
the P-type semiconductor layer comprises M undoped scandium aluminum nitride layers and (M +1) P-type doped gallium nitride layers, and the M scandium aluminum nitride layers and the (M +1) gallium nitride layers are alternately stacked.
Optionally, the growth conditions of the scandium-aluminum nitride layer are the same as the growth conditions of the gallium nitride layer, and the growth conditions include growth temperature and growth pressure.
Preferably, the growth temperature of the P-type semiconductor layer is 850-950 ℃, and the growth pressure of the P-type semiconductor layer is 100-300 torr.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
through inserting at least one undoped aluminium scandium nitride layer in the P-type doped gallium nitride layer, there is stronger two-dimensional cavity gas in the interface of aluminium scandium nitride layer and gallium nitride layer, can effectively promote the lateral expansion ability of cavity in the P-type semiconductor layer, makes the cavity that the P-type doped gallium nitride layer provided can evenly pour into the active layer into, reduces LED's series resistance, and then reduces LED's forward voltage, is favorable to the application of LED in civilian illumination.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a gan-based led epitaxial wafer according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a P-type semiconductor layer according to an embodiment of the invention;
fig. 3 is a flowchart of a method for manufacturing an epitaxial wafer of a gallium nitride-based light emitting diode according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a gallium nitride-based light emitting diode epitaxial wafer according to an embodiment of the present invention, and referring to fig. 1, the gallium nitride-based light emitting diode epitaxial wafer includes a substrate 10, a buffer layer 20, an N-type semiconductor layer 30, an active layer 40, and a P-type semiconductor layer 50, and the buffer layer 20, the N-type semiconductor layer 30, the active layer 40, and the P-type semiconductor layer 50 are sequentially stacked on the substrate 10.
Fig. 2 is a schematic structural diagram of a P-type semiconductor layer according to an embodiment of the present invention, and referring to fig. 2, in this embodiment, the P-type semiconductor layer 50 includes M undoped scandium aluminum nitride layers 51 and (M +1) P-type doped gallium nitride layers 52, where the M scandium aluminum nitride layers 51 and the (M +1) gallium nitride layers 52 are alternately stacked, and M is a positive integer.
According to the embodiment of the invention, at least one undoped scandium aluminum nitride layer is inserted into the P-type doped gallium nitride layer, and the interface of the scandium aluminum nitride layer and the gallium nitride layer has strong two-dimensional hole gas, so that the transverse expansion capability of the hole in the P-type semiconductor layer can be effectively improved, the hole provided by the P-type doped gallium nitride layer can be uniformly injected into the active layer, the series resistance of the LED is reduced, the forward voltage of the LED is further reduced, and the application of the LED in civil illumination is facilitated. And holes are uniformly injected into the active layer, so that the number of holes which are in the active layer and are subjected to compound light emission with electrons can be increased, the internal quantum efficiency of the LED is improved, and the light emitting efficiency of the LED is further improved. In addition, the crystal lattice of scandium aluminum nitride is matched with the crystal lattice of gallium nitride, so that stress and defects generated by the mismatch of the crystal lattices between sapphire and the gallium nitride can be relieved, the matching degree of the crystal lattices in the epitaxial wafer is improved, the integral crystal quality of the epitaxial wafer is optimized, the composite luminescence of electrons and holes in an active layer is facilitated, the internal quantum efficiency of the LED can be further improved, and the luminous efficiency of the LED is further improved.
Alternatively, the scandium aluminum nitride layer 51 may be ScaAl1-aAnd the N layer, a is more than 0.2 and less than 0.7, and a is preferably 0.4, so that the scandium aluminum nitride layer can be better matched with the gallium nitride layer, and the transverse expansion capability of the cavity is effectively improved.
Alternatively, the thickness of the scandium aluminum nitride layer 51 may be 1nm to 5nm, preferably 3 nm. The lateral expansion capability of the cavity is effectively improved, and meanwhile, the negative influence on the whole epitaxial wafer is avoided as much as possible, such as the increase of the series resistance of the epitaxial wafer.
Preferably, the thickness of the gallium nitride layer 52 is 5 to 20 times, preferably 12 times, the thickness of the scandium aluminum nitride layer 51. On one hand, the thickness of the gallium nitride layer is larger, the gallium nitride layer is integrally kept as gallium nitride crystals, and sufficient holes can be provided for the composite luminescence in the active layer; on the other hand, the thickness of the scandium aluminum nitride layer and the thickness of the gallium nitride layer are different within a certain range, the scandium aluminum nitride layer can be well matched with the gallium nitride layer, the transverse expansion capability of a cavity is effectively improved, and meanwhile the series resistance of an epitaxial wafer is prevented from being increased.
Alternatively, 2 ≦ M ≦ 10, M preferably 6. Under the condition of effectively improving the transverse expansion capability of the cavity, the number of each sublayer in the P-type semiconductor layer (namely the number of the scandium aluminum nitride layer and the gallium nitride layer) is reduced as much as possible, the realization is simplified, and the manufacture is convenient.
The thickness of the P-type semiconductor layer 50 is preferably 100nm to 300nm, preferably 200 nm. The thickness of the P-type semiconductor layer is not additionally increased, and the influence on the whole epitaxial wafer is reduced as much as possible.
Optionally, the doping concentration of the P-type dopant in the gallium nitride layer 52 is 1018/cm3～1020/cm3Preferably 1019/cm3. On one hand, a certain number of holes can be provided, and a sufficient number of holes are ensured to be injected into the active layer for radiation recombination luminescence; and on the other hand, the negative influence on the luminous efficiency of the LED, such as the reduction of the overall crystal quality of the epitaxial wafer, is avoided.
Specifically, sapphire (Al as a main component) may be used as the material of the substrate 102O3) Preferably, [0001 ] is used]Sapphire of crystal orientation. The buffer layer 20 may be made of gallium nitride (GaN). The active layer 40 may include a plurality of quantum wells and a plurality of quantum barriers, which are alternately stacked; the quantum well material can adopt indium gallium nitride (InGaN), preferably InxGa1-xN, x is more than 0 and less than 1; the material of the quantum barrier can adopt gallium nitride.
Further, the thickness of the buffer layer 20 may be 15nm to 40nm, preferably 25 nm. The thickness of the quantum well can be 3nm to 4nm, and is preferably 3.5 nm; the thickness of the quantum barrier can be 9 nm-15 nm, preferably 12 nm; the number of quantum wells is the same as the number of quantum barriers, and the number of quantum barriers may be 5 to 11, preferably 8.
In one implementation manner of the present embodiment, the N-type semiconductor layer 30 may include L undoped scandium aluminum nitride layers 31 and (L +1) N-type doped gallium nitride layers 32, where the L scandium aluminum nitride layers 31 and the (L +1) gallium nitride layers 32 are alternately stacked, and L is a positive integer.
By inserting at least one undoped scandium aluminum nitride layer into the N-type doped gallium nitride layer, strong two-dimensional electron gas exists at the interface of the scandium aluminum nitride layer and the gallium nitride layer, the transverse expansion capability of electrons can be effectively improved, the uniformity and consistency of the distribution of the electrons in the N-type semiconductor layer are realized without arranging a current expansion layer, the series resistance of an epitaxial wafer is reduced, and the forward voltage of the chip is reduced. And the transverse expansion capability of electrons is improved, so that the mobility of the electrons is improved, and the antistatic breakdown capability of the light-emitting diode is further improved.
Alternatively, the aluminum scandium nitride layer in the N-type semiconductor layer 30 may be ScbAl1-bAnd b is more than 0 and less than 0.6, and b is preferably 0.3, so that the scandium aluminum nitride layer can be better matched with the gallium nitride layer, and the transverse expansion capability of electrons is effectively improved.
Alternatively, the thickness of the gallium nitride layer in the N-type semiconductor layer 30 may be 5 to 20 times, preferably 12 times, the thickness of the scandium aluminum nitride layer. On one hand, the thickness of the gallium nitride layer is larger, the whole gallium nitride layer can be kept as gallium nitride crystals, and meanwhile, enough electrons are provided for composite luminescence in the active layer; on the other hand, the thickness of the scandium aluminum nitride layer and the thickness of the gallium nitride layer are different within a certain range, the scandium aluminum nitride layer can be well matched with the gallium nitride layer, the transverse expansion capability of electrons is effectively improved, and meanwhile the series resistance of an epitaxial wafer is prevented from being increased.
Alternatively, the thickness of the N-type semiconductor layer 30 may be 0.5 to 5 μm, preferably 3 μm. The thickness of the N-type semiconductor layer is not increased, and the increase of the series resistance of the epitaxial wafer is avoided.
Further, L is 10. ltoreq. L.ltoreq.30, L is preferably 20. Under the condition of effectively improving the transverse expansion capability of electrons, the number of each sublayer (namely the number of scandium aluminum nitride layers and gallium nitride layers) in the N-type semiconductor layer is reduced as much as possible, the realization is simplified, and the manufacture is convenient.
Further, the sum of the thicknesses of one scandium aluminum nitride layer and one gallium nitride layer in the N-type semiconductor layer 30 is 20nm to 250nm, preferably 140nm, so that the thickness of the entire N-type semiconductor layer is within an appropriate range in accordance with the number of scandium aluminum nitride layers and gallium nitride layers.
Alternatively, the doping concentration of the N-type dopant in the gallium nitride layer in the N-type semiconductor layer 30 may be 1018cm-3～1019cm-3Preferably 5 x 1018cm-3. On one hand, a certain amount of electrons can be provided, and the electrons with enough amount are ensured to be injected into the active layer to carry out radiation recombination with the holes for luminescence; and on the other hand, the negative influence on the luminous efficiency of the LED, such as the reduction of the overall crystal quality of the epitaxial wafer, is avoided.
In another implementation manner of the present embodiment, the material of the N-type semiconductor layer 30 may be N-type doped gallium nitride.
Further, the thickness of the N-type semiconductor layer 30 may be 1 μm to 3 μm, preferably 1.5 μm; the doping concentration of the N-type dopant in the N-type semiconductor layer 30 may be 1018cm-3～3*1019cm-3Preferably 6 x 1018cm-3。
Optionally, as shown in fig. 1, the gan-based led epitaxial wafer may further include a high temperature buffer layer 71, and the high temperature buffer layer 71 is disposed between the buffer layer 20 and the N-type semiconductor layer 30 to alleviate lattice mismatch between the substrate and the N-type semiconductor layer.
In a specific implementation, the buffer layer is a thin layer of gallium nitride that is first grown on the substrate at a low temperature, and is therefore also referred to as a low temperature buffer layer. Then, the longitudinal growth of gallium nitride is carried out on the low-temperature buffer layer, and a plurality of mutually independent three-dimensional island-shaped structures called three-dimensional nucleation layers can be formed; then, transverse growth of gallium nitride is carried out on all the three-dimensional island structures and among the three-dimensional island structures to form a two-dimensional plane structure which is called a two-dimensional recovery layer; and finally, growing a thicker gallium nitride layer called an intrinsic gallium nitride layer on the two-dimensional growth layer at a high temperature. The three-dimensional nucleation layer, the two-dimensional recovery layer, and the intrinsic gallium nitride layer are collectively referred to as a high-temperature buffer layer in this embodiment.
Further, the thickness of the three-dimensional nucleation layer may be 400nm to 600nm, preferably 500 nm. The thickness of the two-dimensional recovery layer may be 500nm to 800nm, preferably 650 nm. The thickness of the intrinsic gallium nitride layer may be in the range 1 μm to 2 μm, such as 1.5 μm.
Optionally, as shown in fig. 1, the gan-based LED epitaxial wafer may further include a stress release layer 72, where the stress release layer 72 is disposed between the N-type semiconductor layer 30 and the active layer 40 to release stress generated by lattice mismatch between sapphire and gan, so as to improve crystal quality of the active layer, facilitate radiation recombination of electrons and holes in the active layer for light emission, improve internal quantum efficiency of the LED, and further improve light emission efficiency of the LED.
Specifically, the stress relieving layer 72 may include a plurality of indium gallium nitride layers and a plurality of gallium nitride layers, which are alternately stacked.
Further, the thickness of the indium gallium nitride layer in the stress release layer 72 may be 1nm to 3nm, preferably 2 nm; the thickness of the gallium nitride layer can be 20 nm-40 nm, preferably 30 nm; the number of the indium gallium nitride layers is the same as that of the gallium nitride layers, and the number of the gallium nitride layers may be 3 to 9, preferably 6.
Optionally, as shown in fig. 1, the gan-based LED epitaxial wafer may further include an electron blocking layer 73, where the electron blocking layer 73 is disposed between the active layer 40 and the P-type semiconductor layer 50to prevent electrons from jumping into the P-type semiconductor layer to combine with holes in a non-radiative manner, thereby reducing the light emitting efficiency of the LED.
Specifically, the material of the electron blocking layer 73 may be P-type doped aluminum gallium nitride (AlGaN), such as AlyGa1-yN，0.1＜y＜0.5。
Further, the thickness of the electron blocking layer 73 may be 50nm to 100nm, preferably 75 nm.
Preferably, as shown in fig. 1, the gan-based led epitaxial wafer may further include a low temperature P-type layer 74, where the low temperature P-type layer 74 is disposed between the active layer 40 and the electron blocking layer 73, so as to avoid indium atoms in the active layer from being precipitated due to the high growth temperature of the electron blocking layer, which affects the light emitting efficiency of the led.
In one implementation of this embodiment, the low temperature P-type layer 74 may be substantially the same as the P-type semiconductor layer 50 except that the growth temperature of the low temperature P-type layer 74 is lower than the growth temperature of the P-type semiconductor layer 50.
In another implementation of the present embodiment, the material of the low temperature P-type layer 74 may be P-type doped gallium nitride.
Further, the thickness of the low-temperature P-type layer 74 may be 30nm to 50nm, preferably 40 nm; the P-type dopant doping concentration in the low temperature P-type layer 74 may be 1020/cm3～1021/cm3Preferably 5 x 1020/cm3。
Optionally, as shown in fig. 1, the light emitting diode epitaxial wafer may further include a P-type contact layer 75, and the P-type contact layer 75 is laid on the P-type semiconductor layer 50to form an ohmic contact with an electrode or a transparent conductive film formed in a chip manufacturing process.
Specifically, the P-type contact layer 75 may be made of P-type doped indium gallium nitride.
Further, the thickness of the P-type contact layer 75 may be 5nm to 100nm, preferably 50 nm; the doping concentration of the P-type dopant in the P-type contact layer 75 may be 1021/cm3～1022/cm3Preferably 6 x 1021/cm3。
One specific implementation of the gan-based led epitaxial wafer shown in fig. 1 includes: the semiconductor device includes a substrate 10, a buffer layer 20, an N-type semiconductor layer 30, an active layer 40, and a P-type semiconductor layer 50, wherein the buffer layer 20, the N-type semiconductor layer 30, the active layer 40, and the P-type semiconductor layer 50 are sequentially stacked on the substrate 10. Wherein, the material of the substrate 10 adopts sapphire; the buffer layer 20 is made of gallium nitride and has a thickness of 25 nm; the N-type semiconductor layer 30 is made of N-type doped gallium nitride with a thickness of 1.5 μm and a doping concentration of 6 x 1018cm-3(ii) a The active layer 40 comprises 8 quantum wells 41 and 8 quantum barriers 42 which are alternately stacked, the quantum wells 41 are made of indium gallium nitride, and the thickness of the quantum wells 41 is 3.5 nm; the material of the quantum barrier is gallium nitride, and the thickness of the quantum barrier is 12 nm; the P-type semiconductor layer 50 includes 2 undoped Sc alternately stacked0.2Al0.8N layer and 3P-type doped GaN layers, Sc0.2Al0.8The thickness of the N layer is 5nm, the thickness of the GaN layer is 100nm, and the doping concentration of the P-type dopant in the GaN layer is 1019cm-3。
Making the above epitaxial wafer into a chip, and reacting with PThe semiconductor layer is formed by doping a semiconductor layer with a thickness of 300nm and a doping concentration of 1019cm-3Compared with a chip made of an epitaxial wafer with the same structure of other layers, the GaN layer of the P-type dopant has the advantage that the luminous efficiency is improved by 2-3%.
One specific implementation of the gan-based led epitaxial wafer shown in fig. 1 includes: the semiconductor device includes a substrate 10, a buffer layer 20, an N-type semiconductor layer 30, an active layer 40, and a P-type semiconductor layer 50, wherein the buffer layer 20, the N-type semiconductor layer 30, the active layer 40, and the P-type semiconductor layer 50 are sequentially stacked on the substrate 10. Wherein, the material of the substrate 10 adopts sapphire; the buffer layer 20 is made of gallium nitride and has a thickness of 25 nm; the N-type semiconductor layer 30 is made of N-type doped gallium nitride with a thickness of 1.5 μm and a doping concentration of 6 x 1018cm-3(ii) a The active layer 40 comprises 8 quantum wells 41 and 8 quantum barriers 42 which are alternately stacked, the quantum wells 41 are made of indium gallium nitride, and the thickness of the quantum wells 41 is 3.5 nm; the material of the quantum barrier is gallium nitride, and the thickness of the quantum barrier is 12 nm; the P-type semiconductor layer 50 includes 6 undoped Sc alternately stacked0.4Al0.6N layer and 7P-doped GaN layers, Sc0.4Al0.6The thickness of the N layer is 3nm, the thickness of the GaN layer is 36nm, and the doping concentration of the P-type dopant in the GaN layer is 1019cm-3。
The epitaxial wafer is made into a chip, and the chip and the P-type semiconductor layer are formed by doping the epitaxial wafer with a dopant with the concentration of 10 and the thickness of 300nm19cm-3Compared with a chip made of an epitaxial wafer with the same structure of other layers, the GaN layer of the P-type dopant has the advantage that the luminous efficiency is improved by 4-5%.
One specific implementation of the gan-based led epitaxial wafer shown in fig. 1 includes: the semiconductor device includes a substrate 10, a buffer layer 20, an N-type semiconductor layer 30, an active layer 40, and a P-type semiconductor layer 50, wherein the buffer layer 20, the N-type semiconductor layer 30, the active layer 40, and the P-type semiconductor layer 50 are sequentially stacked on the substrate 10. Wherein, the material of the substrate 10 adopts sapphire; the buffer layer 20 is made of gallium nitride and has a thickness of 25 nm; the N-type semiconductor layer 30 is made of N-type doped gallium nitride with a thickness of 1.5 μm and a doping concentration of 6 x 1018cm-3(ii) a Active layer 40The quantum well structure comprises 8 quantum wells 41 and 8 quantum barriers 42 which are alternately stacked, wherein the quantum wells 41 are made of indium gallium nitride, and the thickness of the quantum wells 41 is 3.5 nm; the material of the quantum barrier is gallium nitride, and the thickness of the quantum barrier is 12 nm; the P-type semiconductor layer 50 includes 10 undoped Sc alternately stacked0.5Al0.5N layer and 11P-type doped GaN layers, Sc0.5Al0.5The thickness of the N layer is 1nm, the thickness of the GaN layer is 10nm, and the doping concentration of the P-type dopant in the GaN layer is 1019cm-3。
The epitaxial wafer is made into a chip, and the chip and the P-type semiconductor layer are formed by doping the epitaxial wafer with a dopant with the concentration of 10 and the thickness of 300nm19cm-3Compared with a chip made of an epitaxial wafer with the same structure of other layers, the GaN layer of the P-type dopant has the advantage that the luminous efficiency is improved by 1-2%.
One specific implementation of the gan-based led epitaxial wafer shown in fig. 1 includes: the semiconductor device includes a substrate 10, a buffer layer 20, an N-type semiconductor layer 30, an active layer 40, and a P-type semiconductor layer 50, wherein the buffer layer 20, the N-type semiconductor layer 30, the active layer 40, and the P-type semiconductor layer 50 are sequentially stacked on the substrate 10. Wherein, the material of the substrate 10 adopts sapphire; the buffer layer 20 is made of gallium nitride and has a thickness of 25 nm; the N-type semiconductor layer 30 is made of N-type doped gallium nitride with a thickness of 1.5 μm and a doping concentration of 6 x 1018cm-3(ii) a The active layer 40 comprises 8 quantum wells 41 and 8 quantum barriers 42 which are alternately stacked, the quantum wells 41 are made of indium gallium nitride, and the thickness of the quantum wells 41 is 3.5 nm; the material of the quantum barrier is gallium nitride, and the thickness of the quantum barrier is 12 nm; the P-type semiconductor layer 50 includes 10 undoped Sc alternately stacked0.7Al0.3N layer and 11P-type doped GaN layers, Sc0.7Al0.3The thickness of the N layer is 1nm, the thickness of the GaN layer is 10nm, and the doping concentration of the P-type dopant in the GaN layer is 1019cm-3。
The epitaxial wafer is made into a chip, and the chip and the P-type semiconductor layer are formed by doping the epitaxial wafer with a dopant with the concentration of 10 and the thickness of 300nm19cm-3Compared with a chip made of an epitaxial wafer with the same structure of other layers, the GaN layer of the P-type dopant has the advantage that the luminous efficiency is improved by 2-3%.
The embodiment of the invention provides a method for manufacturing a gallium nitride-based light-emitting diode epitaxial wafer, which is suitable for manufacturing the gallium nitride-based light-emitting diode epitaxial wafer shown in figure 1. Fig. 3 is a flowchart of a method for manufacturing an epitaxial wafer of a gallium nitride-based light emitting diode according to an embodiment of the present invention, and referring to fig. 3, the method includes:
step 201: a substrate is provided.
Optionally, the step 201 may include:
controlling the temperature to be 1000-1200 ℃ (preferably 1100 ℃), and annealing the substrate for 1-10 minutes (preferably 8 minutes) in a hydrogen atmosphere;
the substrate is subjected to a nitridation process.
The surface of the substrate is cleaned through the steps, impurities are prevented from being doped into the epitaxial wafer, and the growth quality of the epitaxial wafer is improved.
Step 202: a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer are sequentially grown on a substrate.
The P-type semiconductor layer comprises M undoped scandium aluminum nitride layers and (M +1) P-type doped gallium nitride layers, and the M scandium aluminum nitride layers and the (M +1) gallium nitride layers are alternately stacked.
Alternatively, the growth conditions of the scandium-aluminum nitride layer may be the same as those of the gallium nitride layer, and the growth conditions include growth temperature and growth pressure. The same growth conditions are adopted, and the method is simple and convenient to realize.
Preferably, the growth temperature of the P-type semiconductor layer may be 850 to 950 deg.C (preferably 900 deg.C), and the growth pressure of the P-type semiconductor layer may be 100to 300torr (preferably 200 torr). Under the cooperation of the growth conditions, the crystal quality of the P-type semiconductor layer is good, and the luminous efficiency of the LED is improved.
Specifically, this step 202 may include:
firstly, controlling the temperature to be 400-600 ℃ (preferably 500 ℃), and the pressure to be 400-600 torr (preferably 500torr), and growing a buffer layer on a substrate;
secondly, controlling the temperature to be 1000-1100 ℃ (preferably 1050 ℃), and the pressure to be 100-500 torr (preferably 300torr), and growing an N-type semiconductor layer on the buffer layer;
thirdly, growing an active layer on the N-type semiconductor layer; wherein the growth temperature of the quantum well is 720 ℃ to 800 ℃ (preferably 760 ℃), and the pressure is 100torr to 500torr (preferably 300 torr); the growth temperature of the quantum barrier is 900 ℃ -950 ℃ (preferably 925 ℃), and the pressure is 100 torr-500 torr (preferably 300 torr);
and fourthly, controlling the temperature to be 850-950 ℃ (preferably 900 ℃) and the pressure to be 100-300 torr (preferably 200torr), and growing the P-type semiconductor layer on the active layer.
Optionally, after the first step, the manufacturing method may further include:
the buffer layer is subjected to in-situ annealing treatment for 5 to 10 minutes (preferably 8 minutes) at a controlled temperature of 1000 to 1200 c (preferably 1100 c) and a pressure of 400to 600torr (preferably 500 torr).
Optionally, before the second step, the manufacturing method may further include:
and growing a high-temperature buffer layer on the buffer layer.
Accordingly, an N-type semiconductor layer is grown on the high temperature buffer layer.
Specifically, growing a high temperature buffer layer on the buffer layer may include:
controlling the temperature to be 1000-1040 ℃ (preferably 1020 ℃), and the pressure to be 400-600 torr (preferably 500torr), and growing a three-dimensional nucleation layer on the buffer layer;
controlling the temperature to be 1040-1080 ℃ (preferably 1060 ℃) and the pressure to be 400-600 torr (preferably 500torr), and growing a two-dimensional recovery layer on the three-dimensional nucleation;
the intrinsic gallium nitride layer is grown on the two-dimensional restoration layer under a temperature of 1050 ℃ to 1100 ℃ (preferably 1050 ℃) and a pressure of 100torr to 500torr (preferably 300 torr).
Optionally, before the third step, the manufacturing method may further include:
and growing a stress release layer on the N-type semiconductor layer.
Accordingly, an active layer is grown on the stress relieving layer.
Specifically, growing the stress relief layer on the N-type semiconductor layer may include:
the temperature is controlled to be 800 ℃ to 1100 ℃ (preferably 950 ℃) and the pressure is controlled to be 100torr to 500torr (preferably 300torr), and the stress release layer is grown on the N-type semiconductor layer.
Optionally, before the fourth step, the manufacturing method may further include:
an electron blocking layer is grown on the active layer.
Accordingly, a P-type semiconductor layer is grown on the electron blocking layer.
Specifically, growing an electron blocking layer on the active layer may include:
the electron blocking layer is grown on the active layer at a temperature of 900 to 1000 deg.C (preferably 950 deg.C) and a pressure of 200to 500torr (preferably 350 torr).
Preferably, before growing the electron blocking layer on the active layer, the manufacturing method may further include:
a low temperature P-type layer is grown on the active layer.
Accordingly, an electron blocking layer is grown on the low temperature P-type layer.
Specifically, growing the low temperature P-type layer on the active layer may include:
the temperature is controlled to be 750 ℃ to 850 ℃ (preferably 800 ℃) and the pressure is controlled to be 100torr to 500torr (preferably 300torr), and the low-temperature P type layer is grown on the active layer.
Optionally, after the fourth step, the manufacturing method may further include:
and growing a P-type contact layer on the P-type semiconductor layer.
Specifically, growing the P-type contact layer on the P-type semiconductor layer may include:
the P-type contact layer is grown on the P-type semiconductor layer at a temperature of 850 to 1000 deg.C (preferably 925 deg.C) and a pressure of 100to 300torr (preferably 200 torr).
After the completion of the epitaxial growth, the temperature is lowered to 650 to 850 ℃ (preferably 750 ℃), the epitaxial wafer is annealed in a nitrogen atmosphere for 5 to 15 minutes (preferably 10 minutes), and then the temperature of the epitaxial wafer is lowered to room temperature.
The control of the temperature and the pressure both refer to the control of the temperature and the pressure in a reaction chamber for growing the epitaxial wafer, and specifically refer to the reaction chamber of a Metal-organic Chemical Vapor Deposition (MOCVD) device. During implementation, trimethyl gallium or triethyl gallium is used as a gallium source, high-purity ammonia gas is used as a nitrogen source, trimethyl indium is used as an indium source, trimethyl aluminum is used as an aluminum source, a scandium phosphino-carbene complex is used as a scandium source, silane is used as an N-type dopant, and magnesium metallocene is used as a P-type dopant.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (8)
1. A gallium nitride-based light emitting diode epitaxial wafer comprises a substrate, a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer, wherein the buffer layer, the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially stacked on the substrate, the P-type semiconductor layer comprises M undoped scandium aluminum nitride layers and (M +1) P-type doped gallium nitride layers, the M scandium aluminum nitride layers and the (M +1) gallium nitride layers are alternately stacked, M is a positive integer, and the scandium aluminum nitride layers in the P-type semiconductor layer are Sc aluminum layersaAl1-aThe thickness of the N layer is more than 0.2 and less than 0.7, and the thickness of the gallium nitride layer is 5-20 times that of the scandium aluminum nitride layer;
the N-type semiconductor layer comprises L undoped scandium aluminum nitride layers and (L +1) N-type doped gallium nitride layers, the L scandium aluminum nitride layers and the (L +1) gallium nitride layers are alternately stacked, L is a positive integer, and the scandium aluminum nitride layers in the N-type semiconductor layer are ScbAl1-bN layer, b is more than 0 and less than 0.6.
2. The epitaxial wafer of the GaN-based LED according to claim 1, wherein the thickness of the scandium-aluminum-nitride layer is 1nm to 5 nm.
3. The GaN-based LED epitaxial wafer according to claim 1, wherein M is 2. ltoreq. M.ltoreq.10.
4. The GaN-based LED epitaxial wafer according to claim 3, wherein the thickness of the P-type semiconductor layer is 100nm to 300 nm.
5. The GaN-based LED epitaxial wafer as claimed in claim 1, wherein the doping concentration of the P-type dopant in the GaN layer is 1018/cm3～1020/cm3。
6. A manufacturing method of a gallium nitride-based light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing a substrate;
growing a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer on the substrate in sequence;
the P-type semiconductor layer comprises M undoped scandium aluminum nitride layers and (M +1) P type doped gallium nitride layers, the M scandium aluminum nitride layers and the (M +1) gallium nitride layers are alternately stacked, and the scandium aluminum nitride layer in the P-type semiconductor layer is ScaAl1-aThe thickness of the N layer is more than 0.2 and less than 0.7, and the thickness of the gallium nitride layer is 5-20 times that of the scandium aluminum nitride layer;
the N-type semiconductor layer comprises L undoped scandium aluminum nitride layers and (L +1) N-type doped gallium nitride layers, the L scandium aluminum nitride layers and the (L +1) gallium nitride layers are alternately stacked, L is a positive integer, and the scandium aluminum nitride layers in the N-type semiconductor layer are ScbAl1-bN layer, b is more than 0 and less than 0.6.
7. The method according to claim 6, wherein the scandium-aluminum nitride layer is grown under the same growth conditions as the gallium nitride layer, and the growth conditions include a growth temperature and a growth pressure.
8. The method of claim 7, wherein the growth temperature of the P-type semiconductor layer is 850-950 ℃, and the growth pressure of the P-type semiconductor layer is 100-300 torr.
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