CN109473395A - The processing method of chip - Google Patents
The processing method of chip Download PDFInfo
- Publication number
- CN109473395A CN109473395A CN201811036194.5A CN201811036194A CN109473395A CN 109473395 A CN109473395 A CN 109473395A CN 201811036194 A CN201811036194 A CN 201811036194A CN 109473395 A CN109473395 A CN 109473395A
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- Prior art keywords
- chip
- sealing material
- cutting slot
- alignment
- sealing
- Prior art date
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- 238000003672 processing method Methods 0.000 title claims abstract description 12
- 238000000034 method Methods 0.000 claims abstract description 71
- 239000003566 sealing material Substances 0.000 claims abstract description 52
- 230000011218 segmentation Effects 0.000 claims abstract description 35
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 23
- 238000007789 sealing Methods 0.000 claims abstract description 14
- 230000002745 absorbent Effects 0.000 claims abstract description 4
- 239000002250 absorbent Substances 0.000 claims abstract description 4
- 238000002679 ablation Methods 0.000 claims description 4
- 239000000463 material Substances 0.000 claims 2
- 229910001651 emery Inorganic materials 0.000 description 10
- 239000006229 carbon black Substances 0.000 description 9
- 230000002093 peripheral effect Effects 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- ADCOVFLJGNWWNZ-UHFFFAOYSA-N antimony trioxide Chemical compound O=[Sb]O[Sb]=O ADCOVFLJGNWWNZ-UHFFFAOYSA-N 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000004568 cement Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910000000 metal hydroxide Inorganic materials 0.000 description 1
- 150000004692 metal hydroxides Chemical class 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
- B23K26/03—Observing, e.g. monitoring, the workpiece
- B23K26/032—Observing, e.g. monitoring, the workpiece using optical means
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
- B23K26/04—Automatically aligning, aiming or focusing the laser beam, e.g. using the back-scattered light
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/08—Devices involving relative movement between laser beam and workpiece
- B23K26/0823—Devices involving rotation of the workpiece
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/08—Devices involving relative movement between laser beam and workpiece
- B23K26/083—Devices involving movement of the workpiece in at least one axial direction
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
- B23K26/362—Laser etching
- B23K26/364—Laser etching for making a groove or trench, e.g. for scribing a break initiation groove
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
- B23K26/40—Removing material taking account of the properties of the material involved
- B23K26/402—Removing material taking account of the properties of the material involved involving non-metallic material, e.g. isolators
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/60—Preliminary treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2101/00—Articles made by soldering, welding or cutting
- B23K2101/36—Electric or electronic devices
- B23K2101/40—Semiconductor devices
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2101/00—Articles made by soldering, welding or cutting
- B23K2101/36—Electric or electronic devices
- B23K2101/42—Printed circuits
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2103/00—Materials to be soldered, welded or cut
- B23K2103/16—Composite materials, e.g. fibre reinforced
- B23K2103/166—Multilayered materials
- B23K2103/172—Multilayered materials wherein at least one of the layers is non-metallic
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2103/00—Materials to be soldered, welded or cut
- B23K2103/30—Organic material
- B23K2103/42—Plastics
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2103/00—Materials to be soldered, welded or cut
- B23K2103/50—Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26
- B23K2103/56—Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26 semiconducting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Mechanical Engineering (AREA)
- Plasma & Fusion (AREA)
- Dicing (AREA)
- Laser Beam Processing (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The processing method of chip is provided, this method includes: cutting slot formation process, forms the cutting slot that depth is equivalent to the completion thickness of device chip from the face side of chip;Sealing process is sealed the front of chip using sealing material;Alignment process detects alignment mark by visible light shooting component and detects the segmentation preset lines that should be laser machined accordingly;Laser processing groove formation process, has sealing material from the irradiation of the face side of chip the laser beam of absorbent wavelength, and the laser processing groove that depth is equivalent to completion thickness is formed in the sealing material of cutting slot;Guard block adhering processes, paste guard block on the front side of the wafer;And segmentation process, expose laser processing groove grinding wafer to completion thickness from the back side of chip, divide the wafer into each device chip that front and 4 sides are surrounded by sealing material, alignment process is implemented to the sideling irradiation light of region captured by visible light shooting component by oblique light component on one side on one side.
Description
Technical field
The present invention relates to the processing methods of chip, are processed to chip and form 5S molded package.
Background technique
As the construction for the miniaturization and high-density installation for realizing the various devices such as LSI or NAND-type flash memory, for example, right
Chip size packages obtained by device chip is packaged according to chip size (CSP) have been used for actual in use, simultaneously quilt
It is widely used for mobile phone, smart phone etc..In addition, in recent years, in the CSP, develop and it is practical not merely with
The CSP that entire side is also sealed the front sealing of chip by sealing material, that is, so-called 5S molded package.
Previous 5S molded package is made by following process.
(1) on the front of semiconductor wafer (hereinafter, being referred to generally as chip sometimes) formed be referred to as device (circuit) and
The external connection terminals of convex block.
(2) chip is cut from the face side of chip along segmentation preset lines, forms depth and is equivalent to device chip
Completion thickness cutting slot.
(3) front of chip is sealed using the sealing material containing carbon black.
(4) back side of chip is ground to the completion thickness of device chip and exposes the sealing material in cutting slot.
(5) since the front of chip is sealed by the sealing material containing carbon black, so by the outer peripheral portion of front wafer surface
Sealing material removes and exposes the alignment marks such as target pattern, and it is pre- that implementation detects segmentation to be cut according to the alignment mark
The alignment of alignment.
(6) according to alignment, chip is cut along segmentation preset lines from the face side of chip, to be divided into front
The 5S molded package sealed with entire side by sealing material.
As described above, since the front of chip is sealed by the sealing material comprising carbon black, so being formed in front wafer surface
Device etc. can not visually see completely.In order to solve this problem so as to be aligned, such as documented by above-mentioned (5) that
Sample, the applicant develop following technology: the outer peripheral portion of the sealing material of front wafer surface is removed and makes target pattern etc.
Alignment mark exposes, and segmentation preset lines to be cut are detected according to the alignment mark, thereby executing alignment (referring to Japanese Unexamined Patent Publication
2013-074021 bulletin and Japanese Unexamined Patent Publication 2016-015438 bulletin).
Patent document 1: Japanese Unexamined Patent Publication 2013-074021 bulletin
Patent document 2: Japanese Unexamined Patent Publication 2016-015438 bulletin
However, in alignment methods described in above bulletin, need to replace incisory cutting tool and by side
The work that the cutting tool of the wider width of edge finishing is installed on main shaft to remove the sealing material of the outer peripheral portion of chip
Sequence, the replacement of cutting tool and the sealing material that outer peripheral portion is removed by edge trimming need to spend time and labor, deposit
In the problem that productivity is poor.
Summary of the invention
The present invention is completed in view of the point, it is intended that providing can include through be coated on front wafer surface
The sealing material of carbon black implements the processing method of the chip of alignment process.
According to the present invention, the processing method of chip is provided, which divides in a plurality of segmentation preset lines by intersecting to form
Positive each region in be respectively formed with device, which has multiple convex blocks, and the processing method of the chip is characterized in that,
With following process: cutting slot formation process, from the face side of the chip along the segmentation preset lines by cutting tool come
Form the cutting slot that depth is equivalent to the completion thickness of device chip;Sealing process, implement the cutting slot formation process it
Afterwards, the front comprising the cutting slot of the chip is sealed using sealing material;Alignment process, implement the sealing process it
Afterwards, alignment mark is detected through sealing material from the face side of the chip by visible light shooting component, according to this to fiducial mark
Note is to detect the segmentation preset lines that should be laser machined;Laser processing groove formation process, implement the alignment process it
Afterwards, has the laser of absorbent wavelength for the sealing material along segmentation preset lines irradiation from the face side of the chip
Beam is formed depth by ablation and is equivalent to the completion thickness of device chip and swashed in the sealing material in the cutting slot
Light processing groove;Guard block adhering processes glue on the front of the chip after implementing the laser processing groove formation process
Paste guard block;And segmentation process, after implementing the guard block adhering processes, from the back side of the chip by the crystalline substance
Piece is ground to the completion thickness of the device chip and exposes the laser processing groove, which is divided into front and 4 sides
The each device chip surrounded by the sealing material, on one side by oblique light component to area captured by the visible light shooting component
Domain sideling irradiation light, implements the alignment process on one side.
The processing method of chip according to the present invention utilizes oblique light component sideling irradiation light, on one side by visible on one side
Photo-beat takes the photograph component through sealing material to detect the alignment mark for being formed in chip, can implement to be aligned according to alignment mark,
Therefore alignment process can simply be implemented, without as in the past removing the sealing material of the positive outer peripheral portion of chip
It removes.
It therefore, can be from the face side of chip along being filled in the completion thickness for being formed as depth and being equivalent to device chip
Sealing material in cutting slot forms laser processing groove by ablation, later from the back side of chip by grinding wafer to
The completion thickness of device chip and expose laser processing groove, thereby, it is possible to be divided into front and 4 sides it is close by sealing material
Each device chip of envelope.
Detailed description of the invention
Fig. 1 is the perspective view for showing semiconductor wafer.
Fig. 2 is the perspective view for showing cutting slot formation process.
Fig. 3 is the perspective view for showing sealing process.
Fig. 4 is the cross-sectional view for showing alignment process.
(A) of Fig. 5 is the side elevation in partial section for showing laser processing groove formation process, and (B) of Fig. 5 is to implement laser
The enlarged partial sectional view of chip after processing groove formation process.
(A) of Fig. 6 is to show the segmentation work for the back side of chip being ground and being divided the wafer into each device chip
The side elevation in partial section of sequence, (B) of Fig. 6 are that the amplification of the device chip after front is sealed with 4 sides by sealing material is cutd open
View.
Label declaration
10: cutting unit;11: semiconductor wafer;13: segmentation preset lines;14: cutting tool;15: device;16: alignment is single
Member;17: electrode bumps;18,18A: shooting unit;20: sealing material;23: cutting slot;25: laser processing groove;26: grinding is single
Member;27: device chip;31: oblique light component;34: grinding emery wheel;38: grinding grinding tool;46: laser head (condenser).
Specific embodiment
Hereinafter, referring to attached drawing, detailed description of embodiments of the present invention.Referring to Fig.1, it shows and fits through this
The processing method of invention is come the face side perspective view for the semiconductor wafer (hereinafter, sometimes referred to simply as chip) 11 processed.
It is clathrate on the positive 11a of semiconductor wafer 11 to be formed with a plurality of segmentation preset lines (spacing track) 13.By
The devices such as IC, LSI 15 are formed in each region that vertical segmentation preset lines 13 mark off.
There is multiple electrodes convex block (hereinafter, sometimes referred to simply as convex block) 17 on the front of each device 15, chip 11 is at it
Device area 19 is included on front, is formed with the multiple devices 15 for being respectively provided with multiple convex blocks 17;And periphery remaining area
21, surround device area 19.
In the processing method of the chip of embodiment of the present invention, firstly, implementing cutting slot as the 1st process and forming work
Sequence forms the completion that depth is equivalent to device chip by cutting tool along segmentation preset lines 13 from the face side of chip 11
The cutting slot of thickness.The cutting slot formation process is illustrated referring to Fig. 2.
Cutting unit 10 includes cutting tool 14, and the front end of main shaft 12 is installed in a manner of assemble and unassemble;And
Aligned units 16, with visible light shooting component (visible light shooting unit) 18.Visible light shooting unit 18 has utilization can
The light-exposed microscope and camera shot.
Before implementing cutting slot formation process, firstly, implementing following alignment: visible light shooting unit 18 utilizes visible light
Shoot the front of chip 11, detection is formed in the alignment marks such as the target pattern of each device 15, examine according to the alignment mark
Survey segmentation preset lines 13 to be cut.
After implementing alignment, implements cutting slot formation process, make the high-speed rotating cutting tool on the direction arrow R1
14 cut from the positive 11a lateral edge of chip 11 segmentation preset lines 13 according to the depth for the completion thickness for being equivalent to device chip,
And processing feeding is carried out on the direction arrow X1 to the chuck table (not shown) of attracting holding chip 11, thus along dividing
It cuts preset lines 13 and forms cutting slot 23.
One side is according to the spacing of segmentation preset lines 13 by cutting unit 10 on the direction vertical with processing direction of feed X1
Index feed is carried out, successively implements the cutting slot formation process along the segmentation preset lines 13 upwardly extended in the 1st side on one side.
Then, after being rotated by 90 ° chuck table (not shown), along on 2nd direction vertical with the 1st direction
The segmentation preset lines 13 of extension successively implement same cutting slot formation process.
After implementing cutting slot formation process, implement sealing process, as shown in figure 3, applying to the positive 11a of chip 11
Cloth sealing material 20 is sealed the positive 11a of the chip 11 comprising cutting slot 23 using sealing material.Since sealing material 20 has
There is mobility, so sealing material 20 is filled into cutting slot 23 when implementing sealing process.
As sealing material 20, composition includes epoxy resin or epoxy resin+phenolic resin 10.3%, two by quality %
Cilicon oxide filler 85.3%, carbon black 0.1~0.2%, other compositions 4.2~4.3%.As other compositions, for example, including metal
Hydroxide, antimony trioxide, silica etc..
When the sealing material 20 using this composition come the positive 11a of coating wafer 11 to by the positive 11a of chip 11
When sealing, sealing material 20 is in black because including the minimal amount of carbon black in sealing material 20, therefore is generally difficult to penetrate
Sealing material 20 sees the positive 11a of chip 11.
Here, carbon black is mixed into sealing material 20 primarily to the electrostatic breakdown of device 15 is prevented, at present in market
Upper sale not yet is free of the sealing material of carbon black.
The coating method of sealing material 20 is not particularly limited, but sealing material 20 is preferably applied to the height of convex block 17
Until degree, sealing material 20 is etched followed by etching, convex block 17 is made to emerge.
After implementing sealing process, implement following alignment process: passing through visible light from the positive side 11a of chip 11
Shooting component shoots the positive 11a of chip 11 in a manner of through sealing material 20, and detection is being formed in chip 11 just
The alignment marks such as at least two target patterns of face 11a detect the segmentation that should be laser machined according to these alignment marks
Preset lines 13.
The alignment process is described in detail referring to Fig. 4.Before implementing alignment process, by the back side 11b of chip 11
Side is pasted onto peripheral part and is installed on the dicing tape T of ring-shaped frame F.
In alignment process, as shown in figure 4, utilizing 40 pairs of crystalline substances of chuck table of laser processing device across dicing tape T
Piece 11 carries out attracting holding, exposes the sealing material 20 for sealing the positive 11a of chip 11 upwards.Then, fixture is utilized
42 couples of ring-shaped frame F are clamped and are fixed.
In alignment process, the visible of laser processing device same as the visible light shooting unit 18 of cutting apparatus is utilized
The capturing elements such as the CCD of light shooting unit 18A shoot the positive 11a of chip 11.However, including in sealing material 20
The ingredients such as silica filler, carbon black, and then it is concave-convex to there is the front of sealing material 20, therefore even if passes through visible light shooting
The vertical irradiation of unit 18A and the positive 11a of chip 11 is shot through sealing material 20, shooting image can also become mould
Paste, is difficult to detect the alignment marks such as target pattern.
Therefore, in the alignment process of present embodiment, other than the vertical irradiation of visible light shooting unit 18A, also
It, to alleviate the fuzzy of shooting image, can be capable of detecting when to be aligned from oblique light component 31 to shooting area sideling irradiation light
Label.
The light irradiated from oblique light component 31 is preferably white light, and the incidence angle of the positive 11a relative to chip 11 is preferred
In the range of 30 °~60 °.It is preferred that visible light shooting unit 18A have can be to the exposure device that time for exposure etc. is adjusted
(exposure)。
Then, make chuck table 40 carry out θ rotation so as to make to connect straight line obtained by these alignment marks and process into
It is parallel to direction, then make cutting unit 10 shown in Fig. 2 according to alignment mark and divide preset lines 13 center between away from
It is moved from the direction vertical with processing direction of feed X1, to detect segmentation preset lines 13 to be cut.
After implementing alignment process, implement laser processing groove formation process, as shown in (A) of Fig. 5, from chip 11
Positive 11a lateral edge segmentation preset lines 13 from the laser head (condenser) 46 of laser processing device irradiate for sealing material 20 have
The laser beam LB of absorbent wavelength (for example, 355nm), passes through ablation in the sealing material 20 being filled in cutting slot 23
Processing is to form laser processing groove 25 shown in (B) of Fig. 5.
When along the segmentation preset lines 13 upwardly extended in the 1st side successively implement the laser processing groove formation process it
Afterwards, it is rotated by 90 ° chuck table 40, successively along the segmentation preset lines 13 upwardly extended in 2nd side vertical with the 1st direction
Implement the laser processing groove formation process.
After implementing laser processing groove formation process, implement segmentation process, from the back side side 11b of chip 11 by chip
11 are ground to the completion thickness of device chip and expose the laser processing groove 25 being formed in sealing material 20, and chip 11 is divided
It is cut into each device chip 27.
The segmentation process is illustrated referring to Fig. 6.Before implementing segmentation process, implement guard block adhering processes,
The guard blocks 22 such as front protecting band are pasted on the positive 11a of chip 11.Then, the chuck table of grinding attachment 24 is utilized
Chip 11 is subjected to attracting holding across guard block 22.
Grinding unit 26 includes: main shaft 30 is accommodated in main shaft shell 28, by not shown in a manner of it can rotate
Motor carry out rotation driving;Emery wheel mounting base 32 is fixed on the front end of main shaft 30;And grinding emery wheel 34, with
Assemble and unassemble mode is installed on emery wheel mounting base 32.Grinding emery wheel 34 is by cricoid emery wheel base station 36 and cements in emery wheel base station
Multiple grinding grinding tools 38 of 36 lower end periphery are constituted.
In segmentation process, carry out chuck table 24 for example according to 300rpm on the direction shown in arrow a
Rotation rotates grinding emery wheel 34 for example according to 6000rpm on the direction shown in arrow b, and to not shown
Grinding unit feed mechanism driven and make be ground emery wheel 34 grinding grinding tool 38 contacted with the back side 11b of chip 11.
Then, emery wheel 34 will be ground on one side to measure as defined in grinding and feeding downwards according to the grinding and feeding speed of regulation, one
While the back side 11b to chip 11 is ground.Chip 11 is measured using contact or contactless thickness measurement equipment on one side
Thickness, on one side by chip 11 be ground to as defined in such as 100 μm of thickness, as shown in (B) of Fig. 6, be divided into front with 4 sides
Each device chip 27 that face is sealed by sealing material.
The device chip 27 produced in this way can be mounted on mainboard by flip-chip bond, which connects
It closes and the positive back side of device chip 27 is inverted and connect convex block 17 with the conductive welding disk of mainboard.
Claims (1)
1. a kind of processing method of chip, the chip is in the positive each region divided by a plurality of segmentation preset lines intersected to form
It is inside respectively formed with device, which has multiple convex blocks,
The processing method of the chip is characterized in that thering is following process:
It is suitable along the segmentation preset lines to form depth by cutting tool from the face side of the chip for cutting slot formation process
In the cutting slot of the completion thickness of device chip;
The chip is included the cutting slot using sealing material after implementing the cutting slot formation process by sealing process
Front sealing;
Alignment process, after implementing the sealing process, by visible light shooting component from the face side of the chip through close
Closure material detects the segmentation preset lines that should be laser machined according to the alignment mark to detect alignment mark;
Laser processing groove formation process, it is predetermined along the segmentation from the face side of the chip after implementing the alignment process
Line irradiates the laser beam for having absorbent wavelength for the sealing material, passes through the sealing of ablation in the cutting slot
The laser processing groove that depth is equivalent to the completion thickness of device chip is formed in material;
Guard block adhering processes are pasted on the front of the chip and are protected after implementing the laser processing groove formation process
Protect component;And
Segmentation process, after implementing the guard block adhering processes, from the back side of the chip by the grinding wafer to this
The completion thickness of device chip and make the laser processing groove expose, by the chip be divided into front and 4 sides by the sealing material
Expect each device chip surrounded,
The alignment is implemented to the sideling irradiation light of region captured by the visible light shooting component by oblique light component on one side on one side
Process.
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CN103131355A (en) * | 2011-11-28 | 2013-06-05 | 日东电工株式会社 | Under-fill material and method for producing semiconductor device |
CN106252281A (en) * | 2015-06-08 | 2016-12-21 | 株式会社迪思科 | The processing method of wafer |
CN106997867A (en) * | 2015-12-25 | 2017-08-01 | 株式会社迪思科 | The processing method of chip |
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JP2002289628A (en) * | 2001-03-23 | 2002-10-04 | Seiko Epson Corp | Method of image recognition and image recognition apparatus and manufacturing method and manufacturing apparatus of semiconductor device |
US6649445B1 (en) * | 2002-09-11 | 2003-11-18 | Motorola, Inc. | Wafer coating and singulation method |
US8034659B2 (en) * | 2006-06-23 | 2011-10-11 | Hitachi Chemical Company, Ltd. | Production method of semiconductor device and bonding film |
JP5948034B2 (en) | 2011-09-27 | 2016-07-06 | 株式会社ディスコ | Alignment method |
JP2014003274A (en) * | 2012-05-25 | 2014-01-09 | Nitto Denko Corp | Method for manufacturing semiconductor device and underfill material |
JP2016015438A (en) | 2014-07-03 | 2016-01-28 | 株式会社ディスコ | Alignment method |
JP2017103405A (en) * | 2015-12-04 | 2017-06-08 | 株式会社ディスコ | Wafer processing method |
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CN103131355A (en) * | 2011-11-28 | 2013-06-05 | 日东电工株式会社 | Under-fill material and method for producing semiconductor device |
CN106252281A (en) * | 2015-06-08 | 2016-12-21 | 株式会社迪思科 | The processing method of wafer |
CN106997867A (en) * | 2015-12-25 | 2017-08-01 | 株式会社迪思科 | The processing method of chip |
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TW201913777A (en) | 2019-04-01 |
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