CN109461698B - 用于铜互连件的种晶层 - Google Patents

用于铜互连件的种晶层 Download PDF

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Publication number
CN109461698B
CN109461698B CN201810960756.9A CN201810960756A CN109461698B CN 109461698 B CN109461698 B CN 109461698B CN 201810960756 A CN201810960756 A CN 201810960756A CN 109461698 B CN109461698 B CN 109461698B
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layer
copper
ruthenium
substrate
copper layer
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Chinese (zh)
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CN109461698A (zh
Inventor
吴智远
濛·初·曾
梅休尔·B·内克
本-李·休厄
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Applied Materials Inc
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Applied Materials Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
    • H10P14/432—Chemical deposition, e.g. chemical vapour deposition [CVD] using selective deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/44—Physical vapour deposition [PVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/038—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers covering conductive structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/043—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/045—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for deposition from the gaseous phase, e.g. for chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/0425—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers comprising multiple stacked seed or nucleation layers

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Electroplating Methods And Accessories (AREA)
CN201810960756.9A 2017-08-22 2018-08-22 用于铜互连件的种晶层 Active CN109461698B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201762548604P 2017-08-22 2017-08-22
US62/548,604 2017-08-22

Publications (2)

Publication Number Publication Date
CN109461698A CN109461698A (zh) 2019-03-12
CN109461698B true CN109461698B (zh) 2024-04-12

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Country Link
US (1) US10847463B2 (https=)
EP (1) EP3447793B1 (https=)
JP (2) JP7634930B2 (https=)
KR (1) KR20190021184A (https=)
CN (1) CN109461698B (https=)
TW (1) TWI803510B (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11177162B2 (en) * 2019-09-17 2021-11-16 International Business Machines Corporation Trapezoidal interconnect at tight BEOL pitch
CN114664656A (zh) * 2020-05-22 2022-06-24 北京屹唐半导体科技股份有限公司 使用臭氧气体和氢自由基的工件加工
US11410881B2 (en) 2020-06-28 2022-08-09 Applied Materials, Inc. Impurity removal in doped ALD tantalum nitride
US11764157B2 (en) * 2020-07-23 2023-09-19 Applied Materials, Inc. Ruthenium liner and cap for back-end-of-line applications
WO2025005521A1 (ko) * 2023-06-30 2025-01-02 주성엔지니어링(주) 전극 형성 방법

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009146423A1 (en) * 2008-05-30 2009-12-03 Sigma-Aldrich Co. Methods of forming ruthenium-containing films by atomic layer deposition
CN102903699A (zh) * 2012-10-15 2013-01-30 复旦大学 一种铜互连结构及其制备方法
TW201418502A (zh) * 2012-11-09 2014-05-16 應用材料股份有限公司 沉積ｃｖｄ釕之方法
CN105355620A (zh) * 2015-12-17 2016-02-24 上海集成电路研发中心有限公司 一种铜互连结构及其制造方法
CN105575798A (zh) * 2014-10-29 2016-05-11 应用材料公司 用于从种晶层表面去除污染的系统和方法
KR20160123793A (ko) * 2015-04-17 2016-10-26 포항공과대학교 산학협력단 이중층 구조를 가지는 저항변화메모리 및 이중층 구조를 가지는 저항변화메모리의 제조방법

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7910165B2 (en) * 2002-06-04 2011-03-22 Applied Materials, Inc. Ruthenium layer formation for copper film deposition
US7101790B2 (en) 2003-03-28 2006-09-05 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming a robust copper interconnect by dilute metal doping
JP2006097044A (ja) 2004-09-28 2006-04-13 L'air Liquide Sa Pour L'etude & L'exploitation Des Procede S Georges Claude 成膜用前駆体、ルテニウム含有膜の成膜方法、ルテニウム膜の成膜方法、ルテニウム酸化物膜の成膜方法およびルテニウム酸塩膜の成膜方法
US7265048B2 (en) * 2005-03-01 2007-09-04 Applied Materials, Inc. Reduction of copper dewetting by transition metal deposition
US20060246699A1 (en) * 2005-03-18 2006-11-02 Weidman Timothy W Process for electroless copper deposition on a ruthenium seed
JP2008098449A (ja) * 2006-10-12 2008-04-24 Ebara Corp 基板処理装置及び基板処理方法
US20080164613A1 (en) 2007-01-10 2008-07-10 International Business Machines Corporation ULTRA-THIN Cu ALLOY SEED FOR INTERCONNECT APPLICATION
US20080223287A1 (en) * 2007-03-15 2008-09-18 Lavoie Adrien R Plasma enhanced ALD process for copper alloy seed layers
US20100200991A1 (en) * 2007-03-15 2010-08-12 Rohan Akolkar Dopant Enhanced Interconnect
US7659204B2 (en) * 2007-03-26 2010-02-09 Applied Materials, Inc. Oxidized barrier layer
US7737028B2 (en) 2007-09-28 2010-06-15 Applied Materials, Inc. Selective ruthenium deposition on copper materials
JP2009116952A (ja) * 2007-11-06 2009-05-28 Hitachi Global Storage Technologies Netherlands Bv 垂直磁気記録媒体およびこれを用いた磁気記憶装置
US7964497B2 (en) * 2008-06-27 2011-06-21 International Business Machines Corporation Structure to facilitate plating into high aspect ratio vias
US20090321935A1 (en) 2008-06-30 2009-12-31 O'brien Kevin Methods of forming improved electromigration resistant copper films and structures formed thereby
US8084104B2 (en) 2008-08-29 2011-12-27 Asm Japan K.K. Atomic composition controlled ruthenium alloy film formed by plasma-enhanced atomic layer deposition
JP2010215982A (ja) 2009-03-18 2010-09-30 Tosoh Corp ルテニウム錯体有機溶媒溶液を用いたルテニウム含有膜製造方法、及びルテニウム含有膜
JP2012074608A (ja) * 2010-09-29 2012-04-12 Tokyo Electron Ltd 配線形成方法
CN102332426A (zh) * 2011-09-23 2012-01-25 复旦大学 一种用于纳米集成电路的铜扩散阻挡层的制备方法
US9142509B2 (en) * 2012-04-13 2015-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Copper interconnect structure and method for forming the same
US9076661B2 (en) * 2012-04-13 2015-07-07 Applied Materials, Inc. Methods for manganese nitride integration
CN103266304B (zh) 2013-05-31 2015-12-23 江苏科技大学 一种高热稳定性无扩散阻挡层Cu(Ru)合金材料的制备方法
US9984975B2 (en) * 2014-03-14 2018-05-29 Taiwan Semiconductor Manufacturing Company Barrier structure for copper interconnect
JP6278827B2 (ja) 2014-05-14 2018-02-14 株式会社Adeka 銅化合物、薄膜形成用原料及び薄膜の製造方法
US20160032455A1 (en) 2014-07-31 2016-02-04 Applied Materials, Inc. High through-put and low temperature ald copper deposition and integration
US10002834B2 (en) 2015-03-11 2018-06-19 Applied Materials, Inc. Method and apparatus for protecting metal interconnect from halogen based precursors

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009146423A1 (en) * 2008-05-30 2009-12-03 Sigma-Aldrich Co. Methods of forming ruthenium-containing films by atomic layer deposition
CN102903699A (zh) * 2012-10-15 2013-01-30 复旦大学 一种铜互连结构及其制备方法
TW201418502A (zh) * 2012-11-09 2014-05-16 應用材料股份有限公司 沉積ｃｖｄ釕之方法
CN105575798A (zh) * 2014-10-29 2016-05-11 应用材料公司 用于从种晶层表面去除污染的系统和方法
KR20160123793A (ko) * 2015-04-17 2016-10-26 포항공과대학교 산학협력단 이중층 구조를 가지는 저항변화메모리 및 이중층 구조를 가지는 저항변화메모리의 제조방법
CN105355620A (zh) * 2015-12-17 2016-02-24 上海集成电路研发中心有限公司 一种铜互连结构及其制造方法

Also Published As

Publication number Publication date
JP7634930B2 (ja) 2025-02-25
JP2023182638A (ja) 2023-12-26
JP2019062190A (ja) 2019-04-18
EP3447793A1 (en) 2019-02-27
TW201920735A (zh) 2019-06-01
EP3447793B1 (en) 2021-01-06
US10847463B2 (en) 2020-11-24
KR20190021184A (ko) 2019-03-05
TWI803510B (zh) 2023-06-01
US20190067201A1 (en) 2019-02-28
CN109461698A (zh) 2019-03-12

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