CN109411369A - 半导体封装及其形成方法 - Google Patents
半导体封装及其形成方法 Download PDFInfo
- Publication number
- CN109411369A CN109411369A CN201810824906.3A CN201810824906A CN109411369A CN 109411369 A CN109411369 A CN 109411369A CN 201810824906 A CN201810824906 A CN 201810824906A CN 109411369 A CN109411369 A CN 109411369A
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- Prior art keywords
- wafer
- moulding compound
- tube core
- groove
- ground
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- 238000000034 method Methods 0.000 title claims abstract description 127
- 239000004065 semiconductor Substances 0.000 title claims abstract description 111
- 239000000206 moulding compound Substances 0.000 claims abstract description 106
- 229910052751 metal Inorganic materials 0.000 claims abstract description 55
- 239000002184 metal Substances 0.000 claims abstract description 55
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 7
- 229910052737 gold Inorganic materials 0.000 claims description 7
- 239000010931 gold Substances 0.000 claims description 7
- 239000004033 plastic Substances 0.000 claims description 2
- 229920003023 plastic Polymers 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 abstract description 6
- 238000000576 coating method Methods 0.000 abstract description 6
- 235000012431 wafers Nutrition 0.000 description 125
- 238000005538 encapsulation Methods 0.000 description 63
- 239000000463 material Substances 0.000 description 13
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 12
- GHYOCDFICYLMRF-UTIIJYGPSA-N (2S,3R)-N-[(2S)-3-(cyclopenten-1-yl)-1-[(2R)-2-methyloxiran-2-yl]-1-oxopropan-2-yl]-3-hydroxy-3-(4-methoxyphenyl)-2-[[(2S)-2-[(2-morpholin-4-ylacetyl)amino]propanoyl]amino]propanamide Chemical compound C1(=CCCC1)C[C@@H](C(=O)[C@@]1(OC1)C)NC([C@H]([C@@H](C1=CC=C(C=C1)OC)O)NC([C@H](C)NC(CN1CCOCC1)=O)=O)=O GHYOCDFICYLMRF-UTIIJYGPSA-N 0.000 description 9
- 229940125797 compound 12 Drugs 0.000 description 9
- DEVSOMFAQLZNKR-RJRFIUFISA-N (z)-3-[3-[3,5-bis(trifluoromethyl)phenyl]-1,2,4-triazol-1-yl]-n'-pyrazin-2-ylprop-2-enehydrazide Chemical compound FC(F)(F)C1=CC(C(F)(F)F)=CC(C2=NN(\C=C/C(=O)NNC=3N=CC=NC=3)C=N2)=C1 DEVSOMFAQLZNKR-RJRFIUFISA-N 0.000 description 7
- QBYJBZPUGVGKQQ-SJJAEHHWSA-N aldrin Chemical compound C1[C@H]2C=C[C@@H]1[C@H]1[C@@](C3(Cl)Cl)(Cl)C(Cl)=C(Cl)[C@@]3(Cl)[C@H]12 QBYJBZPUGVGKQQ-SJJAEHHWSA-N 0.000 description 7
- 239000000126 substance Substances 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 6
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000010949 copper Substances 0.000 description 6
- 238000005530 etching Methods 0.000 description 6
- 229910052759 nickel Inorganic materials 0.000 description 6
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- 229910052719 titanium Inorganic materials 0.000 description 6
- 239000010936 titanium Substances 0.000 description 6
- 239000000956 alloy Substances 0.000 description 5
- 229910045601 alloy Inorganic materials 0.000 description 5
- 238000003486 chemical etching Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
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- 238000000748 compression moulding Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- GWNFQAKCJYEJEW-UHFFFAOYSA-N ethyl 3-[8-[[4-methyl-5-[(3-methyl-4-oxophthalazin-1-yl)methyl]-1,2,4-triazol-3-yl]sulfanyl]octanoylamino]benzoate Chemical compound CCOC(=O)C1=CC(NC(=O)CCCCCCCSC2=NN=C(CC3=NN(C)C(=O)C4=CC=CC=C34)N2C)=CC=C1 GWNFQAKCJYEJEW-UHFFFAOYSA-N 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 4
- 239000004593 Epoxy Substances 0.000 description 3
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- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 239000012530 fluid Substances 0.000 description 3
- 239000012778 molding material Substances 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910010271 silicon carbide Inorganic materials 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 229910002601 GaN Inorganic materials 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- SMNRFWMNPDABKZ-WVALLCKVSA-N [[(2R,3S,4R,5S)-5-(2,6-dioxo-3H-pyridin-3-yl)-3,4-dihydroxyoxolan-2-yl]methoxy-hydroxyphosphoryl] [[[(2R,3S,4S,5R,6R)-4-fluoro-3,5-dihydroxy-6-(hydroxymethyl)oxan-2-yl]oxy-hydroxyphosphoryl]oxy-hydroxyphosphoryl] hydrogen phosphate Chemical compound OC[C@H]1O[C@H](OP(O)(=O)OP(O)(=O)OP(O)(=O)OP(O)(=O)OC[C@H]2O[C@H]([C@H](O)[C@@H]2O)C2C=CC(=O)NC2=O)[C@H](O)[C@@H](F)[C@@H]1O SMNRFWMNPDABKZ-WVALLCKVSA-N 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- SMZOUWXMTYCWNB-UHFFFAOYSA-N 2-(2-methoxy-5-methylphenyl)ethanamine Chemical compound COC1=CC=C(C)C=C1CCN SMZOUWXMTYCWNB-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N 2-Propenoic acid Natural products OC(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000007373 indentation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
Classifications
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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Abstract
本发明涉及半导体封装及其形成方法。形成半导体封装的方法的实施方式可包括在晶圆的第一侧中形成多个凹槽,晶圆的第一侧包括多个电触点。所述方法还可包括使用模塑料涂布晶圆的第一侧和多个凹槽的内部,磨削晶圆的第二侧以将所述晶圆减薄到所需厚度,在晶圆的第二侧上形成背金属,通过磨削模塑料的第一侧来暴露多个电触点,以及在多个凹槽处对所述晶圆进行切单以形成多个半导体封装。
Description
技术领域
本文件的各方面整体涉及半导体封装。更具体的实施方式涉及薄功率半导体封装及制备薄功率半导体封装的方法。
背景技术
减小半导体封装尺寸总体上带来了经济效益以及技术效益,诸如半导体器件的速度和功率的提升。薄半导体封装对于芯片堆叠技术是有利的。半导体封装可由减薄的管芯形成,该减薄的管芯由磨削的半导体晶圆制成。
发明内容
形成半导体封装的方法的实施方式可包括在晶圆的第一侧中形成多个凹槽,该晶圆的第一侧包括多个电触点。该方法还可包括使用模塑料涂布晶圆的第一侧和所述多个凹槽的内部,磨削晶圆的第二侧以将晶圆减薄到所需厚度,在晶圆的第二侧上形成背金属,通过磨削模塑料的第一侧来暴露所述多个电触点,以及在所述多个凹槽处对晶圆进行切单(singulate)以形成多个半导体封装。
形成半导体封装的方法的实施方式可包括以下各项中的一项、全部或任一项:
该方法可包括在晶圆的第二侧上形成穿过背金属的沟槽,使用第二模塑料涂布晶圆的第二侧和背金属层,以及将第二模塑料磨削到所需厚度。
可使用蚀刻技术形成所述多个凹槽。
所述多个凹槽中的每个凹槽可为阶梯式凹槽。
晶圆的一部分可将背金属和所述多个凹槽分开。
可使用液体分配方法、传递模塑方法和压塑方法中的一者施加第一模塑料。
在磨削晶圆的第二侧期间可移除晶圆的基本上90%的背面部分。
可在向晶圆的第二侧施加基本上5psi的压力的情况下使第一模塑料在100与200摄氏度之间固化。
形成半导体封装的方法的实施方式可包括在与晶圆的第一侧相对的晶圆的第二侧中形成多个凹槽,该晶圆的第一侧包括多个电触点。该方法可包括使用第一模塑料涂布晶圆的第一侧,使用第二模塑料涂布晶圆的第二侧,将第二模塑料磨削到所需厚度,在第二模塑料及晶圆的第二侧上方形成金属层,通过磨削第一模塑料的第一侧来暴露所述多个电触点,以及沿着所述多个凹槽对晶圆进行切单,从而形成多个半导体封装。
形成半导体封装的方法的实施方式可包括以下各项中的一项、全部或任一项:
可使用蚀刻技术形成所述多个凹槽。
可使用液体分配方法、传递模塑方法和压塑方法中的一者施加第一模塑料。
可使用机械抛光和化学蚀刻技术中的一者磨削第一模塑料和第二模塑料。
半导体封装的实施方式可包括具有第一侧、第二侧、第三侧、第四侧、第五侧和第六侧的管芯,该管芯具有第一侧与第二侧之间的厚度,该厚度小于25微米厚。该封装还可包括耦接到管芯的第一侧的多个电触点;覆盖管芯的第一侧的一部分、管芯的第二侧的一部分、管芯的第三侧的一部分、管芯的第四侧的一部分以及管芯的第五侧的一部分的第一模塑料,其中所述多个电触点穿过第一模塑料暴露;以及耦接到管芯的第六侧的金属层。
半导体封装的实施方式可包括以下各项中的一项、全部或任一项:
管芯的第一侧可包括管芯周边周围的凹槽。
管芯的第六侧可包括管芯周边周围的凹槽。
晶圆可小于10微米厚。
第一模塑料可完全覆盖管芯的第二侧、管芯的第三侧、管芯的第四侧和管芯的第五侧。
管芯的第六侧可由第二模塑料覆盖。
金属层的边缘可由第一模塑料覆盖。
对于本领域的普通技术人员而言,通过具体实施方式以及附图并通过权利要求书,上述以及其他方面、特征和优点将会显而易见。
附图说明
将在下文中结合附图来描述各实施方式,其中类似标号表示类似元件,并且:
图1是用于形成超薄半导体封装的工艺流程的图示;
图2是由图1的工艺形成的超薄半导体封装的剖视图;
图3是其中形成有凹槽的超薄半导体封装的剖视图;
图4是用于形成超薄半导体封装的工艺流程的图示,其中管芯的一部分被暴露;
图5是由图4的工艺形成的超薄半导体封装的剖视图;
图6是用于形成超薄半导体封装的工艺流程的图示,该超薄半导体封装中形成有凹槽;
图7是由图6的工艺形成的超薄半导体封装的剖视图;
图8是用于形成超薄半导体封装的工艺流程的图示,其中管芯的一部分被暴露;并且
图9是由图8的工艺形成的超薄半导体封装的剖视图。
具体实施方式
本公开、其各方面以及实施方式并不限于本文所公开的具体部件、组装工序或方法元素。本领域已知的与预期超薄半导体封装符合的许多另外的部件、组装工序和/或方法元素将显而易见地能与本公开的特定实施方式一起使用。因此,例如,尽管本发明公开了特定实施方式,但是此类实施方式和实施部件可包括与预期操作和方法符合的本领域已知用于此类超薄半导体封装以及实施部件和方法的任何形状、尺寸、样式、类型、型号、版本、量度、浓度、材料、数量、方法元素、步骤等。
参见图1,示出了用于形成超薄半导体封装的工艺流程。如本文所用,“超薄”半导体封装被设计为处理厚度为约25微米或更薄的器件管芯。该工艺流程示出了晶圆和管芯的剖面侧视图。在各种实施方式中,用于形成超薄半导体封装的方法包括提供具有第一侧4和第二侧6的晶圆2。晶圆2可包括衬底材料,以非限制性示例的方式,该衬底材料可为硅、氮化镓、碳化硅或另一种晶圆衬底材料。晶圆4的第一侧包括或耦接到多个电触点8。电触点8可为金属的,或由另一种导电的材料制成。
在各种实施方式中,用于形成超薄半导体封装的方法包括在晶圆2的第一侧4中形成多个凹槽10。虽然未在图1中示出,但应当理解,所述多个凹槽彼此跨越晶圆2的第一侧4沿基本上垂直的方向相交。在各种实施方式中,所形成的凹槽可延伸到晶圆中约25或更多微米深。在其他实施方式中,凹槽10仅在晶圆2中延伸约10与约25微米深之间。在再其他实施方式中,凹槽10在晶圆2中延伸小于约10微米深。以非限制性示例的方式,可使用锯、激光、水射流、等离子蚀刻或化学蚀刻来形成所述多个凹槽。在各种实施方式中,由德国斯图加特的罗伯特·博世公司(Robert Bosch GmbH,Stuttgart Germany)以商品名出售的化学蚀刻工艺(“博世工艺”)可用于在晶圆2的第一侧4中形成凹槽10。
在各种实施方式中,所形成的凹槽10具有两个基本上平行的侧壁,这两个侧壁基本上笔直地延伸到晶圆2的第一侧4中。在其他实施方式中,在晶圆2的第一侧4中形成多个阶梯式凹槽。可通过以下方式形成每个阶梯式凹槽:在晶圆中形成具有第一宽度的第一凹槽,然后在每个第一凹槽内形成具有第二宽度的第二凹槽,其中第一宽度宽于第二宽度。
用于形成超薄半导体封装的方法包括使用模塑料12涂布晶圆2的第一侧4和所述多个凹槽10的内部。在各种方法实施方式中,该模塑料还可覆盖电触点8。以非限制性示例的方式,可使用液体分配技术、传递模塑技术或压塑技术来施加模塑料12。
该模塑料可为环氧树脂模塑料、丙烯酸模塑料或任何其他能够硬化并为半导体器件提供物理支撑和/或潮湿防护的模塑料。在各种实施方式中,可使模塑料12在约100-200摄氏度之间的温度下固化,同时向晶圆的第二侧6施加基本上5psi的压力。在其他实施方式中,可使用不同温度和不同压力使该模塑固化。在采用环氧树脂模塑料的实施方式中,在施加模塑料12之后,可对其进行热处理以增强环氧树脂交联。
在各种实施方式中,用于形成超薄半导体封装的方法包括将晶圆2的第二侧6磨削到所需厚度。在各种实施方式中,可磨削掉晶圆2的第二侧6,达到填充有模塑料12的所述多个凹槽10完全延伸穿过晶圆的程度。在各种实施方式中,可磨削掉比此更多的部分,从而降低凹槽10的深度。这样,晶圆中的半导体器件彼此分开,但仍然通过模塑料保持在一起。由于模塑料此时支撑半导体器件,因此这些器件可被磨削得非常薄。在各种实施方式中,以非限制性示例的方式,可使用机械抛光技术、化学蚀刻技术、机械抛光与化学蚀刻技术的组合或任何其他磨削技术来磨削晶圆2的第二侧6。在各种实施方式中,将晶圆磨削到约10与约25微米之间的厚度。在其他实施方式中,将晶圆磨削到小于约10微米的厚度。在再其他实施方式中,可将晶圆磨削到大于约25微米的厚度。
在各种实施方式中,用于形成超薄半导体封装的方法包括在晶圆2的第二侧6上形成背金属14。背金属可包括单个金属层或多个金属层。在各种实施方式中,以非限制性示例的方式,背金属可包括金、钛、镍、银、铜、或它们的任何组合和/或合金。由于晶圆2被减薄并且背金属14被施加到减薄的晶圆,同时全部模塑料12耦接到晶圆2的正面4和凹槽10的内部,因此有可能减少或消除晶圆的翘曲。此外,在减薄晶圆并施加背金属14时减少了晶圆处理问题,因为全部模塑料12仍然耦接到晶圆2。而且,由于模塑料提供了支撑,显著减少了此时涂布有背金属的极薄半导体管芯的卷曲和翘曲。
在各种实施方式中,用于形成超薄半导体封装的方法包括通过磨削模塑料12的第一侧16来暴露模塑料12所覆盖的所述多个电触点8。以非限制性示例的方式,可使用机械抛光技术、化学蚀刻技术、机械抛光与化学蚀刻技术的组合或其他磨削技术来磨削模塑料12的第一侧16。
在各种实施方式中,用于形成超薄半导体封装的方法包括将晶圆2切割成单个管芯。可通过在初始形成多个凹槽10的地方切割或蚀刻穿过晶圆,从而对该晶圆进行切割。以非限制性示例的方式,可通过使用锯、激光、水射流、等离子蚀刻或化学蚀刻对该晶圆进行切割。在各种实施方式中,可使用此前提及的博世工艺对晶圆2进行切割。用于对晶圆进行切割的方法可包括使用比用于形成所述多个凹槽10更薄的切口或蚀刻对晶圆进行切割。这样,模塑料12将覆盖每个切割的管芯18的各侧面。
参见图2,示出了由图1的工艺形成的超薄半导体封装的剖视图。在各种实施方式中,超薄半导体封装20可为功率半导体封装。具体地讲,超薄半导体封装可为MOSFET。在其他实施方式中,超薄半导体封装20不用于功率半导体器件,而是可用于其他半导体器件类型。在各种实施方式中,超薄半导体封装具有多个电触点36,所述多个电触点耦接到管芯的第一侧24并且穿过第一模塑料34暴露。在各种实施方式中,半导体封装20的管芯22可介于约10-25微米厚之间。在其他实施方式中,管芯22小于约10微米厚。在再其他实施方式中,管芯22可大于约25微米厚。功率半导体封装的超薄性质可改善该封装和/或半导体器件/管芯的RDS(ON)。
在各种实施方式中,超薄半导体封装20由第一模塑料34覆盖在管芯22的第一侧24、第二侧26、第三侧28、第四侧和第五侧上。金属层30可耦接到管芯的第六侧32。在各种实施方式中,多于一个金属层可耦接到管芯的第六侧32。以非限制性示例的方式,该金属可包括金、钛、镍、银、铜、或它们的任何组合或合金。
现在参见图3,示出了其中形成有凹槽的超薄半导体封装的剖视图。图3所示的封装可与图2所示的封装相同或类似,例外的是图3所示的封装包括管芯40的第一侧42的周边周围的凹槽38。凹槽38可通过在晶圆中形成阶梯式凹槽而产生,如上文相对于图1所述。在各种实施方式中,阶梯式凹槽可不在管芯的整个周边周围延伸,而是可仅沿着管芯40的第一侧42的两个相对边缘形成。
参见图4,示出了形成超薄半导体封装的方法的另一个实施方式的工艺流程,其中管芯的一部分被暴露。图4所示的方法实施方式与图1所示的工艺相同,例外的是晶圆46的第二侧44未一直磨削到所述多个凹槽48。因此,所述多个凹槽48与背金属52之间存在晶圆46的部分50。在各种实施方式中,通过磨削移除了晶圆46的约90-95%的背面部分54、或从晶圆的第二侧44延伸到所述多个凹槽48的晶圆部分。在其他实施方式中,可通过磨削移除比此更多或更少的部分。以与图1所示及本文所述的方法实施方式类似的方式执行方法实施方式中的其他工艺步骤(模塑、磨削和切割等)。
参见图5,示出了由图4的工艺形成的超薄半导体封装的剖视图。图5的半导体封装可与图2的半导体封装相同,例外的是管芯58的一部分沿着该管芯的各侧面存在于模塑料与背金属之间。因此,在图5所示的实施方式中,管芯58的一部分在该管芯的各个相对侧面上暴露。
参见图6,示出了形成超薄半导体封装的另一个实施方式的工艺流程,该超薄半导体封装中形成有凹槽。该工艺流程示出了晶圆和管芯的剖面侧视图。在各种实施方式中,该方法包括提供晶圆60。晶圆60具有第一侧62和第二侧64。以非限制性示例的方式,晶圆60可为硅、氮化镓、碳化硅或其他晶圆材料,如本文所公开的那些。晶圆60的第一侧包括或耦接到多个电触点66。电触点66可为金属的,或由本文所公开的任何其他导电材料制成。
在各种实施方式中,该方法包括在晶圆60的第一侧62中形成多个凹槽68。虽然未在图6中示出,但应当理解,所述多个凹槽彼此沿基本上垂直的方向相交。所形成的凹槽68可为本文此前公开的任何深度、本文此前公开的任何形状(包括阶梯式),并且使用本文此前公开的任何方法形成。
图6用于形成超薄半导体封装的方法包括使用模塑料70涂布晶圆的第一侧62和所述多个凹槽68的内部。该模塑料还可覆盖电触点66。模塑料70可使用本文此前公开的任何方法施加,并且可为本文此前公开的任何类型的模塑料。在各种实施方式中,该模塑料可如上文相对于图1所述的那样固化或热处理。
在各种实施方式中,用于形成超薄半导体封装的方法包括将晶圆的第二侧64磨削到所需厚度。晶圆的第二侧可使用本文所公开的任何磨削方法磨削,并且可磨削到本文所述的任何厚度。在各种实施方式中,可磨削掉晶圆60的第二侧64,达到填充有模塑料70的所述多个凹槽68完全延伸穿过晶圆的程度。在各种实施方式中,可磨削掉更多晶圆材料(及相应一些模塑料),从而降低凹槽70的深度。
在各种实施方式中,用于形成超薄半导体封装的方法包括在晶圆60的第二侧64上形成背金属72。背金属可包括单个金属层或多个金属层。在各种实施方式中,以非限制性示例的方式,背金属可包括金、钛、镍、银、铜、或它们的任何组合。
如图6所示形成超薄半导体封装的方法包括形成穿过背金属72的至少一个沟槽74。在各种实施方式中,所述至少一个沟槽与所述多个凹槽68中的凹槽对准。在各种实施方式中,对于每一个凹槽而言都有一个形成的沟槽。在各种实施方式中,沟槽宽于凹槽,而在其他实施方式中,沟槽与对应凹槽一样宽,或不及对应凹槽那样宽。如图6所示,沟槽74可延伸到晶圆60的第二侧64中。在其他实施方式中,沟槽74可仅延伸穿过背金属72的厚度。
由于晶圆60被减薄并且背金属72被施加到减薄的晶圆,同时全部第一模塑料70耦接到晶圆的正面62和凹槽68的内部,因此这减少了晶圆的翘曲。此外,如此前所讨论,在减薄晶圆、施加背金属72并形成穿过背金属的至少一个沟槽74时减少了晶圆处理问题,因为全部模塑料70仍然耦接到晶圆。
图6所示的方法实施方式包括使用第二模塑料76涂布晶圆60的第二侧64和背金属层72。这样,如图6所示,第一模塑料和第二模塑料可完全包封电触点66、晶圆60和背金属72。第二模塑料可为本文所公开的任何类型,并且可使用本文所述的任何方法施加和固化。在各种实施方式中,第二模塑料在化学上可与第一模塑料相同,但在其他实施方式中在化学上可不同。图6所示的方法实施方式包括将第二模塑料磨削到所需厚度。在各种实施方式中,磨削第二模塑料以暴露背金属72。可使用本文所公开的任何磨削方法来磨削第二模塑料。
在各种实施方式中,用于形成超薄半导体封装的方法包括通过磨削模塑料70的第一侧78来暴露模塑料70所覆盖的多个电触点66。可使用本文所公开的任何方法来磨削模塑料70的第一侧78。
在各种实施方式中,用于形成超薄半导体封装的方法还包括将晶圆60、第一模塑料70和第二模塑料76切割成单管芯封装(或视需要切割成多管芯封装)。可通过在初始形成所述多个凹槽68的地方切割或蚀刻穿过晶圆,从而对该晶圆进行切割。以非限制性示例的方式,可通过使用锯、激光、水射流、等离子蚀刻或化学蚀刻对该晶圆进行切割。在各种实施方式中,可使用博世工艺将晶圆60、第一模塑料70和第二模塑料76切割成单独的封装。用于对晶圆进行切割的方法可包括使用比用于形成所述多个凹槽68更薄的切口或蚀刻对晶圆进行切割。这样,第一模塑料70和第二模塑料76覆盖每个切割的管芯80的所有侧面,使电触点暴露。
参见图7,示出了由图6的工艺形成的超薄半导体封装的剖视图。在各种实施方式中,超薄半导体封装82可包括功率半导体器件。具体地讲,超薄半导体封装可包括MOSFET。在其他实施方式中,超薄半导体封装82可不包括功率半导体器件。
在各种实施方式中,超薄半导体封装82具有多个电触点84,所述多个电触点耦接到管芯的第一侧86并且穿过第一模塑料90暴露。
在各种实施方式中,半导体封装82的管芯88可介于约10-25微米厚之间。在其他实施方式中,管芯88小于约10微米厚。在再其他实施方式中,管芯88可大于约25微米厚。如此前所讨论,功率半导体封装的超薄性质可改善该封装的RDS(ON)。
在各种实施方式中,超薄半导体封装82由第一模塑料90覆盖在管芯88的第一侧86上,并且由第一模塑料90和第二模塑料148覆盖在该管芯的第二侧94、第三侧96、第四侧和第五侧上。在各种实施方式中,凹槽104的顶部102可被视为管芯的第六侧98的一部分。从这个意义上讲,管芯可由第二模塑料148覆盖在管芯的第六侧上。金属层100可耦接到管芯的第六侧98。在各种实施方式中,多于一个金属层可耦接到管芯的第六侧98。以非限制性示例的方式,该金属可包括金、钛、镍、银、铜、或它们的任何组合或合金。在各种实施方式中,凹槽104可在管芯的周边周围延伸。在各种实施方式中,模塑料可覆盖金属层100的侧面106。
现在参见图8,示出了用于形成超薄半导体器件的方法实施方式的工艺流程的另一个实施方式,其中管芯的一部分被暴露。该工艺流程示出了晶圆和管芯的剖面侧视图。在各种实施方式中,该方法包括提供晶圆108。晶圆108具有第一侧110和第二侧112。以非限制性示例的方式,晶圆108可为硅、氮化镓、碳化硅或本文所公开的其他晶圆衬底材料。晶圆108的第一侧110包括或耦接到多个电触点114。电触点114可为金属的、或本文所公开的任何其他导电材料。
在各种实施方式中,用于形成超薄半导体封装的方法包括在晶圆108的第二侧112中形成多个凹槽116。虽然未在图8中示出,但应当理解,所述多个凹槽彼此沿基本上垂直的方向相交。所形成的凹槽116可为本文此前公开的任何深度、本文此前公开的任何形状,并且使用本文此前公开的任何方法形成。
图8用于形成超薄半导体封装的方法包括使用第一模塑料118涂布晶圆108的第一侧110。第一模塑料118还可覆盖电触点114。第一模塑料118可使用本文此前公开的任何方法施加,并且可为本文此前公开的任何类型。在各种实施方式中,第一模塑料118可如上文相对于图1所述的那样固化或热处理。
在各种实施方式中,用于形成超薄半导体封装的方法可包括将晶圆108的第二侧112磨削到所需厚度。晶圆的第二侧可使用本文所公开的任何磨削方法磨削,并且可磨削到仍然允许凹槽存在于晶圆自身的材料中的本文所述的任何厚度。在其他实施方式中,不磨削晶圆的第二侧。
如图8所示形成超薄半导体封装的方法包括使用第二模塑料124涂布晶圆108的第二侧112和所述多个凹槽116的内部。第二模塑料可为本文所公开的任何类型,并且可使用本文所述的任何方法施加和固化。
如图8所示形成超薄半导体封装的方法包括将第二模塑料124磨削到所需厚度。在各种实施方式中,磨削第二模塑料以暴露晶圆112的第二侧。在各种实施方式中,晶圆的一部分可与第二模塑料124一起磨削掉。在磨削第二模塑料124之后所述多个凹槽116的至少一部分保留。可使用本文所公开的任何磨削方法来磨削第二模塑料124。
在各种实施方式中,用于形成超薄半导体封装的方法包括在晶圆108的第二侧112上及所述多个凹槽116上方形成背金属120。背金属可包括单个金属层或多个金属层。在各种实施方式中,以非限制性示例的方式,背金属可包括金、钛、镍、银、铜、或它们的任何组合或合金。
由于晶圆108可被减薄并且背金属120被施加到减薄的晶圆,同时全部第一模塑料118耦接到晶圆108的正面110,因此这减少了晶圆的翘曲。此外,如本文件中所讨论,在减薄晶圆并施加背金属120时减少了晶圆处理问题,因为全部模塑料118仍然耦接到晶圆108。
在各种实施方式中,用于形成超薄半导体封装的方法包括通过磨削第一模塑料118的第一侧122来暴露第一模塑料所覆盖的所述多个电触点114。可使用本文所公开的任何方法来磨削第一模塑料118的第一侧122。
在各种实施方式中,用于形成超薄半导体封装的方法包括将晶圆108、第一模塑料118和第二模塑料124切割成单个管芯126。可通过在初始形成所述多个凹槽116的地方切割或蚀刻穿过晶圆,从而对该晶圆进行切割。以非限制性示例的方式,可通过使用锯、激光、水射流、等离子蚀刻或化学蚀刻对该晶圆进行切割。在各种实施方式中,可使用博世工艺将晶圆108、第一模塑料118和第二模塑料124切割成单独的管芯。
参见图9,示出了由图8的工艺形成的超薄半导体封装的剖视图。在各种实施方式中,超薄半导体封装128可包括功率半导体器件。具体地讲,超薄半导体封装可包括MOSFET。在其他实施方式中,超薄半导体封装128可不包括功率半导体器件。在各种实施方式中,超薄半导体封装128具有多个电触点130,所述多个电触点耦接到管芯134的第一侧132。在各种实施方式中,半导体封装128的管芯134可介于约10-25微米厚之间。在其他实施方式中,管芯134小于约10微米厚。在再其他实施方式中,管芯134可大于约25微米厚。如此前所讨论,功率半导体器件的超薄性质可改善该器件的RDS(ON)。
在各种实施方式中,超薄半导体封装128包括管芯134的第一侧132的一部分、第二侧138的一部分、第三侧140的一部分、第四侧的一部分和第五侧的一部分上的模塑料136。金属层144可耦接到管芯的第六侧142。在各种实施方式中,多于一个金属层可耦接到管芯的第六侧142。以非限制性示例的方式,该金属可包括金、钛、镍、银、铜、或它们的任何组合或合金。在各种实施方式中,从管芯的第六侧142中切出的凹槽146可在管芯134的周边周围延伸。
在各种实施方式中,用于形成半导体封装的方法可包括在晶圆的第一侧中形成多个凹槽。可使用蚀刻技术形成所述多个凹槽。
用于形成半导体封装的方法可包括使用模塑料涂布晶圆。在此类实施方式中,可使用液体分配方法、传递模塑方法或压塑方法施加模塑料。可在向晶圆的第二侧施加基本上5psi的压力的情况下使模塑料在100与200摄氏度之间固化。
在包括将第一模塑料和第二模塑料施加到晶圆的、形成半导体封装的方法的实施方式中,可使用机械抛光和化学蚀刻技术之一磨削第一模塑料和第二模塑料。
在半导体封装的各种实施方式中,管芯的第一侧可包括管芯周边周围的蚀刻。类似地,在各种实施方式中,管芯的第六侧可包括管芯周边周围的凹槽。管芯的第六侧可由第二模塑料覆盖。在包括金属层的实施方式中,金属层的边缘可由第一模塑料覆盖。
在以上描述中提到超薄半导体封装的特定实施方式以及实施部件、子部件、方法和子方法的地方,应当显而易见的是,可在不脱离其实质的情况下作出多种修改,并且这些实施方式、实施部件、子部件、方法和子方法可应用于其他超薄半导体封装。
Claims (10)
1.一种形成半导体封装的方法,包括:
在晶圆的第一侧形成多个凹槽,所述多个凹槽深入到所述晶圆的所述第一侧中,所述晶圆的所述第一侧包括多个电触点;
使用模塑料涂布所述晶圆的所述第一侧和所述多个凹槽的内部;
磨削所述晶圆的第二侧以将所述晶圆减薄到所需厚度;
在所述晶圆的第二侧上形成背金属;
通过磨削所述模塑料的第一侧来暴露所述多个电触点;以及
在所述多个凹槽处对所述晶圆进行切单以形成多个半导体封装。
2.根据权利要求1所述的方法,还包括在所述晶圆的所述第二侧上形成穿过所述背金属的沟槽,使用第二模塑料涂布所述晶圆的所述第二侧和所述背金属,以及将所述第二模塑料磨削到所需厚度。
3.根据权利要求1所述的方法,其中所述多个凹槽中的每个凹槽是阶梯式凹槽。
4.根据权利要求1所述的方法,其中所述晶圆的所述第二侧被磨削到所述多个凹槽的深度处。
5.根据权利要求1所述的方法,其中所述晶圆的一部分将所述背金属和所述多个凹槽分开。
6.根据权利要求1所述的方法,其中在磨削所述晶圆的所述第二侧期间移除所述晶圆的基本上90%的背面部分。
7.一种形成半导体封装的方法,包括:
在与晶圆的第一侧相对的晶圆的第二侧中形成多个凹槽,所述晶圆的所述第一侧包括多个电触点;
使用第一模塑料涂布所述晶圆的所述第一侧;
使用第二模塑料涂布所述晶圆的所述第二侧;
将所述第二模塑料磨削到所需厚度;
在所述第二模塑料及所述晶圆的所述第二侧上方形成金属层;
通过磨削所述第一模塑料的第一侧来暴露所述多个电触点;以及
沿着所述多个凹槽对所述晶圆进行切单,从而形成多个半导体封装。
8.一种半导体封装,包括:
具有第一侧、第二侧、第三侧、第四侧、第五侧和第六侧的管芯,所述管芯具有所述第一侧与所述第二侧之间的厚度,所述厚度小于25微米厚;
耦接到所述管芯的所述第一侧的多个电触点;
覆盖所述管芯的所述第一侧的一部分、所述管芯的所述第二侧的一部分、所述管芯的所述第三侧的一部分、所述管芯的所述第四侧的一部分以及所述管芯的所述第五侧的一部分的第一模塑料,其中所述多个电触点穿过所述第一模塑料暴露;以及
耦接到所述管芯的所述第六侧的金属层。
9.根据权利要求8所述的半导体封装,其中所述晶圆小于10微米厚。
10.根据权利要求8所述的半导体封装,其中所述第一模塑料完全覆盖所述管芯的所述第二侧、所述管芯的所述第三侧、所述管芯的所述第四侧和所述管芯的所述第五侧。
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US10763173B2 (en) | 2020-09-01 |
US20190252255A1 (en) | 2019-08-15 |
CN117374019A (zh) | 2024-01-09 |
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US20190057900A1 (en) | 2019-02-21 |
US20200357697A1 (en) | 2020-11-12 |
US11942369B2 (en) | 2024-03-26 |
US10319639B2 (en) | 2019-06-11 |
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