CN109065608A - A kind of lateral bipolar power semiconductor and preparation method thereof - Google Patents
A kind of lateral bipolar power semiconductor and preparation method thereof Download PDFInfo
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- 229920005591 polysilicon Polymers 0.000 claims description 6
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- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
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- 241000209140 Triticum Species 0.000 claims 1
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- 239000000243 solution Substances 0.000 description 9
- 230000005684 electric field Effects 0.000 description 6
- 230000008901 benefit Effects 0.000 description 5
- 238000002513 implantation Methods 0.000 description 5
- 230000003071 parasitic effect Effects 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
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- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 230000002441 reversible effect Effects 0.000 description 3
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000008094 contradictory effect Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 230000002829 reductive effect Effects 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000008034 disappearance Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
Abstract
A kind of lateral bipolar semiconductor power device and preparation method thereof, belongs to semiconductor power device technology field.The present invention is under the premise of keeping traditional bipolar power semiconductor cathode construction constant, by introducing an anode channels grid structure and source area and/or base area in device anode area, in the case where not influencing proper device operation and opening, by controlling anode channels grid structure, the forward conduction voltage drop of anode diode is bypassed, to achieve the effect that reduce power semiconductor forward conduction voltage drop.After anode diode is bypassed, reduce from anode region to the Minority carrier injection of drift region, the reversely restoring process time of device when off shortens, and improves the turn-off speed of device, reduces switching loss.Present invention improves the compromises of the carrier concentration profile of entire N-type drift region and forward conduction voltage drop and switching loss；And the production method of device does not need to increase additional processing step, compatible with traditional devices production method.
Description
Technical field
The invention belongs to power semiconductor and preparation technical fields, and in particular to a kind of lateral MOS control anode
Bipolar semiconductor power device and preparation method thereof.
Background technique
As a macrotaxonomy of electronic technology, power electronic technique (another macrotaxonomy is information electronic technology) is a kind of energy
The technology for enough realizing transmission, processing, storage and the control of electric energy is suitable for high-power electric and converts and handle.This technology energy
It is enough voltage, electric current, frequency, phase to be changed to meet the power requirement of system, to guarantee that electric energy obtains appropriate answer
With.In addition, electric energy uses after being handled by power electronic technique, it can more save, is efficiently and environmentally friendly.Power electronic technique birth
It is born in the fifties in century, as a new technology, it supports the development of modern industry and Defence business.In civil field, electricity
Power electronic technology is mainly used in industrial motor design, power grid construction and home electric etc..Modern power electronics technology
It has begun and is applied to more emerging fields, including new energy (such as high-power wind power generation), smart grid, rail traffic and change
Frequency household electrical appliances etc..In national defence, power electronic technique plays an important role in various aspects such as aerospace, opportunity of combat, naval vessels.
The application of power electronic technique depends on various power electronic systems, and the core devices of power electronic system are then that power is partly led
Body device.
In order to improve the performance of power semiconductor, improves its reliability, need under certain blocking voltage ability
The switching speed for improving device, reduces the switching loss of device and reduces forward conduction voltage drop.Fig. 1 shows lateral bipolar function
The structure of rate semiconductor devices --- IGBT device, device in forward conduction, from P-type anode region (also known as P-type anode region) 9 to
Holoe carrier is injected in N-type drift region 7, so that N-type drift region 7 is carried out conductance modulation, so that it is relatively low to obtain device
Forward conduction voltage drop；In device turn off process, these are present in the minority carrier in N-type drift region 7 and expand in depletion region
It needs to be extracted during exhibition, this process is the reversely restoring process of device turn off process.Due to depositing for Reverse recovery
In the turn-off time for increasing device simultaneously to increase turn-off power loss.Therefore, between the conduction voltage drop and turn-off power loss of device
Contradictory relation need to advanced optimize.
Development is most fast at present and most widely used power semiconductor surely belongs to insulated gate bipolar crystal
Manage (IGBT) and MOS control thyristor (MCT).The characteristic of both IGBT device set MOS and BJT, the height of existing MOSFET
Input impedance, grid-control ability and the simple advantage of driving circuit, while the high current density with BJT, low conduction voltage drop again
And the advantages of heavy current processing capacity, it is that other power semiconductors cannot compare in high-voltage great-current application field
, these advantages promote IGBT to become the ideal device for power switching of power semiconductor application field.And MCT is a kind of field
Controlled bipolar semiconductor power device belongs to third generation power semiconductor, have by a grid can control device open
The characteristics of opening and turning off, it has extremely low conduction voltage drop and high surge current ability to bear, in addition it there are also temperature is negative anti-
Present characteristic.MCT relies on its significant advantage, just receives the extensive concern of semiconductor power device researchers once proposition.
Lateral direction power semiconductor devices is integrated because it has the convenience being well compatible with integrated circuit technology to obtain power
The generally favor of circuit field, LIGBT and LMCT are no exception, and transversal device also combines LDMOS device structure
Advantage.LIGBT device and LMCT are the lateral bipolar integrated power device to grow up on the basis of IGBT and MCT respectively
The main difference of part, LMCT device and LIGBT device is the cathode construction of the two.It is illustrated by taking LIGBT as an example, mentions earliest
Out LIGBT structure be Si Wangxi university M Darwish and K Board.Typical LIGBT structure is at LDMOS drain electrode
N+ is replaced by P+, so that introducing PN junction hole at drain electrode injects mechanism, this is identical with IGBT structure feature, therefore its work
Principle is also almost the same with IGBT, the different differences for being only in that transverse structure and vertical structure.Due to lateral power
It must satisfy RESURF condition when pressure-resistant, its main feature is that peak value electric field is equal at surface anode and cathode when device pressure resistance, therefore
Drift region fully- depleted when device pressure resistance.This causes lateral LIGBT structure to be mostly NPT structure, need to specifically increase below the area anode p+
Add n-buffer layers to bear lateral high pressure.
Lateral direction power semiconductor devices equally also has the characteristics that as conventional power semiconductors device, needs to consider to lead
Contradictory relation between logical pressure drop and turn-off power loss.The turn-off power loss of device by device drift region when forward conduction minority carrier
Sub- concentration distribution influences and the forward conduction voltage drop of IGBT (MCT) is mainly made of following three parts: the channel pressure in MOS cell
Drop, the pressure drop of drift region and the pressure drop of anode diode.Because of conductivity modulation effect when forward conduction, the pressure drop of drift region
It is smaller and channel pressure drop is also lower compared with the pressure drop of anode diode.So can be considered such as with emphasis when considering to reduce conduction voltage drop
What reduces the pressure drop of anode diode.
Summary of the invention
In view of described above, the present invention provides a kind of lateral bipolar power semiconductor and its manufacturing method, passes through
The MOS structure of lead-ingroove gate control is anti-to control anode channels in the anode construction of lateral bipolar power semiconductor
Type provides channel for carrier, to realize the forward conduction voltage drop of bypass anode diode, reduces anode region to drift region
Conductivity modulation effect reduces the forward conduction voltage drop in device dynamic switching process with this, and improves forward conduction voltage drop and close
Tradeoff between breakdown consumption.
Technical scheme is as follows:
On the one hand, the present invention provides the MOS IGBT device of control anode, and IGBT device is actually by BJT (ambipolar three
Pole pipe) and MOS (insulating gate type field effect tube) composition lateral bipolar power semiconductor.
Technical solution one:
A kind of bipolar semiconductor power device of MOS control anode, including be located at the first conductive type semiconductor and adulterate
Anode construction, drift region structure, cathode construction and the control grid structure of 116 top of substrate；Wherein: drift region structure is located at first
116 upper surface of conductive type semiconductor doped substrate, the drift region structure include the doping drift of the second conductive type semiconductor
Area 107；Anode construction is located at the side of 107 top layer of the second conductive type semiconductor doped drift region, and the anode construction includes
Second conductive type semiconductor adulterates buffer layer 108, positioned at second conductive type semiconductor doping 108 top layer of buffer layer
First conductive type semiconductor anode region 109 and the anode metal 118 drawn by the first conductive type semiconductor anode region 109；
The cathode construction is located at the other side of 107 top layer of the second conductive type semiconductor doped drift region, and the cathode construction includes
First conductive type semiconductor body area 106, the first conductive type semiconductor adulterate emitter region 105, the second conductive type semiconductor
Adulterate emitter region 104 and cathodic metal 101；First conductive type semiconductor body area 106 is located at the second conductive type semiconductor and mixes
The top layer of miscellaneous drift region 107, the second conductive type semiconductor doping emitter region 104 are located at the first conductive type semiconductor body area
106 top layers are located at the first conduction type and partly lead close to the side of anode construction, the first conductive type semiconductor doping emitter region 105
The area Ti Ti side of 106 top layer far from anode construction, and the first conductive type semiconductor doping emitter region 105 and the second conduction
Both type semiconductor doping emitter region 104 contact with each other and upper surface is covered with cathodic metal 101；Control gate structure is located at device
The top layer of part, the control grid structure include control grid electrode 102 and control gate dielectric layer 103, control grid electrode 102 and the
Two conductive type semiconductors adulterate emitter region 104 and the first conductive type semiconductor body area 106 and pass through control 103 phase of gate dielectric layer
Contact；It is characterized by:
The anode construction further includes the second conductive type semiconductor doping source region 112 and anode channels grid structure；Sun
Pole inside configuration has the groove that the second conductive type semiconductor doped drift region layer 107 is extended into along device vertical direction,
The second conductive type semiconductor doping source region 112 is between groove and the first conductive type semiconductor anode region 109；
The anode channels grid structure includes: anode channels gate electrode 115, first anode groove gate dielectric layer 113 and second plate ditch
Slot gate dielectric layer 114, the first anode groove gate dielectric layer 113 and second plate groove gate dielectric layer 114 are located in the groove
Wall, and first anode groove gate dielectric layer 113 and the second conductive type semiconductor doping source region 112 and the second conduction type
Semiconductor doping buffer layer 108 is in contact, and the anode channels gate electrode 115 is located in groove.
Further, the bipolar semiconductor power device of MOS control anode of the present invention further includes the first conduction type half
Conductor impure base region 111, the first conductive type semiconductor impure base region 111 are located at anode channels grid structure and the first conduction
Between type semiconductor anode region 109, and with the upper surface of the second conductive type semiconductor doping source region 112 and side phase
Contact；The doping concentration of the first conductive type semiconductor impure base region 111 is less than the first conductive type semiconductor anode region
109。
The first conductive type semiconductor impure base region 111, which is introduced, based on above scheme passes through height in device forward conduction
The big Minority carrier injection efficiency that one conductive type semiconductor anode region 109 of density control provides obtains strong drift region conductance
Modulation, while reducing conduction voltage drop, while not influencing device performance, the first conductive type semiconductor of low concentration is mixed
Miscellaneous base area 111 reduces the threshold voltage of control grid structure, reduces the drive loss of control grid structure, improves control gate knot
The switching speed of structure reduces the resistance of control grid structure channel, further reduces the conduction voltage drop of device, reached more preferable
Bypass effect.
Further, it is slow can be greater than the doping of the second conductive type semiconductor for the depth of Anodic trench gate structure of the present invention
The junction depth for rushing layer 108 might be less that the junction depth of the second conductive type semiconductor doping buffer layer 108, can also be equal to
The junction depth of second conductive type semiconductor doping buffer layer 108.
Further, the thickness of second plate groove gate dielectric layer 114 is greater than or equal to first anode groove in the present invention
The thickness of gate dielectric layer 113.
Further, drift region structure of the present invention can be NPT structure, or FS structure.
Further, the thickness that gate dielectric layer 103 is controlled in the present invention is greater than the thickness of anode channels gate dielectric layer 113,114
Degree.
Further, the present invention in control grid electrode 102 width be greater than anode channels gate electrode 115 width.
Further, device of the present invention can be semiconductor-based product, can also be based on soi layer.
Further, the bipolar semiconductor power device of MOS of the present invention control anode using semiconductor material Si, SiC,
GaAs or GaN production.
Technical solution two:
A kind of bipolar semiconductor power device of MOS control anode, including be located at the first conductive type semiconductor and adulterate
Anode construction, drift region structure, cathode construction and the control grid structure of 116 top of substrate；Wherein, drift region structure is located at first
116 upper surface of conductive type semiconductor doped substrate, the drift region structure include the doping drift of the second conductive type semiconductor
Area 107；Anode construction is located at the side of 107 top layer of the second conductive type semiconductor doped drift region, and the anode construction includes
Second conductive type semiconductor adulterates buffer layer 108, positioned at second conductive type semiconductor doping 108 top layer of buffer layer
First conductive type semiconductor anode region 109 and the anode metal 118 drawn by the first conductive type semiconductor anode region 109；
The cathode construction is located at the other side of 107 top layer of the second conductive type semiconductor doped drift region, and the cathode construction includes
First conductive type semiconductor body area 106, the first conductive type semiconductor adulterate emitter region 105, the second conductive type semiconductor
Adulterate emitter region 104 and cathodic metal 101；First conductive type semiconductor body area 106 is located at the second conductive type semiconductor and mixes
The top layer of miscellaneous drift region 107, the second conductive type semiconductor doping emitter region 104 are located at the first conductive type semiconductor body area
106 top layers are located at the first conduction type and partly lead close to the side of anode construction, the first conductive type semiconductor doping emitter region 105
The area Ti Ti side of 106 top layer far from anode construction, and the first conductive type semiconductor doping emitter region 105 and the second conduction
Both type semiconductor doping emitter region 104 contact with each other and upper surface is covered with cathodic metal 101；Control gate structure is located at device
The top layer of part, the control grid structure include control grid electrode 102 and control gate dielectric layer 103, control grid electrode 102 and the
Two conductive type semiconductors adulterate emitter region 104 and the first conductive type semiconductor body area 106 and pass through control 103 phase of gate dielectric layer
Contact；It is characterized by:
The bipolar semiconductor power device of the MOS control anode further includes forming schottky junctions with anode metal 110
The the first conductive type semiconductor impure base region 111 and anode channels grid structure of touching；Have inside anode construction vertical along device
Direction extends into the groove of the second conductive type semiconductor doped drift region layer 107, and the first conductive type semiconductor adulterates base
Area 111 is located between groove and the first conductive type semiconductor anode region 109；The first conductive type semiconductor impure base region
111 doping concentration is less than the first conductive type semiconductor anode region 109；The anode channels grid structure includes: anode channels
Gate electrode 115, first anode groove gate dielectric layer 113 and second plate groove gate dielectric layer 114, the first anode trench gate
Dielectric layer 113 and second plate groove gate dielectric layer 114 are located in the groove wall, and first anode groove gate dielectric layer 113 with
First conductive type semiconductor impure base region 111 and the second conductive type semiconductor doping buffer layer 108 are in contact, the anode
Trench gate electrode 115 is located in groove.
The technical program is the doping concentration by adjusting the first conductive type semiconductor impure base region 111, makes itself and sun
Pole metal 110 forms Schottky contacts, and the first conductive type semiconductor anode region 109 forms ohm with anode metal 110 and connects
Touching.In device work, it is anti-that anode metal 110 with the first conductive type semiconductor impure base region 111 is formed by schottky junction
Partially, when controlling grid structure and forming conducting channel, the carrier by controlling grid structure channel is exhausted the schottky junction is reverse-biased
It is quickly drawn into anode metal 110 under the action of layer electric field, the technical program can realize effect same as technical solution one, but
Preparation process and structure are more simple.
Further, it is slow can be greater than the doping of the second conductive type semiconductor for the depth of Anodic trench gate structure of the present invention
The junction depth for rushing layer 108 might be less that the junction depth of the second conductive type semiconductor doping buffer layer 108, can also be equal to
The junction depth of second conductive type semiconductor doping buffer layer 108.
Further, the thickness of second plate groove gate dielectric layer 114 is greater than or equal to first anode groove in the present invention
The thickness of gate dielectric layer 113.
Further, drift region structure of the present invention can be NPT structure, or FS structure.
Further, the thickness that gate dielectric layer 103 is controlled in the present invention is greater than the thickness of anode channels gate dielectric layer 113,114
Degree.
Further, the present invention in control grid electrode 102 width be greater than anode channels gate electrode 115 width.
Further, device of the present invention can be semiconductor-based product, can also be based on soi layer.
Further, the bipolar semiconductor power device of MOS of the present invention control anode using semiconductor material Si, SiC,
GaAs or GaN production.
On the other hand, the present invention provides the MOS MCT device of control anode, and IGBT device is actually by (four layers of thyristor
Three terminal device) and MOS (insulating gate type field effect tube) composition lateral bipolar power semiconductor:
Technical solution one:
A kind of bipolar semiconductor power device of MOS control anode, including be located at the first conductive type semiconductor and adulterate
Anode construction, drift region structure, cathode construction and the control grid structure of 116 top of substrate；Wherein, drift region structure is located at first
216 upper surface of conductive type semiconductor doped substrate, the drift region structure include the doping drift of the second conductive type semiconductor
Area 207；Anode construction is located at the side of 207 top layer of the second conductive type semiconductor doped drift region, and the anode construction includes
Second conductive type semiconductor adulterates buffer layer 208, positioned at second conductive type semiconductor doping 208 top layer of buffer layer
First conductive type semiconductor anode region 209 and the anode metal 218 drawn by the first conductive type semiconductor anode region 209；
The cathode construction is located at the other side of 207 top layer of the second conductive type semiconductor doped drift region, and the cathode construction includes
First conductive type semiconductor body area 206, the second conductive type semiconductor base area 217, the first conductive type semiconductor doping hair
Penetrate area 205, the second conductive type semiconductor doping emitter region 204 and cathodic metal 201；Second conductive type semiconductor is mixed
Miscellaneous emitter region 204 and the second conductive type semiconductor impure base region 217 are located at the first conductive type semiconductor body area 206
Top layer both ends and the first conductive type semiconductor doping emitter region 205 are located at the second conductive type semiconductor doping transmitting at both ends
Between area 204 and the second conductive type semiconductor impure base region 217, the first conductive type semiconductor adulterates emitter region 205 and portion
The upper surface of the second conductive type semiconductor doping emitter region 204 is divided to be in contact with cathodic metal 201；The control gate structure bit
In the top layer of device, the control grid structure includes control grid electrode 202 and control gate dielectric layer 203, controls gate dielectric layer
203 are located at the first conductive type semiconductor body area 206, the second conductive type semiconductor base area 217, the first conductive type semiconductor
Adulterate emitter region 205 and the second conductive type semiconductor doped drift region 207；The control grid electrode 202 is located at control gate Jie
The upper surface of matter layer 203 and by control gate dielectric layer 203 and the second conductive type semiconductor doping emitter region 204, first lead
Electric type semiconductor body area 206 and the contact of the second conductive type semiconductor doped drift region 207；It is characterized by:
The anode construction further includes the second conductive type semiconductor doping source region 212 and anode channels grid structure；Sun
Pole inside configuration has the groove that the second conductive type semiconductor doped drift region layer 207 is extended into along device vertical direction,
The second conductive type semiconductor doping source region 212 is between groove and the first conductive type semiconductor anode region 209；
The anode channels grid structure includes: anode channels gate electrode 215, first anode groove gate dielectric layer 213 and second plate ditch
Slot gate dielectric layer 214, the first anode groove gate dielectric layer 213 and second plate groove gate dielectric layer 214 are located in the groove
Wall, and first anode groove gate dielectric layer 213 and the second conductive type semiconductor doping source region 212 and the second conduction type
Semiconductor doping buffer layer 208 is in contact, and the anode channels gate electrode 215 is located in groove.
Further, the bipolar semiconductor power device of MOS control anode of the present invention further includes the first conduction type half
Conductor impure base region 211, the first conductive type semiconductor impure base region 211 are located at anode channels grid structure and the first conduction
Between type semiconductor anode region 209, and with the upper surface of the second conductive type semiconductor doping source region 212 and side phase
Contact.The doping concentration of the first conductive type semiconductor impure base region 211 is less than the first conductive type semiconductor anode region
209。
The first conductive type semiconductor impure base region 211, which is introduced, based on above scheme passes through height in device forward conduction
The big Minority carrier injection efficiency that one conductive type semiconductor anode region 209 of density control provides obtains strong drift region conductance
Modulation, while reducing conduction voltage drop, while not influencing device performance, the first conductive type semiconductor of low concentration is mixed
Miscellaneous base area 211 reduces the threshold voltage of control grid structure, reduces the drive loss of control grid structure, improves control gate knot
The switching speed of structure reduces the resistance of control grid structure channel, further reduces the conduction voltage drop of device, reached more preferable
Bypass effect.
Further, it is slow can be greater than the doping of the second conductive type semiconductor for the depth of Anodic trench gate structure of the present invention
The junction depth for rushing layer 208 might be less that the junction depth of the second conductive type semiconductor doping buffer layer 208, can also be equal to
The junction depth of second conductive type semiconductor doping buffer layer 108.
Further, the thickness of second plate groove gate dielectric layer 214 is greater than or equal to first anode groove in the present invention
The thickness of gate dielectric layer 213.
Further, drift region structure of the present invention can be NPT structure, or FS structure.
Further, the thickness that gate dielectric layer 203 is controlled in the present invention is greater than the thickness of anode channels gate dielectric layer 213,214
Degree.
Further, the present invention in control grid electrode 202 width be greater than anode channels gate electrode 215 width.
Further, device of the present invention can be semiconductor-based product, can also be based on soi layer.
Further, the bipolar semiconductor power device of MOS of the present invention control anode using semiconductor material Si, SiC,
GaAs or GaN production.
Technical solution two:
A kind of bipolar semiconductor power device of MOS control anode, including be located at the first conductive type semiconductor and adulterate
Anode construction, drift region structure, cathode construction and the control grid structure of 116 top of substrate；Wherein, drift region structure is located at first
216 upper surface of conductive type semiconductor doped substrate, the drift region structure include the doping drift of the second conductive type semiconductor
Area 207；Anode construction is located at the side of 207 top layer of the second conductive type semiconductor doped drift region, and the anode construction includes
Second conductive type semiconductor adulterates buffer layer 208, positioned at second conductive type semiconductor doping 208 top layer of buffer layer
First conductive type semiconductor anode region 209 and the anode metal 218 drawn by the first conductive type semiconductor anode region 209；
The cathode construction is located at the other side of 207 top layer of the second conductive type semiconductor doped drift region, and the cathode construction includes
First conductive type semiconductor body area 206, the second conductive type semiconductor base area 217, the first conductive type semiconductor doping hair
Penetrate area 205, the second conductive type semiconductor doping emitter region 204 and cathodic metal 201；Second conductive type semiconductor is mixed
Miscellaneous emitter region 204 and the second conductive type semiconductor impure base region 217 are located at the first conductive type semiconductor body area 206
Top layer both ends and the first conductive type semiconductor doping emitter region 205 are located at the second conductive type semiconductor doping transmitting at both ends
Between area 204 and the second conductive type semiconductor impure base region 217, the first conductive type semiconductor adulterates emitter region 205 and portion
The upper surface of the second conductive type semiconductor doping emitter region 204 is divided to be in contact with cathodic metal 201,；The control grid structure
Positioned at the top layer of device, the control grid structure includes control grid electrode 202 and control gate dielectric layer 203, controls gate medium
Floor 203 is located at the first conductive type semiconductor body area 206, and the second conductive type semiconductor base area 217, the first conduction type are partly led
Body adulterates emitter region 205 and the second conductive type semiconductor doped drift region 207；The control grid electrode 202 is located at control gate
The upper surface of dielectric layer 203 and by control gate dielectric layer 203 and the second conductive type semiconductor doping emitter region 204, first
Conductive type semiconductor body area 206 and the contact of the second conductive type semiconductor doped drift region 207；It is characterized by:
The anode construction further includes the first conductive type semiconductor doping that Schottky contacts are formed with anode metal 220
Base area 211 and anode channels grid structure；Have inside anode construction and extends into the second conduction type half along device vertical direction
The groove of conductor doped drift region layer 207, the first conductive type semiconductor impure base region 211 are located at groove and the first conduction type
Between semiconductor anode side area 209；The doping concentration of the first conductive type semiconductor impure base region 211 is less than the first conductive-type
Type semiconductor anode side area 209；The anode channels grid structure includes: anode channels gate electrode 215, first anode groove gate medium
Layer 213 and second plate groove gate dielectric layer 214, the first anode groove gate dielectric layer 213 and second plate trench gate are situated between
Matter layer 214 is located in the groove wall, and first anode groove gate dielectric layer 213 and the first conductive type semiconductor impure base region
211 and second conductive type semiconductor doping buffer layer 208 be in contact, the anode channels gate electrode 215 is located in groove.
The technical program is the doping concentration by adjusting the first conductive type semiconductor impure base region 211, makes itself and sun
Pole metal 110 forms Schottky contacts, and the first conductive type semiconductor anode region 209 forms ohm with anode metal 210 and connects
Touching.In device work, it is anti-that anode metal 210 with the first conductive type semiconductor impure base region 211 is formed by schottky junction
Partially, when controlling grid structure and forming conducting channel, the carrier by controlling grid structure channel is exhausted the schottky junction is reverse-biased
It is quickly drawn into anode metal 210 under the action of layer electric field, the technical program can realize effect same as technical solution one, but
Preparation process and structure are more simple.
Further, it is slow can be greater than the doping of the second conductive type semiconductor for the depth of Anodic trench gate structure of the present invention
The junction depth for rushing layer 208 might be less that the junction depth of the second conductive type semiconductor doping buffer layer 208, can also be equal to
The junction depth of second conductive type semiconductor doping buffer layer 108.Further, second plate groove gate dielectric layer in the present invention
214 thickness is greater than or equal to the thickness of first anode groove gate dielectric layer 213.
Further, drift region structure of the present invention can be NPT structure, or FS structure.
Further, the thickness that gate dielectric layer 203 is controlled in the present invention is greater than the thickness of anode channels gate dielectric layer 213,214
Degree.
Further, the present invention in control grid electrode 202 width be greater than anode channels gate electrode 215 width.
Further, device of the present invention can be semiconductor-based product, can also be based on soi layer.
Further, the bipolar semiconductor power device of MOS of the present invention control anode using semiconductor material Si, SiC,
GaAs or GaN production.
In terms of two above, the present invention provides the bipolar semiconductor power device of MOS control anode as described above
Preparation method, which comprises the following steps:
Step 1: preparing the first conductive type semiconductor doped substrate, in the first conductive type semiconductor doped substrate
The second conductive type semiconductor of layer epitaxially grown doped drift region, is moved back by pre-oxidation, photoetching, etching, ion implanting and high temperature
Fire process, in the terminal structure of the positive making devices of semiconductor chip；
Step 2: making cathode construction on the top layer of semiconductor chip side, pass through ion in semiconductor chip top layer
Injection technology and annealing process form the first conductive type semiconductor body area, the second conductive type semiconductor impure base region, first
Conductive type semiconductor adulterates emitter region and the second conductive type semiconductor doping emitter region or the first conductive type semiconductor
Body area, the second conductive type semiconductor impure base region, the first conductive type semiconductor doping emitter region and the second conduction type half
Conductor adulterates emitter region；
Step 3: passing through the second conductive type impurity of ion implanting and annealing on the top layer of the semiconductor chip other side
The second conductive type semiconductor that technique forms device adulterates buffer layer；
Step 4: passing through the first conduction type of ion implanting in the top layer of the second conductive type semiconductor doping buffer layer
Impurity and the first conductive type semiconductor of annealing process making devices adulterate anode region；
Step 5: carrying out etching groove after the first conductive type semiconductor doping anode region photomask surface goes out window, carving
The depth of erosion gained groove is greater than the junction depth of the first conductive type semiconductor doping anode region；
Step 6: forming dielectric layer in trenched side-wall, then accumulation fills polysilicon in the trench；
Step 7: etching the dielectric layer and polysilicon formed in groove in the 9th step by photoetching process, anode ditch is made
Slot gate electrode and anode channels gate dielectric layer；
Step 8: being adulterated between anode region and anode channels grid structure in the first conductive type semiconductor, infused by ion
Enter and annealing process makes the first conductive type semiconductor impure base region；
Step 9: by deposit, etching technics in the first conductive type semiconductor body area, the second conductive type semiconductor base
The upper surface in area, the first conductive type semiconductor doping emitter region and the second conductive type semiconductor doped drift region makes control
Gate dielectric layer；
Step 10: adulterating emitter region in the first conductive type semiconductor doping emitter region and the second conductive type semiconductor
Upper surface makes cathodic metal；Emitter region, the first conductive type semiconductor body area and the are adulterated in the second conductive type semiconductor
Control gate dielectric layer upper surface above two conductive type semiconductor doped drift regions makes control grid electrode；In the first conductive-type
Type semiconductor anode side area and the upper surface of the first conductive type semiconductor impure base region make anode metal.Further, this hair
The bright doping concentration by controlling the first conductive type semiconductor impure base region, makes it form Schottky contacts with anode metal,
And the first conductive type semiconductor doping anode region and anode metal form Ohmic contact.
Further, the present invention can save the making step of the first conductive type semiconductor impure base region, be replaced
To be formed and anode ditch in the first conductive type semiconductor doping anode region top layer by the second conductive type impurity of ion implanting
The second conductive type semiconductor doping source region that slot grid structure is in contact.
Further, based on the above technical solution, the first conduction type half can be made in the 8th step in the present invention
The second conductive type impurity of ion implanting is continued through after conductor impure base region forms the second conductive type semiconductor doped source
Polar region.
The working principle of the invention is specific as follows:
The present invention is under the premise of keeping traditional lateral bipolar power semiconductor cathode construction constant, such as Fig. 2 and 3
Shown, the present invention is not influencing device by introducing an anode channels grid structure and source area and/or base area in device anode area
In the case that part is worked normally and is opened:
1) by control anode channels grid structure, the forward conduction voltage drop of anode diode is bypassed, to reach reduction function
The effect of rate semiconductor devices forward conduction voltage drop.
In break-over of device, anode diode is bypassed by opening anode MOS structure, reduces the forward conduction pressure of device
Drop.Anode MOS channel can be closed when the forward voltage drop of device increases because of conductivity modulation effect disappearance to come so that hole can
Conductance modulation is carried out to inject drift region again.The dynamic switch process of anode MOS enables to device to have relatively biography in this way
The system lower forward conduction voltage drop mean value of structure.
2) after anode diode is bypassed, reduce from anode region to the Minority carrier injection of drift region, in this way, device exists
Reversely restoring process time when shutdown shortens, and improves the turn-off speed of device.
In device shutdown, by advance opening anode MOS channel when device turns off or before shutdown, dropped with this
It is hole when the minority carrier N-channel device of low anode, is electron injection when P-channel device, can passes through reduce half in this way
Conductor power device turns off the excess minority carrier in preceding drift region, and then when reducing few sub- extraction required when device shutdown
Between, it is finally reached the effect for improving device turn-off speed.Working method in this way enables to device dynamic switching process
In average forward conduction voltage drop it is smaller and can further improve the compromise of forward conduction voltage drop and turn-off power loss.
However, the injection of minority carrier can reduce, thus conductivity modulation effect during bypassing anode diode
It can weaken.At this point, the forward conduction voltage drop as caused by anode bypass diode reduction can because conductance modulation decrease and
It is gradually increased.Therefore, during actual use, it needs just guarantee device to one pulse voltage of anode channels gate electrode
Forward conduction voltage maintains state more lower than traditional devices value.Also, by anode bypass diode before device shutdown,
The injection rate of minority carrier can be further decreased, and then preferably reduces turn-off time and the turn-off power loss of device.Therefore,
Structure of the invention greatly reduces forward conduction voltage drop and the turn-off time of device, improves the switching speed of device, reduces device
The switching loss of part.The present invention is used to control the unlatching of anode MOS channel using anode channels grid structure, reduces ditch as far as possible
Influence of the parasitic capacitance that slot grid introduce to device, and threshold voltage is advantageously reduced to improve its grid driving capability, it improves
Anode channels grid structure switching frequency.The present invention can also reduce side medium by increasing the thickness of trench gate bottom dielectric layer
Thickness further improve reduction threshold voltage, accelerate the switching speed of anode MOS structure, control it more easily.It can
Reduce the thickness of side medium to increase the thickness of trench gate bottom dielectric.In addition, MOS proposed by the invention controls anode
The production method of semiconductor power device does not need to increase additional processing step, compatible with traditional devices production method.
Compared with prior art, the beneficial effects of the present invention are: improving the switching speed of device, the switch damage of device is reduced
Consumption；The forward conduction voltage drop and turn-off power loss for reducing device, improve the carrier concentration profile of entire N-type drift region, change
It has been apt to the compromise of forward conduction voltage drop and switching loss；MOS control anode power semiconductor devices production proposed by the invention
Method does not need to increase additional processing step, compatible with traditional devices production method.
Detailed description of the invention
Fig. 1 is the structure cell schematic diagram of traditional lateral direction power semiconductor devices.
In Fig. 1,1 is emitter metal, and 2 be control grid electrode, and 3 be control gate medium, and 4 be N+ emitter region, and 5 emit for P+
Area, 6 be the area PXing Ti, and 7 be N-type drift region, and 8 be N-type buffer layer, and 9 be P-type anode region, and 10 be anode metal, and 11 serve as a contrast for p-type
Bottom.
Fig. 2 is the structure cell schematic diagram of the MOS control anode semiconductor power device of embodiment 1.
Fig. 3 is the structure cell schematic diagram of the MOS control anode semiconductor power device of embodiment 2.
Fig. 4 is the structure cell schematic diagram of the MOS control anode semiconductor power device of embodiment 3.
Fig. 5 is the structure cell schematic diagram of the MOS control anode semiconductor power device of embodiment 4.
Fig. 2 is into Fig. 5, and 101 be cathodic metal, and 102 be control grid electrode, and 103 emit for control gate medium, 104 for N+
Area, 105 be P+ emitter region, and 106 be the area PXing Ti, and 107 be N-type drift region, and 108 be N-type buffer layer, and 109 be P-type anode region,
110 be anode metal, and 111 be the base area P-, and 112 be N+ type source electrode, and 113 be first anode groove gate dielectric layer, and 114 be the second sun
Pole groove gate dielectric layer, 115 be anode channels gate electrode, and 116 be P type substrate.
Fig. 6 is the MOS control anode semiconductor power device structure cell schematic diagram of embodiment 5.
Fig. 7 is the MOS control anode semiconductor power device structure cell schematic diagram of embodiment 6.
Fig. 8 is the MOS control anode semiconductor power device structure cell schematic diagram of embodiment 7.
Fig. 9 is the MOS control anode semiconductor power device structure cell schematic diagram of embodiment 8.
Fig. 6 is into Fig. 9, and 201 be emitter metal, and 202 be control grid electrode, and 203 send out for control gate medium, 204 for N+
Area is penetrated, 205 be P+ emitter region, and 206 be the area PXing Ti, and 207 be N-type drift region, and 208 be N-type buffer layer, and 209 be P-type anode region,
210 be anode metal, and 211 be the base area P-, and 212 be N+ type source electrode, and 213 be first anode groove gate dielectric layer, and 214 be the second sun
Pole groove gate dielectric layer, 215 be anode channels gate electrode, and 216 be P type substrate, and 217 be the base area N-.
Figure 10 is that etching is formed after anode channels filling oxide layer and polygate electrodes in the manufacturing method of the present invention
Device architecture schematic diagram.
Figure 11 is that the device behind the area P-base, N-type buffer layer, the base area P- is formed after the manufacturing method of the present invention intermediate ion injects
Part structural schematic diagram.
Figure 12 is that the device after P+ emitter region, N+ emitter region, N+ source region is formed after the manufacturing method of the present invention intermediate ion injects
Part structural schematic diagram.
Figure 13 is that the theoretical forward conduction voltage drop of the transverse semiconductor power device of MOS control anode provided by the invention shows
It is intended to.
Specific embodiment
With reference to the accompanying drawings of the specification with specific embodiment the present invention is described in detail technical solution, it is expected fields skill
Art personnel can be realized, and understand the principle of the present invention and characteristic:
Embodiment 1:
The present embodiment provides a kind of IGBT device of MOS control anode, structure cell is as shown in Fig. 2, include being located at P+
Anode construction, drift region structure, cathode construction and the control grid structure of 116 top of substrate；Wherein, drift region structure is located at P+ lining
116 upper surface of bottom, the drift region structure include N-type drift region 107；Anode construction is located at the one of 107 top layer of N-type drift region
Side, the anode construction include N-type buffer layer 108, positioned at the P-type anode region 109 of 108 top layer of N-type buffer layer and by p-type
The anode metal 118 that anode region 109 is drawn；The cathode construction is located at the other side of 107 top layer of N-type drift region, the cathode
Structure includes the area PXing Ti 106, P+ emitter region 105, N+ emitter region 104 and cathodic metal 101；The area PXing Ti 106 is located at N-type drift
The top layer in area 107, N+ emitter region 104 are located at 106 top layer of the area PXing Ti close to the side of anode construction, and P+ emitter region 105 is located at P
The area Xing Ti side of 106 top layer far from anode construction, and both P+ emitter region 105 and N+ emitter region 104 contact with each other and on
Surface is covered with cathodic metal 101；Control gate structure is located at the top layer of device, and the control grid structure includes control grid electrode
102 pass through control gate dielectric layer with control gate dielectric layer 103, control grid electrode 102 and N+ emitter region 104 and the area PXing Ti 106
103 are in contact, and the thickness of the control field oxide 103 is aboutIt is characterized by:
The anode construction further includes the base area P- 111, N+ source area 112 and anode channels grid structure；Inside anode construction
With the groove for extending into N-type drift region 107 along device vertical direction, the lower surface of the groove is located at N-type buffer layer 108
Lower surface under；The base area P- 111 between anode channels grid structure and P-type anode region 109, the base area P- 111
Doping concentration be less than P-type anode region 209 doping concentration；The N+ source area 112 be located at the top layer of the base area P- 111 and with sun
The contact of pole trench gate structure；The anode channels grid structure includes: anode channels gate electrode 115, first anode groove gate medium
Layer 113 and second plate groove gate dielectric layer 114, the first anode groove gate dielectric layer 113 are located at trenched side-wall, and described the
Two anode channels gate dielectric layers 114 are located at the bottom wall of groove, the first anode groove gate dielectric layer 113 and N+ source area 112
It is in contact with N-type buffer layer 108, the second plate groove gate dielectric layer 114 is located at ditch with the anode channels gate electrode 115
In slot.
Embodiment 2:
The present embodiment provides a kind of IGBT devices of MOS control anode, and structure cell is as shown in figure 3, not with embodiment 1
With the thickness of second plate groove gate dielectric layer 114 is greater than first anode groove gate dielectric layer in anode channels grid structure
113 thickness, specifically, the thickness of first anode groove gate dielectric layer 113 is aboutSecond plate trench gate is situated between
114 thickness of matter layer is aboutThe purpose of this design is: controlling the cut-in voltage of anode channels grid simultaneously
The parasitic capacitance for reducing anode channels gate electrode, so that the parasitic parameter for reducing anode MOS structure is brought to IGBT device parameter
Adverse effect.
Embodiment 3:
The present embodiment provides a kind of IGBT devices of MOS control anode, and structure cell is as shown in figure 4, with embodiment 1
Unlike: the N+ source area 112 in anode MOS structure is removed and is changed to the base area P- 111.Due to the concentration phase of the base area P- 111
It is lower compared with 109 concentration of P-type anode region, the channel inversion of anode channels gate control side when device work, to reach bypass
The effect of anode diode, P-type anode region 109 and anode metal 110 form Ohmic contact, the base area P- 111 and sun at this time
Pole metal 110 forms Schottky contacts.
In device work, the schottky junction that the base area anode metal 110 and P- 111 is formed is reverse-biased, when control grid structure shape
It is quick under the action of the schottky junction reverse-biased depletion layer electric field by the carrier for controlling grid structure channel when at conducting channel
It is drawn into anode metal 110.The present embodiment can realize effect similarly to Example 1, but process and structure is more simple.
Embodiment 4:
The present embodiment provides a kind of IGBT devices of MOS control anode, and structure cell is as shown in figure 5, with embodiment 1
Unlike: the lower surface of anode channels grid structure is located at the lower surface of N-type buffer layer 108 or more.The purpose designed in this way is
The depletion layer that device can be made to prevent P type substrate 116/N type drift region 107 from forming knot in reverse withstand voltage extends to groove
Lead to the oxide layer breakdown of trench gate bottom when grid bottom to reduce the pressure resistance of device.
Embodiment 5:
The present embodiment provides a kind of MCT device of MOS control anode, structure cell is as shown in fig. 6, include being located at P+ to serve as a contrast
Anode construction, drift region structure, cathode construction and the control grid structure of 116 top of bottom；Wherein, drift region structure is located at P+ substrate
216 upper surfaces, the drift region structure include N-type drift region 207；Anode construction is located at the side of 207 top layer of N-type drift region,
The anode construction includes N+ buffer layer 208, positioned at the P-type anode region 209 of 208 top layer of N+ buffer layer and by p type anode
The anode metal 218 that area 209 is drawn；The cathode construction is located at the other side of 207 top layer of N-type drift region, the cathode construction
Including the area PXing Ti 206, the base area N- 217, P+ emitter region 205, N+ emitter region 204 and cathodic metal 201；The area PXing Ti 206 is located at N
The top layer of type drift region 207；The base area N- 217 is located at the top layer in the area PXing Ti 206；Have on the top layer of the base area N- 217 mutually indepedent
P+ emitter region 205 and N+ emitter region 204, wherein P+ emitter region 205 is close to anode construction side；P+ emitter region 205 and N+ hair
The upper surface for penetrating area 204 has cathodic metal；The control gate structure is located at the top layer of device, and the control grid structure includes
Control grid electrode 202 and control gate dielectric layer 203, control gate dielectric layer 203 are located at the area PXing Ti 206, the base area N- 217, P+ transmitting
Area 205 and N-type drift region 207；The control grid electrode 202 is located at the upper surface of control gate dielectric layer 203 and passes through control gate
Dielectric layer 203 is contacted with N+ emitter region 204, the area PXing Ti 206 and N-type drift region 207；It is characterized by:
The anode construction further includes the base area P- 211, N+ source area 212 and anode channels grid structure；Inside anode construction
With the groove for extending into N-type drift region 207 along device vertical direction, the lower surface of the groove is located at N+ buffer layer 208
Lower surface under；The base area P- 211 is between anode channels grid structure and P-type anode region 209, the base area P- base area
211 doping concentration is less than the doping concentration of P-type anode region 209；The N+ source area 212 be located at the top layer of the base area P- 211 and
It is contacted with anode channels grid structure；The anode channels grid structure includes: anode channels gate electrode 215, first anode trench gate
Dielectric layer 213 and second plate groove gate dielectric layer 214, the first anode groove gate dielectric layer 213 are located at trenched side-wall, institute
State the bottom wall that second plate groove gate dielectric layer 214 is located at groove, the first anode groove gate dielectric layer 213 and N+ source area
212 and N+ buffer layer 208 is in contact, and the second plate groove gate dielectric layer 214 is located at the anode channels gate electrode 215
In groove.
Embodiment 6:
The present embodiment provides a kind of IGBT devices of MOS control anode, and structure cell is as shown in fig. 7, not with embodiment 5
With the thickness of second plate groove gate dielectric layer 214 is greater than first anode groove gate dielectric layer in anode channels grid structure
213 thickness.The purpose of this design is: the cut-in voltage in control anode channels grid reduces anode channels gate electrode simultaneously
Parasitic capacitance, thus reduce anode MOS structure parasitic parameter give IGBT device parameter bring adverse effect.
Embodiment 7:
The present embodiment provides a kind of IGBT devices of MOS control anode, and structure cell is as shown in figure 8, with embodiment 5
Unlike: the N+ source area 212 in anode MOS structure is removed and is changed to the base area P- 211.Due to the concentration phase of the base area P- 211
It is lower compared with 209 concentration of P-type anode region, the channel inversion of anode channels gate control side when device work, to reach bypass
The effect of anode diode, P-type anode region 209 and anode metal 220 form Ohmic contact, the base area P- 211 and sun at this time
Pole metal 220 forms Schottky contacts.
In device work, the schottky junction that the base area anode metal 210 and P- base area 211 is formed is reverse-biased, when control gate knot
When being configured to conducting channel, by controlling the carrier of grid structure channel under the action of the schottky junction reverse-biased depletion layer electric field
Quickly it is drawn into anode metal 210.The present embodiment can realize effect similarly to Example 5, but process and structure is more simple.
Embodiment 8:
The present embodiment provides a kind of IGBT devices of MOS control anode, and structure cell is as shown in figure 9, with embodiment 1
Unlike: the lower surface of anode channels grid structure is located at the lower surface of N-type buffer layer 208 or more.The purpose designed in this way is
The depletion layer that device can be made to prevent P type substrate 216/N type drift region 207 from forming knot in reverse withstand voltage extends to groove
Lead to the oxide layer breakdown of trench gate bottom when grid bottom to reduce the pressure resistance of device.
Embodiment 9:
The specific embodiment of preparation method provided in this embodiment be by taking the IGBT device of 600V voltage class as an example into
Row illustrates that Figure 10 to 12 provides the schematic diagram of critical process step, it is specific the preparation method is as follows:
Step 1: choose P type substrate of the p-type heavy doping monocrystalline silicon piece as device, the silicon wafer thickness of selection for 100~
200μm；
Step 2: 1100 DEG C at a temperature of, in P type substrate epitaxial growth n type semiconductor layer as N-type drift region 9,
About 100 μm of the thickness of the semiconductor layer of growth or so；
Step 3: pass through pre-oxidation, photoetching, etching, ion implanting and high-temperature annealing process on the surface of N-type drift region 9,
In the terminal structure of front side of silicon wafer making devices；
Step 4: by the N-type buffer layer of ion implanting N-type impurity and making devices of annealing, the N-type buffer layer of formation
With a thickness of 15~30 μm, wherein ion implantation energy is 1500keV~2000keV, implantation dosage 1013~1014A/cm2, move back
Fiery temperature is 1200-1250 DEG C, and annealing time is 300~600 minutes；
Step 5: forming P-type anode region 5 by ion implanting p type impurity, the P-type anode region 5 is located at the resistance of N-type electric field
Only 7 lower surface of layer, Implantation Energy are 40~60keV, implantation dosage 1012~1013A/cm2, in the atmosphere that H2 is mixed with N2
Lower progress back side annealing, temperature are 400~450 DEG C, and the time is 20~30 minutes；
Step 6: depositing one layer of TEOS in silicon chip surface, with a thickness of 700~1000nm, after making window by lithography, groove is carried out
Silicon etching, etches groove, and the depth of groove is more than N-type buffer layer；After the completion of etching groove, by HF solution by surface
TEOS rinsed clean；
Step 7: forming oxide layer in trenched side-wall under the atmosphere of O2 at 1050 DEG C~1150 DEG C；Then 750 DEG C~
Accumulation fills polysilicon in the trench at 950 DEG C；
Step 8: etching the oxide layer formed in groove in the 7th step and polysilicon using photoetching process, obtaining anode ditch
Slot gate electrode and anode channels gate dielectric layer；
Step 9: photoetching, passes through the N+ source area and N+ emitter region of ion implanting N-type impurity making devices, ion implanting
Energy be 30~60keV, implantation dosage 1015~1016A/cm2；The N+ source area is located in the base area P- and and anode
Trench gate is in contact；
Step 10: photoetching, passes through ion implanting p type impurity and the P+ emitter region for making devices of annealing, the energy of ion implanting
Amount is 60~80keV, implantation dosage 1015~1016A/cm2, annealing temperature are 900 DEG C, and the time is 20~30 minutes；It is described
P+ emitter region and N+ emitter region are located at the area PXing Ti top layer side by side；
Step 11: by deposit, etching technics the area PXing Ti, the base area N-, P+ emitter region and N-type drift region upper table
Face forms control gate dielectric layer；
Step 12: forming emitter in N+ emitter region and P+ emitter region upper surface by deposit metal, lithography and etching
Metal forms anode metal in P-type anode region and the base area P- upper surface, above N+ emitter region, the area PXing Ti and N-type drift region
Control gate dielectric layer upper surface formed control grid electrode.
Further, on the basis of the present embodiment, the making step of the base area P- can be saved；N+ source electrode can also be saved
The making step in area, and the doping concentration by adjusting the first conductive type semiconductor impure base region, make itself and anode metal shape
At Schottky contacts.
It needs to specialize, the bipolar semiconductor power device of MOS control anode of the present invention can not only use
Si can also use SiC, GaAs or GaN semi-conducting material manufacturing.
It is the theoretical forward conduction of MOS control anode channels grid charge storage type IGBT provided by the invention as shown in figure 13
Pressure drop schematic diagram, wherein t1IGBT on state is identical as traditional structure when the period, t2The back anode channels of period IGBT
Grid conducting.It can be seen from the figure that the voltage by anode channels grid controls, the t2 period in the conducting of back anode channels grid
Influence of the back PN junction to break-over of device characteristic can be shielded, so that the average forward conduction voltage drop of device is more compared with traditional structure
It is low.
The embodiment of the present invention is elaborated in conjunction with attached drawing above, but the invention is not limited to above-mentioned
Specific embodiment, above-mentioned specific embodiment is only schematical, rather than restrictive, the ordinary skill people of this field
Member under the inspiration of the present invention, can also make many in the case where not departing from present inventive concept and claimed range
Deformation, these belong to protection of the invention.
Claims (10)
1. a kind of bipolar semiconductor power device of lateral MOS control anode, including be located at the first conductive type semiconductor and mix
Anode construction, drift region structure, cathode construction and control grid structure above miscellaneous substrate；Wherein: drift region structure is located at first
Conductive type semiconductor doped substrate upper surface, the drift region structure include the second conductive type semiconductor doped drift region；
Anode construction is located at the side of the second conductive type semiconductor doped drift region top layer, and the anode construction includes the second conductive-type
Type semiconductor doping buffer layer is partly led positioned at the first conduction type that second conductive type semiconductor adulterates buffer layer top layer
Body anode region and the anode metal drawn by the first conductive type semiconductor anode region；The cathode construction is located at the second conductive-type
The other side of type semiconductor doping drift region top layer；Control gate structure is located at the top layer of device, and the control grid structure includes
Control grid electrode and control gate dielectric layer, the control gate dielectric layer are located at cathode construction and the doping of the second conductive type semiconductor
The upper surface of drift region, the control grid electrode are located at the control gate dielectric layer upper surface above cathode construction；It is characterized by:
The anode construction further includes the second conductive type semiconductor doping source region and anode channels grid structure；In anode construction
Portion has the groove that the second conductive type semiconductor doped drift region layer is extended into along device vertical direction, and described second is conductive
Type semiconductor doping source region is located between groove and the first conductive type semiconductor anode region；The anode channels grid structure
It include: anode channels gate electrode, first anode groove gate dielectric layer and second plate groove gate dielectric layer, the first anode ditch
Slot gate dielectric layer and second plate groove gate dielectric layer are located in the groove wall, and first anode groove gate dielectric layer is led with second
Electric type semiconductor doping source region and the second conductive type semiconductor doping buffer layer are in contact, the anode channels gate electrode
In groove.
2. a kind of bipolar semiconductor power device of lateral MOS control anode according to claim 1, feature exist
In: the bipolar semiconductor power device of the MOS control anode further includes the first conductive type semiconductor impure base region, described
First conductive type semiconductor impure base region is located between groove and the first conductive type semiconductor anode region, and leads with second
The upper surface and side of electric type semiconductor doping source region are in contact.
3. a kind of bipolar semiconductor power device of lateral MOS control anode, including be located at the first conductive type semiconductor and mix
Anode construction, drift region structure, cathode construction and control grid structure above miscellaneous substrate；Wherein: drift region structure is located at first
Conductive type semiconductor doped substrate upper surface, the drift region structure include the second conductive type semiconductor doped drift region；
Anode construction is located at the side of the second conductive type semiconductor doped drift region top layer, and the anode construction includes the second conductive-type
Type semiconductor doping buffer layer is partly led positioned at the first conduction type that second conductive type semiconductor adulterates buffer layer top layer
Body anode region and the anode metal drawn by the first conductive type semiconductor anode region；The cathode construction is located at the second conductive-type
The other side of type semiconductor doping drift region top layer；Control gate structure is located at the top layer of device, and the control grid structure includes
Control grid electrode and control gate dielectric layer, the control gate dielectric layer are located at cathode construction and the doping of the second conductive type semiconductor
The upper surface of drift region, the control grid electrode are located at the control gate dielectric layer upper surface above cathode construction；It is characterized by:
The bipolar semiconductor power device of the MOS control anode further includes first that Schottky contacts are formed with anode metal
Conductive type semiconductor impure base region and anode channels grid structure；Have inside anode construction and is extended into along device vertical direction
The groove of second conductive type semiconductor doped drift region layer, the first conductive type semiconductor impure base region are located at groove and first
Between conductive type semiconductor anode region；The doping concentration of the first conductive type semiconductor impure base region is less than the first conduction
Type semiconductor anode region；The anode channels grid structure include: anode channels gate electrode, first anode groove gate dielectric layer and
Second plate groove gate dielectric layer, the first anode groove gate dielectric layer and second plate groove gate dielectric layer are located in the groove
Wall, and first anode groove gate dielectric layer is mixed with the first conductive type semiconductor impure base region and the second conductive type semiconductor
Miscellaneous buffer layer is in contact, and the anode channels gate electrode is located in groove.
4. according to claim 1 to a kind of bipolar semiconductor power device of the control anode of lateral MOS described in 3, feature
Be: the cathode construction is the first conductive type semiconductor body area (106), and the first conductive type semiconductor adulterates emitter region
(105), the second conductive type semiconductor doping emitter region (104) and cathodic metal (101)；The doping of first conductive type semiconductor
Emitter region (105) and the second conductive type semiconductor doping emitter region (104) are partly led independently of each other and positioned at the first conduction type
The top layer in the area Ti Ti (106), wherein the second conductive type semiconductor doping emitter region (104) is close to anode construction side；First
Conductive type semiconductor adulterate emitter region (105) and the second conductive type semiconductor doping both emitter region (104) upper surface and
Cathodic metal (101) is in contact, and forms IGBT device.
5. according to claim 1 to a kind of bipolar semiconductor power device of the control anode of lateral MOS described in 3, feature
Be: the cathode construction is the first conductive type semiconductor body area (206), the second conductive type semiconductor impure base region
(217), the first conductive type semiconductor doping emitter region (205), the second conductive type semiconductor doping emitter region (204) and yin
Pole metal (201)；Second conductive type semiconductor doping emitter region (204) and the second conductive type semiconductor impure base region
(217) the top layer both ends in the first conductive type semiconductor body area (206) and the first conductive type semiconductor doping hair are located at
Penetrate the second conductive type semiconductor doping emitter region (204) and the doping of the second conductive type semiconductor that area (205) is located at both ends
Between base area (217), the first conductive type semiconductor adulterates emitter region (205) and the second conductive type semiconductor of part doping hair
The upper surface for penetrating area (204) is in contact with cathodic metal (201), forms MCT device.
6. a kind of bipolar semiconductor power device of lateral MOS control anode according to claim 4 or 5, feature
Be: the thickness of the control gate dielectric layer is greater than the thickness of anode channels gate dielectric layer, second plate groove gate dielectric layer
Thickness is greater than or equal to the thickness of first anode groove gate dielectric layer.
7. a kind of bipolar semiconductor power device of lateral MOS control anode according to claim 4 or 5, feature
Be: the bipolar semiconductor power device of the MOS control anode is using semiconductor material Si, SiC, GaAs or GaN material
Material production.
8. a kind of bipolar semiconductor power device of lateral MOS control anode according to claim 4 or 5, feature
Be: first conductive type semiconductor is P-type semiconductor, and second conductive type semiconductor is N-type semiconductor；Or
First conductive type semiconductor is N-type semiconductor, and second conductive type semiconductor is P-type semiconductor.
9. a kind of preparation method of the bipolar semiconductor power device of lateral MOS control anode, which is characterized in that including following
Step:
Step 1: preparing the first conductive type semiconductor doped substrate, outside the first conductive type semiconductor doped substrate upper layer
Prolong two conductive type semiconductor doped drift region of growth regulation, passes through pre-oxidation, photoetching, etching, ion implanting and high annealing work
Skill, in the terminal structure of the positive making devices of semiconductor chip；
Step 2: making cathode construction on the top layer of semiconductor chip side, pass through ion implanting in semiconductor chip top layer
Technique and annealing process form the first conductive type semiconductor body area, the second conductive type semiconductor impure base region, the first conduction
Type semiconductor adulterates emitter region and the second conductive type semiconductor doping emitter region or the first conductive type semiconductor body
Area, the second conductive type semiconductor impure base region, the first conductive type semiconductor doping emitter region and the second conduction type are partly led
Body adulterates emitter region；
Step 3: passing through the second conductive type impurity of ion implanting and annealing process on the top layer of the semiconductor chip other side
The second conductive type semiconductor for forming device adulterates buffer layer；
Step 4: passing through the first conductive type impurity of ion implanting in the top layer of the second conductive type semiconductor doping buffer layer
And the first conductive type semiconductor of annealing process making devices adulterates anode region；
Step 5: carrying out etching groove after the first conductive type semiconductor doping anode region photomask surface goes out window, etching institute
The depth for obtaining groove is greater than the junction depth of the first conductive type semiconductor doping anode region；
Step 6: forming dielectric layer in trenched side-wall, then accumulation fills polysilicon in the trench；
Step 7: etching the dielectric layer and polysilicon formed in groove in the 9th step by photoetching process, anode channels grid are made
Electrode and anode channels gate dielectric layer；
Step 8: adulterated between anode region and anode channels grid structure in the first conductive type semiconductor, by ion implanting and
Annealing process makes the first conductive type semiconductor impure base region；
Step 9: by deposit, etching technics the first conductive type semiconductor body area, the second conductive type semiconductor base area,
First conductive type semiconductor adulterates emitter region and the upper surface of the second conductive type semiconductor doped drift region makes control gate
Dielectric layer；
Step 10: adulterating the upper table of emitter region and the second conductive type semiconductor doping emitter region in the first conductive type semiconductor
Wheat flour makees cathodic metal；It is led in the second conductive type semiconductor doping emitter region, the first conductive type semiconductor body area and second
Control gate dielectric layer upper surface above electric type semiconductor doped drift region makes control grid electrode；In the first conduction type half
Conductor anode region and the upper surface of the first conductive type semiconductor impure base region make anode metal.
10. a kind of preparation side of the bipolar semiconductor power device of lateral MOS control anode according to claim 9
Method, it is characterised in that: the making step for saving the first conductive type semiconductor impure base region is replaced with passing through ion implanting
Second conductive type impurity is formed in the first conductive type semiconductor doping anode region top layer and is in contact with anode channels grid structure
The second conductive type semiconductor doping source region；Or after the first conductive type semiconductor impure base region is made in the 8th step
It continues through the second conductive type impurity of ion implanting and forms the second conductive type semiconductor doping source region.
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| CN113823679A (en) * | 2021-11-23 | 2021-12-21 | 成都蓉矽半导体有限公司 | Grid controlled diode rectifier |
| WO2022206299A1 (en) * | 2021-03-30 | 2022-10-06 | 无锡华润华晶微电子有限公司 | Semiconductor structure and preparation method therefor |
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