CN113823679A - Grid controlled diode rectifier - Google Patents
Grid controlled diode rectifier Download PDFInfo
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- CN113823679A CN113823679A CN202111389575.3A CN202111389575A CN113823679A CN 113823679 A CN113823679 A CN 113823679A CN 202111389575 A CN202111389575 A CN 202111389575A CN 113823679 A CN113823679 A CN 113823679A
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- 239000000758 substrate Substances 0.000 claims abstract description 27
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 21
- 238000001465 metallisation Methods 0.000 claims abstract description 15
- 239000002184 metal Substances 0.000 claims abstract description 6
- 238000005468 ion implantation Methods 0.000 claims description 12
- 238000002347 injection Methods 0.000 claims description 6
- 239000007924 injection Substances 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 4
- 239000012535 impurity Substances 0.000 claims description 4
- 238000011084 recovery Methods 0.000 abstract description 11
- 238000010586 diagram Methods 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000005036 potential barrier Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7391—Gated diode structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
Abstract
The invention provides a grid-controlled diode rectifier, which comprises a metalized cathode, a heavily-doped first conduction type substrate layer, a first conduction type drift layer, a P-type base region, an N + source region and a grid structure, wherein the first conduction type drift layer is arranged on the metalized cathode; the gate structure is a planar gate structure and comprises a gate oxide layer, a polycrystalline silicon layer and a metallization anode, wherein the gate oxide layer covers the first conduction type drift layer, the gate oxide layer transversely covers the channel region of the MCR device and the upper surface of part of the N + source region, the polycrystalline silicon layer covers the gate oxide layer, and the metallization anode covers the polycrystalline silicon layer and the first conduction type drift layer; the invention increases the conduction voltage drop of the PN junction through the special contact of the anode metal and the P-type base region, so that the device works in a single-pole mode when in conduction, the reverse recovery time and the charge of the device are reduced, and the switching loss of a system is reduced.
Description
Technical Field
The present invention relates to a power semiconductor device, and more particularly, to a gate controlled diode rectifier (MCR).
Background
Compared with a PIN diode, a grid Controlled diode Rectifier (MOS Controlled Rectifier, MCR) has smaller conduction voltage drop and reverse recovery time, has smaller leakage current compared with a Schottky diode, has smaller conduction voltage drop compared with a fast recovery diode, and is a diode with strong comprehensive performance in a power electronic system. The grid electrode and the source electrode of the VDMOS device are in short circuit to serve as the anode of the diode, the cathode of the device is applied with positive voltage relative to the anode, the device enters a voltage-resistant state, and leakage current of the device can be reduced due to the existence of the P-type base region. When a certain forward voltage is applied to the anode of the MCR relative to the cathode, the inversion of the P-type base region under the polycrystalline silicon is an N channel, the device is conducted, and the device works in a unipolar mode at the moment; when the voltage applied to the anode relative to the cathode exceeds the conduction voltage drop of the PN junction diode, the PN junction diode is conducted, the device works in a bipolar mode, and the reverse recovery time and the reverse recovery charge of the diode are higher compared with those of a unipolar mode. In order to enable the device to work in a unipolar mode and reduce the reverse recovery time of the diode, the grid-controlled diode with low reverse recovery time is designed, and the device works in the unipolar mode when being conducted in the forward direction by improving the conduction voltage drop of a PN junction, so that the switching loss of the device is smaller.
Disclosure of Invention
The invention discloses a grid-controlled diode device with low reverse recovery time, which increases the conduction voltage drop of a PN junction diode by forming a high potential barrier region between anode metal and a P-type base region, so that the device is conducted only through an MOS channel when conducting in the forward direction, and reduces the reverse recovery time of the device as shown in figure 1, so that the device has better compromise between the forward conduction voltage drop and the reverse recovery time.
The first technical scheme of the grid-controlled diode rectifier provided by the invention is as follows:
a grid-controlled diode rectifier comprises a metalized cathode 1, a heavily-doped first conduction type substrate layer 2, a first conduction type drift layer 3, a P-type base region 4, an N + source region 5 and a grid structure;
the heavily doped first conductive type substrate layer 2 covers the metallized cathode 1;
the first conductive type drift layer 3 covers the heavily doped first conductive type substrate layer 2;
the P-type base regions 4 are formed on partial surfaces of the first conduction type drift layers 3 through ion implantation, and the first conduction type drift layers 3 between the P-type base regions 4 are JFET regions;
the N + source region 5 is formed above the inner part of the P-type base region 4 through ion implantation; the distance between the boundary of the N + source region 5 close to one side of the JFET and the boundary of the P-type base region 4 close to one side of the JFET is a channel region of the MCR device;
the gate structure is a planar gate structure and comprises a gate oxide layer 6, a polysilicon layer 7 and a metallization anode 8, wherein the gate oxide layer 6 covers the first conduction type drift layer 3, the gate oxide layer laterally covers the channel region of the MCR device and the upper surface of part of the N + source region 5, the polysilicon layer 7 covers the gate oxide layer 6, and the metallization anode 8 covers the polysilicon layer 7 and the first conduction type drift layer 3;
the metallized anode 8 contacts the P-type base region 4 to form a schottky contact region 9.
Preferably, the metallization anode 8 is a trench-type source electrode, the trench-type source electrode is formed by etching a part of the N + source region 5 and a part of the P-type base region 4 in the first conductivity type drift layer 3, and the trench-type source electrode is filled with anode metal.
Preferably, the schottky contact region 9 is implemented by adjusting the doping concentration of the P-type base region.
Preferably, the schottky contact region 9 is formed by counter-doping an N-type impurity on the surface of the P-type base region.
Preferably, the heavily doped first conductivity type substrate layer 2 has a doping concentration greater than 1e18cm-3。
The invention provides a second grid-controlled diode rectifier, which comprises a metalized cathode 1, a heavily doped first conduction type substrate layer 2, a first conduction type drift layer 3, a P-type base region 4, an N + source region 5 and a grid structure, wherein the heavily doped first conduction type substrate layer is arranged on the first conduction type drift layer;
the heavily doped first conductive type substrate layer 2 covers the metallized cathode 1;
the first conductive type drift layer 3 covers the heavily doped first conductive type substrate layer 2;
the P-type base region 4 is formed on a part of the surface of the first conductive type drift layer 3 through ion implantation, and the N + source region 5 is formed above the inside of the P-type base region 4 through ion implantation;
the grid structure is a trench grid structure, and the distance from the junction depth of the N + source region 5 along the injection direction to the junction depth of the P-type base region 4 in the same direction is the channel region of the MCR device; the grid structure comprises a grid oxide layer 6, a polycrystalline silicon layer 7 and a metallization anode 8, wherein the grid oxide layer 6 and the polycrystalline silicon layer 7 are sequentially formed in a region body above the first conduction type drift layer 3 and cover a channel region of the MCR device in the ion injection direction;
the metallized anode 8 covers the P-type base region 4, the grid structure and the N + source region 5, and the metallized anode 8 is in contact with the P-type base region 4 to form a Schottky contact region 9;
the invention has the technical effects that: through the special contact of the anode metal and the P-type base region, the conduction voltage drop of the PN junction is increased, so that the device works in a single-pole mode when being conducted, the reverse recovery time and the charge of the device are reduced, and the switching loss of a system is reduced.
Drawings
FIG. 1 is a schematic diagram of a current path when a conventional gated diode rectifier is turned on; a. unipolar conduction schematic, b.
FIG. 2 is a schematic diagram of a planar gated diode rectifier according to embodiment 1 of the present invention;
FIG. 3 is a schematic diagram of a planar gated diode rectifier with source trenches according to embodiment 2 of the present invention;
FIG. 4 is a schematic diagram of a trench gated diode rectifier with source trenches according to embodiment 3 of the present invention;
the structure comprises a substrate, a metalized cathode, a heavily doped first conduction type substrate layer, a first conduction type drift layer, a P-type base region, an N + source region, a gate oxide layer, a polycrystalline silicon layer, a metalized anode and a Schottky contact region, wherein the substrate is 1, the heavily doped first conduction type substrate layer is 2, the first conduction type drift layer is 3, the P-type base region is 4, the N + source region is 5, the gate oxide layer is 6, the polycrystalline silicon layer is 7, the metalized anode is 8, and the Schottky contact region is 9.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Example 1:
as shown in fig. 2, a planar gated diode rectifier includes a metalized cathode 1, a heavily doped first conductive type substrate layer 2, a first conductive type drift layer 3, a P-type base region 4, an N + source region 5 and a gate structure;
the heavily doped first conductive type substrate layer 2 covers the metallized cathode 1; heavily doped first conductivity type substrate layer 2 having a doping concentration greater than 1e18cm-3。
The first conductive type drift layer 3 covers the heavily doped first conductive type substrate layer 2;
the P-type base regions 4 are formed on partial surfaces of the first conduction type drift layers 3 through ion implantation, and the first conduction type drift layers 3 between the P-type base regions 4 are JFET regions;
the N + source region 5 is formed above the inner part of the P-type base region 4 through ion implantation; the distance between the boundary of the N + source region 5 close to one side of the JFET and the boundary of the P-type base region 4 close to one side of the JFET is a channel region of the MCR device;
the gate structure is a planar gate structure and comprises a gate oxide layer 6, a polycrystalline silicon layer 7 and a metallization anode 8, wherein the gate oxide layer 6 covers the first conduction type drift layer 3, the gate oxide layer transversely covers the channel region of the MCR device and the upper surface of part of the N + source region 5, the polycrystalline silicon layer 7 covers the gate oxide layer 6, and the metallization anode 8 covers the polycrystalline silicon layer 7 and the first conduction type drift layer 3;
the metallized anode 8 contacts with the P-type base region 4 to form a schottky contact region 9, in this case, the schottky contact region 9 can be realized by adjusting the doping concentration of the P-type base region or counter doping an N-type impurity on the surface of the P-type base region
Example 2:
as shown in fig. 3, a planar gated diode rectifier with source trenches. The difference from embodiment 1 is that the metallized anode 8 is a trench type source electrode, the trench type source electrode is formed by etching a part of the N + source region 5 and a part of the P-type base region 4 in the first conductivity type drift layer 3, and the anode metal is filled in the trench type source electrode. In this case, the schottky contact region 9 may be implemented by adjusting the doping concentration of the P-type base region or by counter-doping an N-type impurity on the surface of the P-type base region.
Example 3:
as shown in fig. 4, a trench-type gated diode rectifier having a source trench includes:
the transistor comprises a metallized cathode 1, a heavily doped first conduction type substrate layer 2, a first conduction type drift layer 3, a P type base region 4, an N + source region 5 and a grid structure;
the heavily doped first conductive type substrate layer 2 covers the metallized cathode 1;
the first conductive type drift layer 3 covers the heavily doped first conductive type substrate layer 2;
the P-type base region 4 is formed on a part of the surface of the first conductive type drift layer 3 through ion implantation, and the N + source region 5 is formed above the inside of the P-type base region 4 through ion implantation;
the grid structure is a trench grid structure, and the distance from the junction depth of the N + source region 5 along the injection direction to the junction depth of the P-type base region 4 in the same direction is the channel region of the MCR device; the grid structure comprises a grid oxide layer 6, a polycrystalline silicon layer 7 and a metallization anode 8, wherein the grid oxide layer 6 and the polycrystalline silicon layer 7 are sequentially formed in a region body above the first conduction type drift layer 3 and cover a channel region of the MCR device in the ion injection direction;
the metallized anode 8 covers the P-type base region 4, the grid structure and the N + source region 5, and the metallized anode 8 is in contact with the P-type base region 4 to form a Schottky contact region 9;
the metallization anode 8 is a groove-shaped source electrode, the groove-shaped source electrode is formed by etching a part of the N + source region 5 and a part of the P-type base region 4 in the first conduction type drift layer 3, the metallization anode 8 is filled in the groove-shaped source electrode, and the metallization anode 8 is in contact with the P-type base region 4 to form a Schottky contact region 9.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (6)
1. A gated diode rectifier, characterized by: the transistor comprises a metallized cathode (1), a heavily doped first conduction type substrate layer (2), a first conduction type drift layer (3), a P-type base region (4), an N + source region (5) and a grid structure;
the heavily doped first conduction type substrate layer (2) covers the metalized cathode (1);
the first conductive type drift layer (3) covers the heavily doped first conductive type substrate layer (2);
the P-type base regions (4) are formed on partial surfaces of the first conduction type drift layers (3) through ion implantation, and the first conduction type drift layers (3) between the P-type base regions (4) are JFET regions;
the N + source region (5) is formed above the inner part of the P-type base region (4) through ion implantation; the distance between the boundary of the N + source region (5) close to one side of the JFET and the boundary of the P-type base region (4) close to one side of the JFET is a channel region of the MCR device;
the gate structure is a planar gate structure and comprises a gate oxide layer (6), a polycrystalline silicon layer (7) and a metallization anode (8), wherein the gate oxide layer (6) covers the first conduction type drift layer (3), the gate oxide layer transversely covers a channel region of the MCR device and the upper surface of part of the N + source region (5), the polycrystalline silicon layer (7) covers the gate oxide layer (6), and the metallization anode (8) covers the polycrystalline silicon layer (7) and the first conduction type drift layer (3);
the metallized anode (8) is contacted with the P-type base region (4) to form a Schottky contact region (9).
2. The gated diode rectifier of claim 1, wherein: the metalized anode (8) is a groove-shaped source electrode, the groove-shaped source electrode is formed by etching a part of the N + source region (5) and a part of the P-type base region (4) in the first conduction type drift layer (3), and anode metal is filled in the groove-shaped source electrode.
3. The gated diode rectifier of claim 1, wherein: the Schottky contact region (9) is realized by adjusting the doping concentration of the P-type base region.
4. The gated diode rectifier of claim 1, wherein: the Schottky contact region (9) is realized by reversely doping N-type impurities on the surface of the P-type base region.
5. The gated diode rectifier of claim 1, wherein: heavily doped first conductivity type substrate layer (2) having a doping concentration greater than 1e18cm-3。
6. A gated diode rectifier, characterized by:
the transistor comprises a metallized cathode (1), a heavily doped first conduction type substrate layer (2), a first conduction type drift layer (3), a P-type base region (4), an N + source region (5) and a grid structure;
the heavily doped first conduction type substrate layer (2) covers the metalized cathode (1);
the first conductive type drift layer (3) covers the heavily doped first conductive type substrate layer (2);
the P-type base region (4) is formed on a part of the surface of the first conduction type drift layer (3) through ion implantation, and the N + source region (5) is formed above the inner part of the P-type base region (4) through ion implantation;
the grid structure is a trench grid structure, and the distance from the junction depth of the N + source region (5) along the injection direction to the junction depth of the P-type base region (4) in the same direction is the channel region of the MCR device; the grid structure comprises a grid oxide layer (6), a polycrystalline silicon layer (7) and a metallization anode (8), wherein the grid oxide layer (6) and the polycrystalline silicon layer (7) are sequentially formed in a region body above the first conduction type drift layer (3) and cover a channel region of the MCR device in the ion injection direction;
the metalized anode (8) covers the P-type base region (4), the grid structure and the N + source region (5), and the metalized anode (8) is in contact with the P-type base region (4) to form a Schottky contact region (9).
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| CN202111389575.3A CN113823679A (en) | 2021-11-23 | 2021-11-23 | Grid controlled diode rectifier |
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| CN202111389575.3A CN113823679A (en) | 2021-11-23 | 2021-11-23 | Grid controlled diode rectifier |
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| CN116759424A (en) * | 2023-08-21 | 2023-09-15 | 深圳平创半导体有限公司 | Self-aligned trench type silicon carbide hybrid diode structure and preparation method thereof |
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