CN104795438A - SA-LIGBT (shorted-anode lateral insulated gate bipolar transistor) capable of restraining snapback effect - Google Patents
SA-LIGBT (shorted-anode lateral insulated gate bipolar transistor) capable of restraining snapback effect Download PDFInfo
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- 230000000452 restraining effect Effects 0.000 title abstract 3
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 30
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- 238000005516 engineering process Methods 0.000 abstract description 3
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- 238000005530 etching Methods 0.000 description 7
- 238000010276 construction Methods 0.000 description 5
- 238000001259 photo etching Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000001459 lithography Methods 0.000 description 3
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- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
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- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
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- 238000000137 annealing Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
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- 238000000151 deposition Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
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- 238000004080 punching Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 238000004857 zone melting Methods 0.000 description 1
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41708—Emitter or collector electrodes for bipolar transistors
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
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Abstract
The invention relates to the power semiconductor technology, in particular to an SA-LIGBT (shorted-anode lateral insulated gate bipolar transistor) capable of restraining a snapback effect. An implementing method for the SA-LIGBT mainly includes that a metal resistor with a certain resistance value is generated between electrode contacts of a P-type collecting region and an N-type collecting region, and the resistance value of the metal resistor can be controlled by adjusting the area and the length of the metal resistor. When a device is turned on forwardly, current IF flows through the metal resistor R and generates a voltage drop IFR on the metal resistor to generate voltage difference between the P-type collecting region and an N-type buffering layer, if the IFR is larger than a forward turn-on voltage drop of a PN junction, the PN junction is turned on forwardly and enters an IGBT (insulated gate bipolar transistor) working mode, and thus, the snapback effect is restrained effectively. The SA-LIGBT has the advantages that capability of effectively restraining a snapback phenomenon without increasing technical complexity excessively, and other performance parameters of the SA-LIGBT cannot be affected.
Description
Technical field
The present invention relates to power semiconductor technologies, particularly a kind of SA-LIGBT (Shorted-AnodeLateral Insulated Gate Bipolar Transistor, short circuit anode insulation grid bipolar transistor) that can suppress dynatron effect.
Background technology
Landscape insulation bar double-pole-type transistor (LIGBT) is the novel features in power integrated circuit.Its existing LDMOSFET is easy to drive, and controls simple advantage, has again the pressure drop of power transistor turns low, and on state current is large, and the advantage that loss is little, becomes one of core component of modern power semiconductor integrated circuit.Document (Shigeki T., Akio N., Youichi A., SatoshiS.and Norihito T.Carrier-Storage Effect and Extraction-Enhanced Lateral IGBT (E
2lIGBT): ASuper-High Speed and Low On-state Voltage LIGBT Superior to LDMOSFET.Proceedings of 2012International Symposium on Power Semiconductor Devices & ICs, 2012, pp.393-396) point out, under same current ability, area needed for LIGBT is only 1/8th of traditional LDMOS, this characteristic significantly reduces the area of power chip, improve chip yield, reduce production cost.Thus, the every field of the national economy such as such as communication, the energy, traffic, industry, medical science, household electrical appliance and Aero-Space is widely used at present based on LIGBT power semiconductor integrated circuit.
But LIGBT is an one way conducting device, in integrated circuit (IC) system, LIGBT device needs to coordinate fly-wheel diode (Free Wheeling Diode) to use with the safety and stability guaranteeing system usually.Therefore in conventional power integrated circuit, usually can by FWD and LIGBT reverse parallel connection, but this FWD not only occupies chip area, adds cost, extra required metal line increases the ghost effect of chip internal line.In order to head it off, a kind ofly the LIGBT of reverse-conducting can be called that SA-LIGBT (Shorted-Anode Lateral Insulated Gate Bipolar Transistor) has been suggested, this traditional SA-LIGBT (as shown in Figure 1) achieves the integrated of LIGBT and diode by the method introducing N collector region in collector region.But this traditional SA-LIGBT there will be a dynatron effect (snapback) when forward conduction, this effect can stop the complete conducting of SA-LIGBT, brings adverse effect to the reliability and stability of device.In order to suppress dynatron effect, the people such as Byeong-Hoon Lee propose GHI-LIGBT (Gradual Hole Injection Dule-gate LIGBT), as shown in Figure 2, the SA-LIGBT that GHI-LIGBT is relatively traditional, introduce second grid on N collector region side, and form P by ion implantation between oxygen on the scene and second grid
+layer, when device forward conduction, first grid adds positive bias, second grid adds back bias voltage, N+ emitter and P+ collector electrode distinguish electron emission and hole simultaneously, and P+ layer can assist the emission effciency strengthening hole, makes GHI-LIGBT work in bipolarity conduction mode, thus suppress dynatron effect, but this structure belongs to four-terminal device, inconvenient in actual applications.While realizing suppressing dynatron effect, ensure that device is still three terminal device, the people such as JuhyunOh propose the SA-LIGBT with groove collector region, as shown in Figure 3, relatively traditional SA-LIGBT, this structure increases the resistance of the N-type resilient coating below the P type collector region that electronic current flows through by the groove structure of collector region, make P collector region/easier conducting of N-type resilient coating knot, thus inhibit dynatron effect, but this structure needs grooving in technique, filled media layers etc., process complexity is relatively large, brings difficulty to actual production.
Summary of the invention
, there is the problem of dynatron effect in object of the present invention, proposes a kind of SA-LIGBT that can suppress dynatron effect exactly for above-mentioned traditional SA-LIGBT.
Technical scheme of the present invention: a kind of SA-LIGBT that can suppress dynatron effect, its structure comprises P type substrate 7 and is arranged on the N well region 6 on P type substrate 7 upper strata, and the side on described N well region 6 upper strata is provided with P type tagma 5, and its opposite side is provided with N-type resilient coating 8; The upper strata in described P type tagma 5 is provided with separate N+ source region 1 and P+ contact zone 13; Described N-type resilient coating 8 upper strata is provided with separate P collector region 9 and N collector region 10; Described N+ source region 1 is adjacent with P collector region 9; The upper surface of described N+ source region 1 and P+ contact zone 13 is provided with cathode electrode 4, the upper surface of the N+ source region 1 of described cathode electrode 4 both sides, P+ contact zone 13, P type tagma 5, N well region 6, P type substrate 7, resilient coating 8 and P collector region 9 is provided with silicon dioxide layer 3, in described silicon dioxide layer 3, N+ source region 1 place is provided with polygate electrodes 2; The upper surface of described P collector region 9 is provided with the first metal layer 11, and as anode electrode, described the first metal layer 11 is connected with silicon dioxide layer 3 and partly covers the upper surface of silicon dioxide layer 3; Described N collector region 10 upper surface is provided with the second metal level 15; Between described the first metal layer 11 and the second metal level 15, there is metallic resistance 16 and the first insulating barrier 17; Described first insulating barrier 17 is positioned at the upper surface of P collector region 9 and N collector region 10, and its upper surface is connected with the lower surface of metallic resistance 16; The upper surface of described metallic resistance 16 and the upper surface of the N collector region 10 adjacent with its side, N-type resilient coating 8, N well region 6 and P type substrate 7 are provided with the second insulating barrier 18.
The technical scheme that the present invention is total, on traditional SA-LIGBT basis, by the lithography of antianode metal electrode, between P type collector region and the electrode contact of N-type collector region, produce the metallic resistance of a suitable resistance, and the resistance of metallic resistance can be controlled by the area and length regulating metallic resistance.When device forward conduction (anode adds high pressure), electric current I
fflow through this metallic resistance R and on metallic resistance, produce voltage drop I
fr, makes to produce voltage difference between P type collector region/N-type resilient coating, if I
fr is greater than PN junction forward conduction voltage drop (about 0.7V), and PN junction, by forward conduction, enters IGBT mode of operation, thus effectively suppresses dynatron effect.
Beneficial effect of the present invention is, under exceeding the condition increasing process complexity, has the ability of excellent suppression snapback phenomenon, can not impact other performance parameter of SA-LIGBT meanwhile.
Accompanying drawing explanation
Fig. 1 is traditional SA-LIGBT structural representation;
Fig. 2 is GHI-LIGBT structural representation;
Fig. 3 is the structural representation of the SA-LIGBT with groove collector region;
Fig. 4 is SA-LIGBT device architecture schematic diagram of the present invention;
Fig. 5 is the device profile schematic diagram along AA' in Fig. 4;
Fig. 6 is SA-LIGBT device collector region of the present invention vertical view;
Fig. 7 is the snapback phenomenon contrast schematic diagram of SA-LIGBT of the present invention and traditional SA-LIGBT;
Fig. 8 is that in the SA-LIGBT structure that proposes of the present invention, metallic resistance 16 is on the impact of snapback effect;
Fig. 9 is at N+ and P+ collector electrode implantation annealing in SA-LIGBT device making technics of the present invention, and the device architecture schematic diagram after device surface deposit layer of silicon dioxide layer;
Figure 10 is the contact zone being exposed N+ and P+ collector electrode in SA-LIGBT device making technics of the present invention by photoetching and etching, then depositing metal, by photoetching and etching, and the structural representation form metallic resistance between N+ collector electrode and P+ collector contact after;
Figure 11 is the structural representation after completing device positive contact in SA-LIGBT device making technics of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in detail
A kind of SA-LIGBT new construction eliminating dynatron effect that the present invention proposes is on traditional SA-LIGBT basis, by the lithography of antianode metal, produces the metallic resistance of a suitable resistance between P type collector region and the electrode contact of N-type collector region.When device forward conduction (anode adds high pressure), electric current flows through this metallic resistance and produces voltage drop thereon, make to produce voltage difference between P type collector region/N-type resilient coating knot, thus make PN junction forward conduction, prevent the MOS of device inside part to occur negative resistance phenomenon prior to the conducting of IGBT part.It should be noted that: profit in this way, can well suppress snapback phenomenon under the condition that need not increase cell density; In addition, compare the above-mentioned technique such as grooving, filling utilized required for groove collector region SA-LIGBT suppression snapback phenomenon, the method only need increase by a step etching anode metal technique on the basis of traditional SA-LIGBT, metallic resistance is between P type collector region, SA-LIGBT back and N collector region, centre position overleaf can form the Metal Contact district of larger area, as shown in Figure 5, Figure 6, with the metallic resistance of the jointed anode electrode and N-type collector region that produce a suitable resistance, reduce process complexity.
As shown in Figure 4, SA-LIGBT of the present invention, its structure comprises P type substrate 7 and is arranged on the N well region 6 on P type substrate 7 upper strata, and the side on described N well region 6 upper strata is provided with P type tagma 5, and its opposite side is provided with N-type resilient coating 8; The upper strata in described P type tagma 5 is provided with separate N+ source region 1 and P+ contact zone 13; Described N-type resilient coating 8 upper strata is provided with separate P collector region 9 and N collector region 10; Described N+ source region 1 is adjacent with P collector region 9; The upper surface of described N+ source region 1 and P+ contact zone 13 is provided with cathode electrode 4, the upper surface of the N+ source region 1 of described cathode electrode 4 both sides, P+ contact zone 13, P type tagma 5, N well region 6, P type substrate 7, resilient coating 8 and P collector region 9 is provided with silicon dioxide layer 3, in described silicon dioxide layer 3, N+ source region 1 place is provided with polygate electrodes 2; The upper surface of described P collector region 9 is provided with the first metal layer 11, and as anode electrode, described the first metal layer 11 is connected with silicon dioxide layer 3 and partly covers the upper surface of silicon dioxide layer 3; Described N collector region 10 upper surface is provided with the second metal level 15; Between described ground floor 11 and the second metal level 15, there is metallic resistance 16 and the first insulating barrier 17; Described first insulating barrier 17 is positioned at the upper surface of P collector region 9 and N collector region 10, and its upper surface is connected with the lower surface of metallic resistance 16; The upper surface of described metallic resistance 16 and the upper surface of the N collector region 10 be adjacent, N-type resilient coating 8, N well region 6 and P type substrate 7 are provided with the second insulating barrier 18.
Operation principle of the present invention is:
The reason that conventional SA-LIGBT produces snapback phenomenon is: owing to introducing N+ collector electrode shorting region in anode side, additionally introduce a monopolar current path, when the grid of LIGBT adds the positive bias being greater than threshold value, when collector voltage is very little, electronic current can via N+ collector electrode shorting region, emitter electrode is arrived by conducting channel again by N well region, because N well region doping content is very low and length is longer in this current path, conducting resistance is larger, thus On current is very little, and the at this moment work of SA-LIGBT can be described as MOSFET work mode.Along with collector voltage increases, during the PN junction positively biased that P+ collector electrode and N resilient coating are formed, P+ collector region starts to N well region injected hole, device proceeds to IGBT mode of operation from MOSFET pattern, owing to there being conductivity modulation effect under this pattern, conducting resistance declines rapidly, has thus occurred negative resistance phenomenon.
The SA-LIGBT new construction that the present invention proposes, its principle eliminating snapback suppresses the MOSFET work mode of conventional SA-LIGBT, accelerates the process entering IGBT mode of operation.On traditional SA-LIGBT basis, by the lithography of antianode metal electrode, between P type collector region and the electrode contact of N-type collector region, produce the metallic resistance 16 of a suitable resistance, and the resistance of metallic resistance 16 can be controlled by the area and length regulating metallic resistance.When device forward conduction (anode adds high pressure), electric current I
fflow through this metallic resistance R and on metallic resistance, produce voltage drop I
fr, makes to produce voltage difference between P type collector region/N-type resilient coating, if I
fr is greater than PN junction forward conduction voltage drop (about 0.7V), and PN junction, by forward conduction, enters IGBT mode of operation.As can be seen here, the resistance of metallic resistance is larger, better to the inhibition of snapback phenomenon; But metallic resistance is excessive, device power consumption when reverse conducting (diode mode) can be caused to increase, therefore the resistance of metallic resistance need through appropriate design.
Utilize the new approaches that the present invention proposes, dynatron effect can well be suppressed under the condition that need not increase cell density, in addition, compare the technique such as grooving, filling required for above-mentioned groove collector region SA-LIGBT suppression snapback phenomenon, the method only need etch anode metal on the basis of traditional SA-LIGBT, with the metallic resistance of the jointed anode and N-type collector region electrode contact that produce a suitable resistance, greatly reduce process complexity.
In order to verify beneficial effect of the present invention, MEDICI software is utilized to carry out emulating comparing to the SA-LIGBT new construction that the present invention shown in SA-LIGBT and Fig. 4 of the traditional structure shown in Fig. 1 proposes, emulation major parameter is: device length is 57 μm, and N well region is doped to 5 × 10
14cm
-3, N-type undoped buffer layer is 2 × 10
16cm
-3, Lp:Ln (P collector region length: N collector region length)=2:1, carrier lifetime is 10us, and ambient temperature is 300K.The SA-LIGBT new construction that traditional structure and the present invention propose all has above simulation parameter, and in addition, this SA-LIGBT new construction, its metallic resistance is 50 Ω.Simulation result as shown in Figure 7, as can be seen from the figure the SA-LIGBT of traditional structure is due to device length less (only having 57 μm), clearly, this can stop the complete conducting of SA-LIGBT to snapback phenomenon, also has adverse effect to the reliability of SA-LIGBT.And the SA-LIGBT (metallic resistance is 50 Ω) to the band metallic resistance that the present invention proposes, snapback phenomenon completely eliminates substantially.Can be found by this contrast, a kind of SA-LIGBT utilizing metallic resistance to eliminate snapback phenomenon that the present invention proposes has very superior performance.Meanwhile, just can be formed because this metallic resistance only need etch the anode metal of SA-LIGBT, not change other structure of device, so, can not impact parameters such as the withstand voltage of SA-LIGBT and threshold voltages.
In order to verify the impact of resistance setting on snapback phenomenon of metallic resistance, simulate the opening process of device under different resistance.As shown in Figure 8, when metallic resistance increases gradually, electronic current flows through the pressure drop of metallic resistance generation also along with increase, P type collector region/easier conducting of N-type resilient coating knot, SA-LIGBT easilier will enter bipolarity conduction mode from unipolarity electron conduction, thus suppress snapback phenomenon.When resistance increases to 50 Ω, snapback phenomenon is eliminated substantially, considers power consumption when not increasing SA-LIGBT reverse operation simultaneously, selects metallic resistance 50 Ω as best resistance.
The concrete methods of realizing of SA-LIGBT of the present invention is: choose P type <100> crystal orientation zone melting single-crystal liner, N trap injects and knot, field oxidation, be etched with source region, long grid oxygen, deposit Poly, the injection of P-body, N-type resilient coating injects, N+ active area is injected, P+ ohmic contact regions is injected, P type collector region and N-type collector region are injected, deposit layer of silicon dioxide layer, as shown in Figure 9, the contact zone of N+ and P+ collector electrode is exposed by photoetching and etching, in collector region deposit layer of metal, realize the good contact of metal and N+ and P+ collector electrode, as shown in Figure 10.By photoetching and etching, between N+ collector electrode and P+ collector contact, form metallic resistance, at collector region deposit layer of silicon dioxide again layer, expose P+ collector region by photoetching and etching and contact, as the positive contact of device.Deposit BPSG, punching is deposit emitter and collector metal also, emitter and collector metal exposure and etching, as shown in figure 11.
In the process implemented, according to the designing requirement of concrete device, a kind of SA-LIGBT eliminating snapback phenomenon that the present invention proposes, its MOS district and N well region are variable, may be used for planar gate structure and slot grid structure, also can use super-junction structure.When specifically making, collector region metallic resistance can be saw-tooth like resistance, also can be square waveform resistance.
Claims (2)
1. one kind can be suppressed the SA-LIGBT of dynatron effect, its structure comprises P type substrate (7) and is arranged on the N well region (6) on P type substrate (7) upper strata, the side on described N well region (6) upper strata is provided with P type tagma (5), and its opposite side is provided with N-type resilient coating (8); The upper strata of described P type tagma (5) is provided with separate N+ source region (1) and P+ contact zone (13); The upper strata of described N-type resilient coating (8) is provided with separate P collector region (9) and N collector region (10); Described N+ source region (1) is adjacent with P collector region (9); The upper surface of described N+ source region (1) and P+ contact zone (13) is provided with cathode electrode (4), the upper surface of the N+ source region (1) of described cathode electrode (4) both sides, P+ contact zone (13), P type tagma (5), N well region (6), P type substrate (7), resilient coating (8) and P collector region (9) is provided with silicon dioxide layer (3), in described silicon dioxide layer (3), N+ source region (1) place is provided with polygate electrodes (2); The upper surface of described P collector region (9) is provided with the first metal layer (11) as anode electrode, and described the first metal layer (11) is connected with silicon dioxide layer (3) and partly covers the upper surface of silicon dioxide layer (3); Described N collector region (10) upper surface is provided with the second metal level (15); There is between described the first metal layer (11) and the second metal level (15) metallic resistance (16) and the first insulating barrier (17); Described first insulating barrier (17) is positioned at the upper surface of P collector region (9) and N collector region (10), and its upper surface is connected with the lower surface of the 3rd metal level (16); The upper surface of described metallic resistance (16) and the upper surface of the N collector region (10) adjacent with its side, N-type resilient coating (8), N well region (6) and P type substrate (7) are provided with the second insulating barrier (18).
2. a kind of SA-LIGBT that can suppress dynatron effect according to claim 1, is characterized in that, the resistance of described metallic resistance (16) is 50 Ω.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105185826A (en) * | 2015-08-10 | 2015-12-23 | 电子科技大学 | Transverse RC-IGBT device |
| CN106298900A (en) * | 2016-10-09 | 2017-01-04 | 电子科技大学 | A kind of high speed SOI LIGBT |
| CN109065608A (en) * | 2018-08-20 | 2018-12-21 | 电子科技大学 | A kind of lateral bipolar power semiconductor and preparation method thereof |
| CN112466935A (en) * | 2020-12-15 | 2021-03-09 | 重庆邮电大学 | RC-IGBT device with polycrystalline silicon electronic channel of collector electrode |
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| CN103383958A (en) * | 2013-07-17 | 2013-11-06 | 电子科技大学 | Reverse conducting (RC)-insulated gate bipolar transistor (IGBT) device and manufacturing method thereof |
| CN103413824A (en) * | 2013-07-17 | 2013-11-27 | 电子科技大学 | RC-LIGBT device and manufacturing method thereof |
| CN103887332A (en) * | 2013-10-15 | 2014-06-25 | 杭州恩能科技有限公司 | Novel power semiconductor device |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105185826A (en) * | 2015-08-10 | 2015-12-23 | 电子科技大学 | Transverse RC-IGBT device |
| CN105185826B (en) * | 2015-08-10 | 2019-01-22 | 电子科技大学 | A kind of transverse direction RC-IGBT device |
| CN106298900A (en) * | 2016-10-09 | 2017-01-04 | 电子科技大学 | A kind of high speed SOI LIGBT |
| CN109065608A (en) * | 2018-08-20 | 2018-12-21 | 电子科技大学 | A kind of lateral bipolar power semiconductor and preparation method thereof |
| CN109065608B (en) * | 2018-08-20 | 2020-12-18 | 电子科技大学 | Transverse bipolar power semiconductor device and preparation method thereof |
| CN112466935A (en) * | 2020-12-15 | 2021-03-09 | 重庆邮电大学 | RC-IGBT device with polycrystalline silicon electronic channel of collector electrode |
| CN112466935B (en) * | 2020-12-15 | 2023-03-14 | 重庆邮电大学 | RC-IGBT device with polycrystalline silicon electronic channel of collector electrode |
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| CN104795438B (en) | 2017-07-28 |
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