CN106298900A - A kind of high speed SOI LIGBT - Google Patents
A kind of high speed SOI LIGBT Download PDFInfo
- Publication number
- CN106298900A CN106298900A CN201610876913.9A CN201610876913A CN106298900A CN 106298900 A CN106298900 A CN 106298900A CN 201610876913 A CN201610876913 A CN 201610876913A CN 106298900 A CN106298900 A CN 106298900A
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- China
- Prior art keywords
- collecting zone
- ligbt
- high speed
- polysilicon resistance
- drift region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 24
- 229920005591 polysilicon Polymers 0.000 claims abstract description 24
- 239000004065 semiconductor Substances 0.000 claims abstract description 6
- 230000004888 barrier function Effects 0.000 claims description 6
- 230000005611 electricity Effects 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 13
- 238000005516 engineering process Methods 0.000 abstract description 5
- 238000000034 method Methods 0.000 abstract description 3
- 230000001629 suppression Effects 0.000 abstract description 3
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 4
- 238000002955 isolation Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7394—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0821—Collector regions of bipolar transistors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention belongs to power semiconductor technologies field, be specifically related to a kind of high speed SOI LIGBT.The present invention is relative to traditional LIGBT, and new device introduces a N+ collecting zone near P+ collecting zone, and N+ collecting zone and colelctor electrode is connected by polysilicon resistance district.When off, N+ collecting zone and polysilicon resistance district provide leakage path for the electronics being stored in drift region to new device, and the turn-off speed of new device is accelerated.The present invention depends primarily on the pressure drop in polysilicon resistance district relative to the voltage needed for traditional short-circuit anode LIGBT, P+ collecting zone/N relief area diode current flow.The doping content or the i.e. controllable part of size that reduce polysilicon resistance district enter double pole mode, effectively suppression Snapback effect.Beneficial effects of the present invention is, relative to tradition LIGBT, present invention high speed, the premium properties of low turn-off power loss；Compared to traditional short-circuit anode LIGBT, the present invention uses and is easily integrated polysilicon resistance to suppress Snapback effect, simple for process, and device parameters design simple and flexible.
Description
Technical field
The invention belongs to power semiconductor technologies field, relate to a kind of high speed SOI-LIGBT (Lateral Insulated
Gate Bipolar Transistor, landscape insulation bar double-pole-type transistor).
Background technology
IGBT is as a kind of bipolar semiconductor power device, and existing MOSFET input impedance is high and drives the most excellent
Point, has again the advantage of the high and low conduction voltage drop of BJT electric current density, is that other power device cannot compare in high-voltage great-current field
Intending, these advantages promote IGBT in unique advantages of various fields such as transportation, intelligent grid and household electrical appliance.LIGBT by
In can be the most compatible with COMS technique, and SOI technology to have leakage current little, it is simple to the advantages such as isolation, therefore, SOI
LIGBT is the core component of the integrated chip of monolithic power.Conduction voltage drop low for LIGBT has benefited from the conductance modulation in drift region
Effect.Under device on-state, store a large amount of electron hole pairs in drift region, cause its conduction voltage drop to reduce.But, at device
During shutoff, hole can be flowed out by the body contact area of emitter terminal, and electronics does not has leakage path, electronics to disappear in collector terminal
That loses mainly by with hole is compound, and this makes, and device tail currents is elongated, turn-off speed is slack-off and turn-off power loss becomes big.
In order to solve LIGBT long streaking current problems, it is common practice to increase a N+ current collection near P+ collecting zone
District, such electronics just can be extracted at a high speed by N+ collecting zone, and device turn-off speed is greatly accelerated.This device is claimed
For short circuit anode LIGBT (SA-LIGBT, Shorted Anode LIGBT).SA-LIGBT brings the serious problem to be exactly
Snapback effect.General solution is all by P+ collecting zone and N+ collection on electronic current path under increase MOS pattern
Resistance between electricity district overcomes Snapback effect.Document Juti-Hoon Chum, Dae-Seok Byeon, Jae-Keun
Oh., Min-Koo Han and Ysaln-lk Choi, [A Fast-Switching SOI SA-LIGBT without NDR
Region] SSA-LIGBT that proposes utilizes high resistivity drift region in the middle of P+ collecting zone and N+ collecting zone to produce enough exactly
High pressure drop, makes P+ collecting zone/N relief area diode that conductivity modulation effect the most just to occur, effectively suppresses
Snapback effect, as shown in Figure 1.But, SSA-LIGBT needs to have between P+ collecting zone and N+ collecting zone sufficiently long drift
District could effectively eliminate Snapback effect, and this increases chip area greatly and limits the electric current density of device.In order to solve
This is with problem, document Long Zhang, Jing Zhu, Weifeng Sun, Yicheng Du, Hui Yu, Keqin Huang
And Longxing Shi, [A High Current Density SOI-LIGBT with Segmented Trenches in
The Anode Region for Suppressing Negative Differential Resistance Regime]
Insert a centre between P+ collecting zone and the N+ collecting zone of SSA-LIGBT and stay apertured isolation channel, thus increase electronics road
Resistance on footpath, reduces the distance between P+ collecting zone and N+ collecting zone, as shown in Figure 2.Although this method can eliminate
Snapback effect, but deep trouth making can increase technology difficulty and processing cost.Additionally, deep trouth is in collector terminal, heat carries
It is more serious that stream injects ratio, will affect stability and the reliability of device.
Summary of the invention
The purpose of the present invention, it is simply that for the problems referred to above, proposes a kind of high speed SOI-LIGBT.
The technical scheme is that a kind of high speed SOI-LIGBT, including substrate P 1 from bottom to top, bury oxide layer 2 and
Soi layer；Described soi layer includes emitter structure, grid structure, N drift region 3 and collector structure；Described emitter structure
It is positioned at both sides, N drift region 3 with collector structure；Described emitter structure includes p-well region 4, body contact area, N+ launch site 5 and P+
6, N+ body contact area 6, launch sites 5 and P+ are positioned at p-well region 4 upper surface, and N+ launch site 5 is located close to side, N drift region, and N+ sends out
The common exit penetrating body contact area 6, district 5 and P+ is emitter stage；Described grid structure includes gate oxide 7 and covers at grid
Gate polysilicon 8 in oxide layer 7, gate oxide 7 is positioned on p-well region 4 and is having part to hand over drift region 3, N+ launch site 5 and N
Folded, the exit of gate polysilicon 8 is gate electrode；Described collector structure include N relief area 9, N+ collecting zone 10 and be positioned at N delay
Rush the P+ collecting zone 11 on surface, district 9, and be positioned at the insulating barrier 12 on soi layer and polysilicon resistance district 13, N+ collecting zone 10
Being located remotely from structure side, N drift region 3, polysilicon resistance district 13 covers on insulating barrier 12；Described polysilicon resistance district
13 sides are electrically connected with N+ collecting zone 10 by conductive material 14, and the common exit of opposite side and P+ collecting zone 11 is current collection
Pole.
Further, described N+ collecting zone 10 and P+ collecting zone 11 is respectively positioned on surface, N relief area 9.
Further, described P+ collecting zone 11 is positioned at surface, N relief area 9, and N+ collecting zone 10 is positioned at surface, N drift region 3.
Beneficial effects of the present invention is, relative to traditional LIGBT, the present invention realizes at a high speed, the premium properties of low-power consumption；
Compared to traditional SA-LIGBT, the present invention opens the new way of suppression Snapback effect, and device parameters design is simpler
Single flexible.
Accompanying drawing explanation
Fig. 1 is traditional SSA-LIGBT structural representation；
Fig. 2 is to insert a centre between the P+ collecting zone and N+ collecting zone of SSA-LIGBT to stay apertured isolation channel
After structural representation；
Fig. 3 is the embodiment 1 structure cell schematic diagram that the present invention proposes；
Fig. 4 is the embodiment 2 structure cell schematic diagram that the present invention proposes；
Fig. 5 is the equivalent circuit diagram of present configuration；
Fig. 6 is present configuration and tradition LIGBT cut-off current contrast schematic diagram；
Detailed description of the invention
Below in conjunction with the accompanying drawings and embodiment, technical scheme is described in detail:
Embodiment 1
As it is shown in figure 1, this example includes substrate P 1 from bottom to top, buries oxide layer 2 and soi layer；Described soi layer includes sending out
Emitter structure, grid structure, N drift region 3 and collector structure；Described emitter structure and collector structure are positioned at N drift region 3
Both sides；Described emitter structure includes p-well region 4, body contact area 6, N+ launch site 5 and P+, body contact area 6, N+ launch site 5 and P+
It is positioned at p-well region 4 upper surface, and N+ launch site 5 is located close to side, N drift region, body contact area 6, N+ launch site 5 and P+ common
Exit is emitter stage；Described grid structure includes gate oxide 7 and covers the gate polysilicon 8 on gate oxide 7, grid oxygen
Changing layer 7 be positioned on p-well region 4 and having part overlapping with drift region 3, N+ launch site 5 and N, the exit of gate polysilicon 8 is grid
Electrode；Described collector structure includes N relief area 9, N+ collecting zone 10 and is positioned at the P+ collecting zone 11 on surface, N relief area 9, with
And it is positioned at the insulating barrier 12 on soi layer and polysilicon resistance district 13, N+ collecting zone 10 is located remotely from structure side, N drift region 3,
Polysilicon resistance district 13 covers on insulating barrier 12；Described side, polysilicon resistance district 13 is by conductive material 14 and N+ collection
Electricity district 10 is electrically connected, and the common exit of opposite side and P+ collecting zone 11 is colelctor electrode.
The operation principle of this example is:
During new device forward conduction, electronics enters drift region from MOS raceway groove, flows through N relief area and enters many from N+ collecting zone
Crystal silicon resistance area, then flow out from colelctor electrode.Electronics flows through N relief area and high resistivity polysilicon resistance area and produces sufficiently high pressure
Fall, makes P+ collecting zone inject hole in drift region, thus conductivity modulation effect occurs, make device be put at lower voltages double
Pole pattern, effectively eliminates Snapback effect.New device when off, extracted at a high speed and flowed out from emitter stage by hole, electricity
Son is released by N+ collecting zone and polysilicon resistance district, it is not necessary to disappear with hole-recombination, accelerates the shutoff of new device greatly
Speed, reduce its turn-off power loss.
Embodiment 2
Compared with Example 1, in this example, P+ collecting zone 11 is positioned at surface, N relief area 9, and N+ collecting zone 10 is positioned at N drift region 3
Surface；This example effectively alleviates polysilicon resistance district suppression Snapback effect pressure, can properly increase the doping of polysilicon resistance district.
Claims (3)
1. a high speed SOI-LIGBT, including substrate P (1) from bottom to top, dielectric buried regions (2) and top semiconductor layer；
Described top semiconductor layer includes emitter structure, grid structure, N drift region (3) and collector structure；Described emitter stage
Structure includes that p-well region (4), N+ launch site (5) and P+ body contact area (6), N+ launch site (5) and P+ body contact area (6) are positioned at p-well
District (4) upper surface, and N+ launch site (5) be located close to the common of side, N drift region, N+ launch site (5) and P+ body contact area (6)
Exit is emitter stage；Described grid structure includes gate oxide (7) and covers the gate polysilicon on gate oxide (7)
(8), gate oxide (7) is positioned on p-well region (4) and two ends have part overlapping respectively with N+ launch site (5) and N drift region (3),
The exit of gate polysilicon (8) is gate electrode；Described collector structure includes N relief area (9), N+ collecting zone (10) and is positioned at
The P+ collecting zone (11) of N relief area (9) upper surface, and it is positioned at the insulating barrier (12) on top semiconductor layer and polysilicon electricity
Resistance district (13), N+ collecting zone (10) is located remotely from emitter structure side, and polysilicon resistance district (13) cover in insulating barrier (12)
On；Described polysilicon resistance district (13) side is electrically connected with N+ collecting zone (10) by conductive material (14), opposite side
It is colelctor electrode with the common exit of P+ collecting zone (11).
A kind of high speed SOI-LIGBT the most according to claim 1, it is characterised in that described N+ collecting zone (10) and P+
Collecting zone (11) is respectively positioned on N relief area (9) surface.
A kind of high speed SOI-LIGBT the most according to claim 1, it is characterised in that described P+ collecting zone (11) is positioned at N
Relief area (9) surface, N+ collecting zone (10) is positioned at N drift region (3) surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610876913.9A CN106298900A (en) | 2016-10-09 | 2016-10-09 | A kind of high speed SOI LIGBT |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610876913.9A CN106298900A (en) | 2016-10-09 | 2016-10-09 | A kind of high speed SOI LIGBT |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106298900A true CN106298900A (en) | 2017-01-04 |
Family
ID=57717891
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610876913.9A Pending CN106298900A (en) | 2016-10-09 | 2016-10-09 | A kind of high speed SOI LIGBT |
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| Country | Link |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106684135A (en) * | 2017-01-10 | 2017-05-17 | 电子科技大学 | High-reliability SOI-LIGBT |
| CN107068744A (en) * | 2017-05-11 | 2017-08-18 | 电子科技大学 | A kind of landscape insulation bar double-pole-type transistor |
| CN109148293A (en) * | 2018-08-22 | 2019-01-04 | 江苏中科君芯科技有限公司 | Lateral RC-IGBT device and its manufacturing method |
| CN110459609A (en) * | 2019-08-29 | 2019-11-15 | 电子科技大学 | A kind of short circuit anode thin layer high voltage power device |
| CN111769159A (en) * | 2020-07-09 | 2020-10-13 | 重庆邮电大学 | SA-LIGBT device with polycrystalline silicon electronic channel |
| CN112687681A (en) * | 2020-12-29 | 2021-04-20 | 电子科技大学 | LIGBT device with integrated NMOS tube |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20070158678A1 (en) * | 2005-12-30 | 2007-07-12 | Cambridge Semiconductor Limited | Semiconductor device and method of forming a semiconductor device |
| CN104425579A (en) * | 2013-08-28 | 2015-03-18 | 无锡华润上华半导体有限公司 | Silicon on insulator reverse conduction lateral insulated gate bipolar transistor and manufacturing method thereof |
| CN104795438A (en) * | 2015-04-10 | 2015-07-22 | 电子科技大学 | SA-LIGBT (shorted-anode lateral insulated gate bipolar transistor) capable of restraining snapback effect |
-
2016
- 2016-10-09 CN CN201610876913.9A patent/CN106298900A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070158678A1 (en) * | 2005-12-30 | 2007-07-12 | Cambridge Semiconductor Limited | Semiconductor device and method of forming a semiconductor device |
| CN104425579A (en) * | 2013-08-28 | 2015-03-18 | 无锡华润上华半导体有限公司 | Silicon on insulator reverse conduction lateral insulated gate bipolar transistor and manufacturing method thereof |
| CN104795438A (en) * | 2015-04-10 | 2015-07-22 | 电子科技大学 | SA-LIGBT (shorted-anode lateral insulated gate bipolar transistor) capable of restraining snapback effect |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106684135A (en) * | 2017-01-10 | 2017-05-17 | 电子科技大学 | High-reliability SOI-LIGBT |
| CN106684135B (en) * | 2017-01-10 | 2019-04-26 | 电子科技大学 | A kind of SOI-LIGBT of high reliability |
| CN107068744A (en) * | 2017-05-11 | 2017-08-18 | 电子科技大学 | A kind of landscape insulation bar double-pole-type transistor |
| CN109148293A (en) * | 2018-08-22 | 2019-01-04 | 江苏中科君芯科技有限公司 | Lateral RC-IGBT device and its manufacturing method |
| CN109148293B (en) * | 2018-08-22 | 2022-04-22 | 江苏中科君芯科技有限公司 | Transverse RC-IGBT device and manufacturing method thereof |
| CN110459609A (en) * | 2019-08-29 | 2019-11-15 | 电子科技大学 | A kind of short circuit anode thin layer high voltage power device |
| CN110459609B (en) * | 2019-08-29 | 2020-09-15 | 电子科技大学 | Short-circuit anode thin-layer high-voltage power device |
| CN111769159A (en) * | 2020-07-09 | 2020-10-13 | 重庆邮电大学 | SA-LIGBT device with polycrystalline silicon electronic channel |
| CN111769159B (en) * | 2020-07-09 | 2024-05-28 | 重庆邮电大学 | SA-LIGBT device with polysilicon electronic channel |
| CN112687681A (en) * | 2020-12-29 | 2021-04-20 | 电子科技大学 | LIGBT device with integrated NMOS tube |
| CN112687681B (en) * | 2020-12-29 | 2023-05-02 | 电子科技大学 | LIGBT device with integrated NMOS (N-channel metal oxide semiconductor) tube |
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