CN106684135B - A kind of SOI-LIGBT of high reliability - Google Patents
A kind of SOI-LIGBT of high reliability Download PDFInfo
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- CN106684135B CN106684135B CN201710014266.5A CN201710014266A CN106684135B CN 106684135 B CN106684135 B CN 106684135B CN 201710014266 A CN201710014266 A CN 201710014266A CN 106684135 B CN106684135 B CN 106684135B
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 23
- 229920005591 polysilicon Polymers 0.000 claims abstract description 23
- 239000004065 semiconductor Substances 0.000 claims abstract description 12
- 239000002184 metal Substances 0.000 claims description 12
- 238000002955 isolation Methods 0.000 claims description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- 238000009413 insulation Methods 0.000 claims description 2
- 230000001413 cellular effect Effects 0.000 claims 1
- 239000004020 conductor Substances 0.000 claims 1
- 238000010276 construction Methods 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 4
- 238000005516 engineering process Methods 0.000 abstract description 3
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 230000015556 catabolic process Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000002776 aggregation Effects 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 230000036039 immunity Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7394—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0804—Emitter regions of bipolar transistors
- H01L29/0808—Emitter regions of bipolar transistors of lateral transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0821—Collector regions of bipolar transistors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention belongs to power semiconductor technologies fields, and in particular to a kind of SOI-LIGBT of high reliability.The present invention introduces a N+ collecting zone and polysilicon resistance area compared to traditional LIGBT near P+ collecting zone, and introduces flute profile emission electrode in emitter terminal.New device can realize that the pressure-resistant mechanism such as MOSFET, pressure voltage size do not change with the variation of P+ collecting zone doping concentration, can realize in shorter drift region compared with high voltage.For new device when opening, flute profile emission electrode makes hole current be gathered in N+ emitter region bottom effect decrease, and hole current is more evenly distributed, and effectively enhances the anti-latch-up of new device and short-circuit capacity.Beneficial effects of the present invention are, relative to traditional LIGBT, the present invention has the excellent performance of high speed, low turn-off power loss, while having big FBSOA and SCSOA.
Description
Technical field
The invention belongs to power semiconductor technologies fields, are related to a kind of SOI-LIGBT (Lateral of high reliability
Insulated Gate Bipolar Transistor, landscape insulation bar double-pole-type transistor).
Background technique
Power electronic devices plays huge effect in the control and conversion of electric energy, and IGBT (Insulator-Gate-
Bipolar-Transistor) as the Typical Representative of power electronic devices, both there is MOSFET high input impedance and driving
Simple advantage, conductivity modulation effect make it have the low conducting pressure of BJT (Bipolar-Junction-Transistor) device again
The advantage of drop and high current density, these promote the advantages that IGBT is with high pressure and high current, in rail traffic, intelligence electricity
The solitary advantage of the various fields such as net, household electrical appliance and base station.Transversal I GBT (LIGBT) is convenient for integrated, and SOI technology has and lets out
Leakage current is small, and convenient for advantages such as isolation, therefore, SOI LIGBT is the core component of monolithic power integrated chip.
The breakdown of IGBT can see open the breakdown of base area PNP triode as, such due to its amplification to leakage current
Breakdown punctures compared to general PN junction, and breakdown voltage is smaller.Therefore, compared to the MOSFET of identical pressure-resistant rank, IGBT drift
Area head is moved, long drift region means that IGBT stores more multiple carrier, is unfavorable for IGBT shutdown.Pressure-resistant size and turn-off speed are
A pair of contradiction urgently to be solved of IGBT/LIGBT.When LIGBT is opened, hole current flows through P+ laterally across drift region and well region
Body contact zone is flowed out from emitter.It, can be in N when hole current is collected by P+ body contact zone since LIGBT low potential is located at surface
+ emitter region bottom and side aggregation, cause N+ emitter region bottom and emitter to have larger potential difference, trigger three pole of parasitic NPN
Pipe is opened, and so as to cause latch-up, leads to the FBSOA (Forward-Biased Safe Operation area) of LIGBT
Become smaller with SCSOA (Short-Circuit Safe Operation area).
Summary of the invention
The purpose of the present invention proposes a kind of SOI-LIGBT of high reliability aiming at the above problem.
The technical scheme is that a kind of SOI-LIGBT of high reliability, including what is be cascading from bottom to top
Substrate P 1, buried oxide layer 2 and top semiconductor layer；The top semiconductor layer includes the drift region N 3, is located at 3 side of the drift region N
Emitter structure and gate structure and the collector structure positioned at 3 other side of the drift region N；The emitter structure packet
P-well region 4, N+ emitter region 5 and P+ body contact zone 6 are included, wherein p-well region 4 and P+ body contact zone 6, which contact with each other and be disposed in parallel in, buries
2 upper surface of oxygen layer, p-well region 4 are contacted with the drift region N 3, and N+ emitter region 5 is located at 4 upper layer of p-well region and contacts with P+ body contact zone 6, N
The common exit of+emitter region 5 and P+ body contact zone 6 is metal emitting；It is characterized in that, the transmitting extremely flute profile knot
Structure, P+ body contact zone 6 are contacted with buried oxide layer 2；The gate structure includes gate oxide 7 and is covered on gate oxide 7
Gate polysilicon 8, gate oxide 7 is located on p-well region 4 and both ends have part to overlap with N+ emitter region 5 and the drift region N 3 respectively, grid
The exit of polysilicon 8 is gate electrode；The collector structure includes the buffer area N 9, the N+ current collection positioned at 9 upper layer of the buffer area N
Area 10 and P+ collecting zone 11, and insulating layer 12 and polysilicon resistance area 13 on top semiconductor layer, the N+ collection
Electric area 10 is located remotely from emitter structure side, and the buffer area N 9 is opened with polysilicon resistance area 13 by 12 electrical isolation of insulating layer；
13 side of polysilicon resistance area and N+ collecting zone 10 is electrically connected, and the common exit of the other side and P+ collecting zone 11 is
Metal collector.
Further, the metal emitting is contacted with P+ body contact zone 6 close to drift region side and bottom.
Further, the metal emitting is contacted close to drift region side with P+ body contact zone 6, bottom and buries oxygen
Layer 2 contacts.
Further, the metal emitting is electrically connected by a short slot and P+ body contact zone 6；Described is short
Road slot includes short-circuit polysilicon 14 and short-circuit insulating layer 15, short-circuit trench bottom and close to drift region side respectively with P+ body contact zone
6 and p-well region 4 contact, short-circuit 14 two sides of polysilicon are kept apart by short circuit insulating layer 15 with top semiconductor layer.
Beneficial effects of the present invention are, relative to traditional LIGBT, the present invention realizes high speed, low-power consumption, have both big
The excellent performance of FBSOA and SCSOA.
Detailed description of the invention
Fig. 1 is 1 structure cell schematic diagram of embodiment proposed by the present invention；
Fig. 2 is 2 structure cell schematic diagram of embodiment proposed by the present invention；
Fig. 3 is 3 structure cell schematic diagram of embodiment proposed by the present invention.
Specific embodiment
With reference to the accompanying drawings and examples, the technical schemes of the invention are described in detail:
Embodiment 1
As shown in Figure 1, this example includes the substrate P 1, buried oxide layer 2 and top semiconductor layer being cascading from bottom to top；
The top semiconductor layer includes the drift region N 3, emitter structure and gate structure, Yi Jiwei positioned at 3 side of the drift region N
Collector structure in 3 other side of the drift region N；The emitter structure includes p-well region 4, N+ emitter region 5 and P+ body contact zone
6, wherein p-well region 4 and P+ body contact zone 6 contact with each other and are disposed in parallel in 2 upper surface of buried oxide layer, and the drift region p-well region 4 and N 3 connects
Touching, N+ emitter region 5 is located at 4 upper layer of p-well region and contacts with P+ body contact zone 6, and N+ emitter region 5 and P+ body contact zone 6 are drawn jointly
Outlet is metal emitting；The gate structure includes gate oxide 7 and the gate polysilicon 8 that is covered on gate oxide 7, grid
Oxide layer 7 is located on p-well region 4 and both ends have part overlapping with N+ emitter region 5 and the drift region N 3 respectively, and gate polysilicon 8 draws
Outlet is gate electrode；The collector structure includes the buffer area N 9, N+ collecting zone 10 and P+ collection positioned at 9 upper layer of the buffer area N
Electric area 11, and insulating layer 12 and polysilicon resistance area 13 on top semiconductor layer, the N+ collecting zone 10 are located at
Far from emitter structure side, the buffer area N 9 is opened with polysilicon resistance area 13 by 12 electrical isolation of insulating layer；The polycrystalline
13 side of silicon resistor area and N+ collecting zone 10 are electrically connected, and the common exit of the other side and P+ collecting zone 11 is metal current collection
Pole；Metal emitting is contacted with P+ body contact zone 6 close to drift region side and bottom in this example.
The working principle of this example are as follows:
New device is when being in resistance to pressure condition, due to only having lesser electron leakage current to flow through polysilicon resistance, polycrystalline
Pressure drop on silicon resistor is insufficient to allow the P+ collecting zone/buffer area N diode current flow, and P+ collecting zone is made not work.Polysilicon electricity
Voltage drop is smaller in resistance, is equivalent to collector voltage and is applied directly on the buffer area N, is similar to MOSFET pressure resistance.New device P+ collection
Electric area is shielded, and is opened base area triode pressure resistance and is converted to general PN junction pressure resistance, voltage endurance capability is stronger.New device when opening,
Hole current directly flows transversely through p-well region and is collected by P+ body contact zone, and does not have to be contacted such as traditional LIGBT by the P+ body on surface
It collects, hole current is gathered in N+ emitter region bottom effect decrease, and new device latch-up immunity is stronger, and the short circuit sustainable time is more
It is long.
Embodiment 2
As shown in Fig. 2, this example the difference from embodiment 1 is that, metal emitting is contacted close to drift region side with P+ body
Area 6 contacts, and bottom is contacted with buried oxide layer 2.
Embodiment 3
As shown in figure 3, this example the difference from embodiment 1 is that, metal emitting is contacted by a short slot with P+ body
Area 6 is electrically connected；The short slot includes short-circuit polysilicon 14 and short-circuit insulating layer 15, short-circuit trench bottom and close drift region
Side is contacted with P+ body contact zone 6 and p-well region 4 respectively, and short-circuit 14 two sides of polysilicon pass through short-circuit insulating layer 15 and partly lead with top
Body layer is kept apart.Compared with Examples 1 and 2, this example has better anti-latch and short-circuit capacity.
Claims (1)
1. a kind of SOI-LIGBT of high reliability, including be cascading from bottom to top substrate P (1), buried oxide layer (2) and
Top semiconductor layer；The top semiconductor layer includes the drift region N (3), the emitter structure for being located at the drift region N (3) side
With gate structure and positioned at the collector structure of the drift region N (3) other side；The emitter structure include p-well region (4),
N+ emitter region (5) and P+ body contact zone (6), wherein p-well region (4) and P+ body contact zone (6) contact with each other and are disposed in parallel in and bury
Oxygen layer (2) upper surface, p-well region (4) are contacted with the drift region N (3), and N+ emitter region (5) is located at p-well region (4) upper layer and connects with P+ body
It touches area (6) to contact, the common exit of N+ emitter region (5) and P+ body contact zone (6) is metal emitting；It is characterized in that, institute
Transmitting extremely bathtub construction, P+ body contact zone (6) is stated to contact with buried oxide layer (2)；The gate structure includes gate oxide (7)
With the gate polysilicon (8) being covered on gate oxide (7), gate oxide (7) be located on p-well region (4) and both ends respectively with N+
Emitter region (5) and the drift region N (3) have part to overlap, and the exit of gate polysilicon (8) is gate electrode；The collector structure
Including the buffer area N (9), it is located at the N+ collecting zone (10) and P+ collecting zone (11) on the buffer area N (9) upper layer, and is located at top half
Insulating layer (12) and polysilicon resistance area (13) on conductor layer, have between the N+ collecting zone (10) and P+ collecting zone (11)
Spacing, N+ collecting zone (10) are located remotely from emitter structure side, and the buffer area N (9) and polysilicon resistance area (13) pass through insulation
Layer (12) electrical isolation is opened；Polysilicon resistance area (13) side and N+ collecting zone (10) is electrically connected, the other side and P+
The common exit of collecting zone (11) is collector；
The metal emitting is electrically connected by a short slot and P+ body contact zone (6)；The short slot includes short
Road polysilicon (14) and short-circuit insulating layer (15), short-circuit trench bottom and close to cellular side respectively with P+ body contact zone (6) and p-well
Area (4) contact, short-circuit polysilicon (14) two sides are kept apart by short-circuit insulating layer (15) with top semiconductor layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710014266.5A CN106684135B (en) | 2017-01-10 | 2017-01-10 | A kind of SOI-LIGBT of high reliability |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710014266.5A CN106684135B (en) | 2017-01-10 | 2017-01-10 | A kind of SOI-LIGBT of high reliability |
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| Publication Number | Publication Date |
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| CN106684135A CN106684135A (en) | 2017-05-17 |
| CN106684135B true CN106684135B (en) | 2019-04-26 |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108321194B (en) * | 2018-02-05 | 2020-05-26 | 电子科技大学 | SOI LIGBT with quick turn-off characteristic |
| CN112687681B (en) * | 2020-12-29 | 2023-05-02 | 电子科技大学 | LIGBT device with integrated NMOS (N-channel metal oxide semiconductor) tube |
| CN117650168A (en) * | 2024-01-30 | 2024-03-05 | 深圳天狼芯半导体有限公司 | Structure, manufacturing method, chip and electronic equipment of planar IGBT |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105633140A (en) * | 2016-03-30 | 2016-06-01 | 南京邮电大学 | Double-layer sectioned SOI LIGBT device and manufacturing method thereof |
| US20160315190A1 (en) * | 2015-04-22 | 2016-10-27 | Toyota Jidosha Kabushiki Kaisha | Insulated gate switching element |
| CN106298900A (en) * | 2016-10-09 | 2017-01-04 | 电子科技大学 | A kind of high speed SOI LIGBT |
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2017
- 2017-01-10 CN CN201710014266.5A patent/CN106684135B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160315190A1 (en) * | 2015-04-22 | 2016-10-27 | Toyota Jidosha Kabushiki Kaisha | Insulated gate switching element |
| CN105633140A (en) * | 2016-03-30 | 2016-06-01 | 南京邮电大学 | Double-layer sectioned SOI LIGBT device and manufacturing method thereof |
| CN106298900A (en) * | 2016-10-09 | 2017-01-04 | 电子科技大学 | A kind of high speed SOI LIGBT |
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