CN105633140A - Double-layer sectioned SOI LIGBT device and manufacturing method thereof - Google Patents
Double-layer sectioned SOI LIGBT device and manufacturing method thereof Download PDFInfo
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- CN105633140A CN105633140A CN201610193224.8A CN201610193224A CN105633140A CN 105633140 A CN105633140 A CN 105633140A CN 201610193224 A CN201610193224 A CN 201610193224A CN 105633140 A CN105633140 A CN 105633140A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 38
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 28
- 239000010703 silicon Substances 0.000 claims abstract description 28
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 27
- 239000010410 layer Substances 0.000 claims description 46
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 45
- 229910052760 oxygen Inorganic materials 0.000 claims description 45
- 239000001301 oxygen Substances 0.000 claims description 45
- 230000003647 oxidation Effects 0.000 claims description 19
- 238000007254 oxidation reaction Methods 0.000 claims description 19
- 239000002355 dual-layer Substances 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 9
- 230000015556 catabolic process Effects 0.000 abstract description 7
- 238000002955 isolation Methods 0.000 abstract description 5
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 230000017525 heat dissipation Effects 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 6
- 238000010438 heat treatment Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 3
- 238000012913 prioritisation Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7394—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
- Chemical & Material Sciences (AREA)
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Abstract
The invention discloses a double-layer sectioned SOI LIGBT device. The double-layer sectioned SOI LIGBT device comprises a silicon substrate; a first buried oxide layer and an N buried layer are sequentially arranged on the silicon substrate from left to right; the upper surface of the N buried layer is higher than the upper surface of the first buried oxide layer; a P buried layer is arranged on the first buried oxide layer; a second buried oxide layer is arranged on the N buried layer; the upper surface of the P buried layer and the upper surface of the second buried oxide layer are at the same height; and an N type drift region is arranged on the P buried layer and the second buried oxide layer. The invention also discloses a manufacturing method of the double-layer sectioned SOI LIGBT device. According to the manufacturing method, the oxide layer of a conventional SOI LIGBT is divided into two layers, and layers are separated from each other through reverse PN junctions; and with a novel sectionally-isolated structure adopted, excellent substrate leakage current isolation of the device can be ensured, heat dissipation performance can be improved, operating temperature can be decreased, and breakdown voltage can be improved.
Description
Technical field
The present invention relates to electronic technology field, particularly a kind of dual layer section SOILIGBT device and manufacture method thereof.
Background technology
Lateral insulated gate bipolar transistor LIGBT (LateralInsulatorGateBipolarTransistor) is the compound power device that mos gate device architecture has combined with bipolar transistor structure, has high input impedance and the feature of low conduction voltage drop. With LDMOS the difference is that LIGBT is a kind of bipolar device, electronic current is not only had during conducting, anode P+ can produce electronic current to injection hole, drift region, can continue not having the situation lower part hole of sealing coat to inject to substrate, cause considerable leakage current. Therefore two kinds of substrate isolation modes occurred, one is that reverse PN knot adds flow-guiding structure, and the shortcoming of this kind of structure needs heavy doping therefore to greatly reduce voltage breakdown. One is SOI isolation, this kind of mode is with at the bottom of the direct isolation liner of zone of oxidation and drift region, it is possible to very effective reduction leakage current, but because only drift region pressure-bearing also reduces voltage breakdown equally, simultaneously because the capacity of heat transmission of zone of oxidation is very poor, self-heating effect can be caused.
Summary of the invention
Technical problem to be solved by this invention overcomes the deficiencies in the prior art and provides a kind of dual layer section SOILIGBT device and manufacture method thereof, oxygen buried layer be divide into two sections by the present invention, when being conducive to work, heat is conducting to substrate, thus reduce self-heating effect, silicon substrate participates in pressure-bearing, and therefore voltage breakdown can promote greatly.
The present invention is for solving the problems of the technologies described above by the following technical solutions:
According to a kind of dual layer section SOILIGBT device that the present invention proposes, comprise silicon substrate, silicon substrate is from left to right provided with the first oxygen buried layer and N buried regions successively, the upper surface of N buried regions is higher than the upper surface of the first oxygen buried layer, first oxygen buried layer is provided with P buried regions, N buried regions is provided with the 2nd oxygen buried layer, and the upper surface of P buried regions and the upper surface of the 2nd oxygen buried layer are provided with N-type drift region at same height, P buried regions and the 2nd oxygen buried layer;
Left side in N-type drift region is provided with P body district, P body district is from left to right provided with negative electrode heavy doping P+ district, negative electrode heavy doping N+ district successively, right side in N-type drift region is provided with anode P+ district, light dope N buffer zone and anode heavy doping N+ district, light dope N buffer zone is positioned at the lower section in anode P+ district, anode heavy doping N+ district be positioned at anode P+ district and light dope N buffer zone right side and with the right contact of the 2nd oxygen buried layer;
The upper surface in negative electrode heavy doping P+ district and the part upper surface in negative electrode heavy doping N+ district are provided with negative electrode, the part upper surface in negative electrode heavy doping N+ district, the upper surface in P body district and the upper surface portion regional cross of N-type drift region are provided with grid, the upper surface part subregion in anode P+ district is provided with anode, zone of oxidation it is provided with between grid and negative electrode, the lower surface of grid is also provided with zone of oxidation, is provided with zone of oxidation between grid and anode.
As a kind of dual layer section further prioritization scheme of SOILIGBT device of the present invention, described N-type drift region, negative electrode heavy doping N+ district, light dope N buffer zone, N buried regions and anode heavy doping N+ district are N-type; Silicon substrate, P body district, negative electrode heavy doping P+ district, anode P+ district and P buried regions are P type.
As a kind of dual layer section further prioritization scheme of SOILIGBT device of the present invention, described silicon substrate is SOI silicon substrate.
Based on the manufacture method of a kind of dual layer section SOILIGBT device, comprise the following steps:
Step one, offer silicon substrate;
Step 2, from left to right it is provided with the first oxygen buried layer and N buried regions successively on a silicon substrate, the upper surface of N buried regions is higher than the upper surface of the first oxygen buried layer, first oxygen buried layer is provided with P buried regions, N buried regions is provided with the 2nd oxygen buried layer, the upper surface of P buried regions and the upper surface of the 2nd oxygen buried layer are at same height, at P buried regions, district carries out P doping, and at N buried regions, district carries out N doping;
Step 3, on P buried regions and the 2nd oxygen buried layer, it is provided with N-type drift region;
Step 4, left side in N-type drift region are provided with P body district, P body district is from left to right provided with negative electrode heavy doping P+ district, negative electrode heavy doping N+ district successively, right side in N-type drift region is provided with anode P+ district, light dope N buffer zone and anode heavy doping N+ district, light dope N buffer zone is positioned at the lower section in anode P+ district, anode heavy doping N+ district 15 be positioned at anode P+ district and light dope N buffer zone right side and with the right contact of the 2nd oxygen buried layer;
The upper surface in step 5, negative electrode heavy doping P+ district and the part upper surface in negative electrode heavy doping N+ district are provided with negative electrode, the part upper surface in negative electrode heavy doping N+ district, the upper surface in P body district and the upper surface portion regional cross of N-type drift region are provided with grid, the upper surface part subregion in anode P+ district is provided with anode, zone of oxidation it is provided with between grid and negative electrode, the lower surface of grid is also provided with zone of oxidation, is provided with zone of oxidation between grid and anode.
As the further prioritization scheme of manufacture method of a kind of dual layer section SOILIGBT device of the present invention, the concentration in described N buried regions district and P buried regions district is 1 �� 1015cm-3, the concentration of N-type drift region is 1 �� 1015cm-3, the concentration of light dope N buffer zone is 3 �� 1017cm-3, the concentration in P body district is 1 �� 1017cm-3, the concentration in negative electrode heavy doping N+ district, negative electrode heavy doping P+ district, anode P+ district is 1 �� 1021cm-3, the concentration in anode heavy doping N+ district is 5 �� 1020cm-3��
The present invention adopts above technical scheme compared with prior art, has following technique effect:
(1) oxygen buried layer be divide into two sections by the present invention, when being conducive to work heat be conducting to substrate, thus reduce self-heating effect;
(2) silicon substrate participates in pressure-bearing, and therefore voltage breakdown can promote greatly.
Accompanying drawing explanation
Fig. 1 is common LIGBT diagrammatic cross-section.
Fig. 2 is the diagrammatic cross-section of common SOILIGBT device.
Fig. 3 is the diagrammatic cross-section of dual layer section SOILIGBT device.
Reference numeral in figure is interpreted as: 1-silicon substrate, 2-first oxygen buried layer, 17-N buried regions, 3-P buried regions, 17-N buried regions, 16-the 2nd oxygen buried layer, 4-N type drift region, 5-P body district, 6-negative electrode heavy doping P+ district, 7-negative electrode heavy doping N+ district, 13-anode P+ district, 14-light dope N buffer zone, 15-anode heavy doping N+ district, 8-negative electrode, 9-grid, 12-anode, 11-zone of oxidation, 10-raceway groove.
Embodiment
Below in conjunction with accompanying drawing, the technical scheme of the present invention is described in further detail:
As shown in Figure 1, there is not the isolation structure of reply substrate leakage current in common LIGBT device architecture between work area and substrate, therefore in working order in a large amount of hole be directly injected into substrate, device performance is caused serious impact.
As shown in Figure 3, a kind of dual layer section SOILIGBT device, comprise silicon substrate 1, silicon substrate is from left to right provided with the first oxygen buried layer 2 and N buried regions 17 successively, the upper surface of N buried regions 17 is higher than the upper surface of the first oxygen buried layer 2, and the first oxygen buried layer is provided with P buried regions 3, N buried regions 17 and is provided with the 2nd oxygen buried layer 16, the upper surface of P buried regions 3 and the upper surface of the 2nd oxygen buried layer 16 are provided with N-type drift region 4 at same height, P buried regions 3 and the 2nd oxygen buried layer 16;
Left side in N-type drift region 4 is provided with P body district 5, P body district 5 is from left to right provided with negative electrode heavy doping P+ district 6, negative electrode heavy doping N+ district 7 successively, right side in N-type drift region is provided with anode P+ district 13, light dope N buffer zone 14 and anode heavy doping N+ district 15, light dope N buffer zone 14 is positioned at the lower section in anode P+ district 13, anode heavy doping N+ district 15 be positioned at anode P+ district 13 and light dope N buffer zone 14 right side and with the right contact of the 2nd oxygen buried layer 16; The upper end in P body district 5 is raceway groove 10;
The upper surface in negative electrode heavy doping P+ district 6 and the part upper surface in negative electrode heavy doping N+ district 7 are provided with negative electrode, the part upper surface in negative electrode heavy doping N+ district 7, the upper surface in P body district and the upper surface portion regional cross of N-type drift region 4 are provided with grid, the upper surface part subregion in anode P+ district 13 is provided with anode, zone of oxidation it is provided with between grid and negative electrode, the lower surface of grid is also provided with zone of oxidation, is provided with zone of oxidation between grid and anode.
Described N-type drift region, negative electrode heavy doping N+ district, light dope N buffer zone, N buried regions and anode heavy doping N+ district are N-type; Silicon substrate, P body district, negative electrode heavy doping P+ district, anode P+ district and P buried regions are P type. Described silicon substrate is SOI silicon substrate.
Compared with common SOILIGBT, the present invention innovates the change that part is oxygen buried layer, in common soi structure, as shown in Figure 2, and only one layer of oxygen buried layer covered completely. Oxygen buried layer is divided into two sections and uses heavy doping N district to inject substrate in hole to stop at anode by present configuration, uses reverse PN knot to stop hole to inject substrate in interruption.
The Advantages found of this inventive structure is when working as LIGBT, due to this device oxygen buried layer not completely isolated drift region and substrate, the heat produced that therefore works can be distributed by body silicon, reduces self-heating effect, on the other hand substrate pressure-bearing, it is to increase voltage breakdown.
Based on dual layer section SOILIGBT device, its manufacture method comprises the following steps:
1st step, grows the first oxygen buried layer 2 on silicon substrate 1;
2nd step, on a silicon substrate extension P buried regions and N buried regions;
3rd step, carries out P doping at P buried regions;
4th step, carries out N doping at N buried regions;
5th step, regrowth the 2nd oxygen buried layer on buried regions;
6th step, extension N drift region on silicon chip;
7th step, injects light dope N buffer zone in N drift region;
8th step, injects doped with P body district in N drift region;
9th step, injects negative electrode heavy doping N+ district in P body district, injects anode heavy doping N+ district at positive terminal;
10th step, injects negative electrode heavy doping P+ district in P body district, injects anode heavy doping P+ district in N buffer zone;
11st step, in surface growth zone of oxidation;
12nd step, manufactures electrode cathode, grid, anode on surface.
In described 3rd, 4 steps, N buried regions and P buried regions concentration are 1 �� 1015cm-3, in described 6th step, N drift region concentration is 1 �� 1015cm-3, in described 7th, 8 steps, N buffer zone concentration is 3 �� 1017cm-3, P body district concentration is 1 �� 1017cm-3, in described 9th, 10 steps, negative electrode heavy doping N+ district, negative electrode heavy doping P+ district, anode heavy doping P+ district concentration are 1 �� 1021cm-3, anode heavy doping N+ district concentration is 5 �� 1020cm-3��
This structure reduces self-heating effect compared with conventional SOILIGBT, it is to increase voltage breakdown.
Structure in above-described embodiment, step, numerical value etc. are signal, and under the prerequisite not violating inventive concept, one of ordinary skill in the art can be replaced on an equal basis, it is also possible to makes some distortion and improvement, and these all belong to protection scope of the present invention.
Claims (5)
1. a dual layer section SOILIGBT device, it is characterized in that, comprise silicon substrate, silicon substrate is from left to right provided with the first oxygen buried layer and N buried regions successively, the upper surface of N buried regions is provided with P buried regions higher than the upper surface of the first oxygen buried layer, the first oxygen buried layer, and N buried regions is provided with the 2nd oxygen buried layer, the upper surface of P buried regions and the upper surface of the 2nd oxygen buried layer are provided with N-type drift region at same height, P buried regions and the 2nd oxygen buried layer;
Left side in N-type drift region is provided with P body district, P body district is from left to right provided with negative electrode heavy doping P+ district, negative electrode heavy doping N+ district successively, right side in N-type drift region is provided with anode P+ district, light dope N buffer zone and anode heavy doping N+ district, light dope N buffer zone is positioned at the lower section in anode P+ district, anode heavy doping N+ district be positioned at anode P+ district and light dope N buffer zone right side and with the right contact of the 2nd oxygen buried layer;
The upper surface in negative electrode heavy doping P+ district and the part upper surface in negative electrode heavy doping N+ district are provided with negative electrode, the part upper surface in negative electrode heavy doping N+ district, the upper surface in P body district and the upper surface portion regional cross of N-type drift region are provided with grid, the upper surface part subregion in anode P+ district is provided with anode, zone of oxidation it is provided with between grid and negative electrode, the lower surface of grid is also provided with zone of oxidation, is provided with zone of oxidation between grid and anode.
2. a kind of dual layer section SOILIGBT device according to claim 1, it is characterised in that, described N-type drift region, negative electrode heavy doping N+ district, light dope N buffer zone, N buried regions and anode heavy doping N+ district are N-type; Silicon substrate, P body district, negative electrode heavy doping P+ district, anode P+ district and P buried regions are P type.
3. a kind of dual layer section SOILIGBT device according to claim 1, it is characterised in that, described silicon substrate is SOI silicon substrate.
4., based on the manufacture method of a kind of dual layer section SOILIGBT device according to claim 1, comprise the following steps:
Step one, offer silicon substrate;
Step 2, from left to right it is provided with the first oxygen buried layer and N buried regions successively on a silicon substrate, the upper surface of N buried regions is higher than the upper surface of the first oxygen buried layer, first oxygen buried layer is provided with P buried regions, N buried regions is provided with the 2nd oxygen buried layer, the upper surface of P buried regions and the upper surface of the 2nd oxygen buried layer are at same height, at P buried regions, district carries out P doping, and at N buried regions, district carries out N doping;
Step 3, on P buried regions and the 2nd oxygen buried layer, it is provided with N-type drift region;
Step 4, left side in N-type drift region are provided with P body district, P body district is from left to right provided with negative electrode heavy doping P+ district, negative electrode heavy doping N+ district successively, right side in N-type drift region is provided with anode P+ district, light dope N buffer zone and anode heavy doping N+ district, light dope N buffer zone is positioned at the lower section in anode P+ district, anode heavy doping N+ district 15 be positioned at anode P+ district and light dope N buffer zone right side and with the right contact of the 2nd oxygen buried layer;
The upper surface in step 5, negative electrode heavy doping P+ district and the part upper surface in negative electrode heavy doping N+ district are provided with negative electrode, the part upper surface in negative electrode heavy doping N+ district, the upper surface in P body district and the upper surface portion regional cross of N-type drift region are provided with grid, the upper surface part subregion in anode P+ district is provided with anode, zone of oxidation it is provided with between grid and negative electrode, the lower surface of grid is also provided with zone of oxidation, is provided with zone of oxidation between grid and anode.
5. the manufacture method of a kind of dual layer section SOILIGBT device according to claim 4, it is characterised in that, the concentration in described N buried regions district and P buried regions district is 1 �� 1015cm-3, the concentration of N-type drift region is 1 �� 1015cm-3, the concentration of light dope N buffer zone is 3 �� 1017cm-3, the concentration in P body district is 1 �� 1017cm-3, the concentration in negative electrode heavy doping N+ district, negative electrode heavy doping P+ district, anode P+ district is 1 �� 1021cm-3, the concentration in anode heavy doping N+ district is 5 �� 1020cm-3��
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| CN201610193224.8A CN105633140B (en) | 2016-03-30 | 2016-03-30 | A kind of dual layer section SOI LIGBT devices and its manufacturing method |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106684135A (en) * | 2017-01-10 | 2017-05-17 | 电子科技大学 | High-reliability SOI-LIGBT |
| WO2019134466A1 (en) * | 2018-01-04 | 2019-07-11 | 中兴通讯股份有限公司 | Lateral insulator gate bipolar transistor and manufacturing method thereof |
| CN110047920A (en) * | 2019-04-16 | 2019-07-23 | 西安电子科技大学 | A kind of horizontal junction grid bipolar transistor and preparation method thereof |
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| US20070235804A1 (en) * | 2006-04-10 | 2007-10-11 | Fuji Electric Device Technology Co., Ltd. | Soi lateral semiconductor device and method of manufacturing the same |
| CN100474620C (en) * | 2004-04-21 | 2009-04-01 | 三菱电机株式会社 | Dielectric isolation type semiconductor device |
| CN104009089A (en) * | 2014-05-29 | 2014-08-27 | 西安电子科技大学 | PSOI lateral double-diffused metal oxide semiconductor field effect transistor |
| CN104769715A (en) * | 2012-07-31 | 2015-07-08 | 硅联纳半导体(美国)有限公司 | Power device integration on a common substrate |
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2016
- 2016-03-30 CN CN201610193224.8A patent/CN105633140B/en active Active
Patent Citations (4)
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| CN100474620C (en) * | 2004-04-21 | 2009-04-01 | 三菱电机株式会社 | Dielectric isolation type semiconductor device |
| US20070235804A1 (en) * | 2006-04-10 | 2007-10-11 | Fuji Electric Device Technology Co., Ltd. | Soi lateral semiconductor device and method of manufacturing the same |
| CN104769715A (en) * | 2012-07-31 | 2015-07-08 | 硅联纳半导体(美国)有限公司 | Power device integration on a common substrate |
| CN104009089A (en) * | 2014-05-29 | 2014-08-27 | 西安电子科技大学 | PSOI lateral double-diffused metal oxide semiconductor field effect transistor |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106684135A (en) * | 2017-01-10 | 2017-05-17 | 电子科技大学 | High-reliability SOI-LIGBT |
| CN106684135B (en) * | 2017-01-10 | 2019-04-26 | 电子科技大学 | A kind of SOI-LIGBT of high reliability |
| WO2019134466A1 (en) * | 2018-01-04 | 2019-07-11 | 中兴通讯股份有限公司 | Lateral insulator gate bipolar transistor and manufacturing method thereof |
| CN110010678A (en) * | 2018-01-04 | 2019-07-12 | 中兴通讯股份有限公司 | Lateral insulated gate bipolar transistor and preparation method thereof |
| CN110047920A (en) * | 2019-04-16 | 2019-07-23 | 西安电子科技大学 | A kind of horizontal junction grid bipolar transistor and preparation method thereof |
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| CN105633140B (en) | 2018-06-12 |
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