CN108321194B - SOI LIGBT with quick turn-off characteristic - Google Patents
SOI LIGBT with quick turn-off characteristic Download PDFInfo
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- CN108321194B CN108321194B CN201810113221.8A CN201810113221A CN108321194B CN 108321194 B CN108321194 B CN 108321194B CN 201810113221 A CN201810113221 A CN 201810113221A CN 108321194 B CN108321194 B CN 108321194B
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- 239000004020 conductor Substances 0.000 claims abstract description 22
- 239000004065 semiconductor Substances 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims description 5
- 239000000969 carrier Substances 0.000 abstract description 7
- 238000000605 extraction Methods 0.000 abstract description 5
- 238000009825 accumulation Methods 0.000 abstract description 4
- 230000000694 effects Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7394—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/083—Anode or cathode regions of thyristors or gated bipolar-mode devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/083—Anode or cathode regions of thyristors or gated bipolar-mode devices
- H01L29/0834—Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
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Abstract
The invention belongs to the technical field of power semiconductors, and particularly relates to an SOI LIGBT with a rapid turn-off characteristic. Compared with the traditional SOI LIGBT, the invention has the advantages that the cathode is introduced into the cathode slot connected with the cathode potential, the cathode slot extends to the position below the P well region of the cathode, the cathode slot is contacted with the P + body contact region at one side close to the anode structure, meanwhile, two anode slot structures of high-concentration P-type doped conductive materials are introduced into the anode end, and the conductive materials are connected with the anode potential; when the device is conducted in the forward direction, the cathode hole accumulation groove provides a hole bypass for the device, holes are accumulated on the wall of the cathode groove, the device is enabled to have stronger anti-latch-up capability under high current density, and the anti-short-circuit capability of the device is improved. When the device is turned off, the cathode slot and the anode slot respectively provide low-resistance channels for extracting holes and electrons, so that the extraction of non-equilibrium carriers stored in the drift region is quickened, and the turn-off time and the turn-off energy loss are reduced.
Description
Technical Field
The invention belongs to the technical field of power semiconductors, and relates to a novel SOI LIGBT (laterally insulated Gate Bipolar Transistor) capable of being quickly turned off.
Background
The IGBT is a new device combining a MOSFET (metal oxide semiconductor field effect transistor) and a BJT (bipolar junction transistor), not only has the advantages of high input impedance of the MOSFET and low on-resistance of the BJT, but also realizes high breakdown voltage and forward large current. The Lateral IGBT (LIGBT) is easy to integrate in a silicon-based, especially SOI-based, power integrated circuit, the SOI-based LIGBT can completely eliminate the injection of hole electron pairs of a bulk silicon LIGBT substrate, and the SOI technology adopting medium isolation is easy to realize the complete electrical isolation of devices, so that the SOI LIGBT is widely applied to high and new technology industries such as power electronics, industrial automation, aerospace and the like.
The IGBT has slightly changed parameters due to the complexity of the device structure, and the performance of the IGBT is correspondingly changed. With the rapid development of the IGBT, the operating current of the IGBT is increasing. However, since the device itself includes a positive feedback current loop, when the working current is increased to a certain degree, the sum of the small-signal short-circuit current amplification factors of the parasitic bipolar transistor reaches 1, which easily causes latch-up effect and severely limits the range of the safe working area; moreover, when the device is latched, the gate electrode loses control capability, so that the device is damaged due to overcurrent heating, and the device is permanently failed. Therefore, there is a need to improve the latch-up resistance of the device. Meanwhile, when the device is switched on, a large number of non-equilibrium carriers are stored in the drift region, non-equilibrium electrons are mainly distributed in the unconsumed drift region and the field stop layer, and because the substrate of the conventional SOI LIGBT is connected with a low potential, holes are accumulated above the buried oxide layer when the device is switched on, and the non-equilibrium carriers left in the drift region when the device is switched off cause that the tail current of the device is larger and the turn-off loss is serious.
Disclosure of Invention
In order to accelerate the extraction of non-equilibrium carriers in a drift region during turn-off and reduce turn-off loss; the parasitic NPN tube of the device is prevented from being opened under large current, so that latch-up effect is generated, and the short-circuit resistance of the device is improved. The invention provides a novel SOI LIGBT capable of being quickly turned off. By respectively introducing the hole accumulation groove and the anode clamping groove into the cathode and the anode, the latch-up effect can be inhibited, the short-circuit capability is improved, the turn-off time of the device is reduced, and low turn-off loss is obtained.
The technical scheme adopted by the invention is as follows:
an SOI LIGBT with a rapid turn-off characteristic comprises a P substrate 1, a buried oxide layer 2 and a top semiconductor layer which are sequentially stacked from bottom to top; the top semiconductor layer is provided with an N-type drift region 19, and the device is sequentially provided with a cathode structure, a gate structure and an anode structure from one side to the other side along the transverse direction of the N-type drift region 19;
the cathode structure comprises a P well region 9 and a cathode slot 10 which are arranged in parallel on the upper layer of one side of the N drift region 19, wherein the P well region 9 is arranged on one side close to the anode structure; the upper layer of the P well region 9 is provided with a P + body contact region 5 and an N + cathode region 6 which are arranged in parallel, wherein the P + body contact region 5 is contacted with the cathode groove 10; the cathode slot 10 is composed of an insulating medium 4 and a conductive material 3 wrapped by the insulating medium 4, and the junction depth of the cathode slot 10 is greater than that of the P well region 9; the common leading-out end of the conductive material 3, the P + body contact region 5 and the N + cathode region 6 is a cathode;
the grid structure is formed by an insulating medium 8 and a conductive material 7 on the insulating medium, and the leading-out end of the conductive material 7 is a grid electrode; the insulating medium 8 is in contact with the top semiconductor layer, and the gate structure is positioned on the upper surface of part of the N + cathode region 6, the upper surface of the P well region 9 and the upper surface of part of the N-type drift region 19;
the anode structure comprises a field stop layer 11 and a first N-type doped region 18 which are arranged on the upper layer of the N-type drift region 19 in parallel and far away from one side of the cathode structure, wherein the field stop layer 11 is arranged on one side close to the cathode structure; the upper layer of the field stop layer 11 is provided with a P + anode region 12; the upper surface of the first N-type doped region 18 is provided with two anode groove structures 15 and a second N-type doped region 17 positioned between the anode groove structures; the upper surface of the second N-type doped region 17 is provided with an N + anode region 16; the anode slot structure 15 is composed of an insulating medium 13 positioned on the inner wall of the slot and a P-type doped conducting material 14 surrounded by the insulating medium 13; the common leading-out end of the P + anode region 12, the P-type conductive material 14 and the N + anode region 16 is an anode.
Further, the lower end of the cathode slot 10 extends to contact with the buried oxide layer 2.
Furthermore, there are two cathode slots 10, a P well region 9 is arranged between the two cathode slots, the upper layer of the P well region 9 between the two cathode slots is provided with a P + body contact region 5, and the lower end of the cathode slot 10 far away from one side of the anode structure is contacted with the buried oxide layer 2.
In the above scheme, the doping concentration of the first N-type doping region 18 is greater than that of the second N-type doping region 17.
Compared with the traditional SOI LIGBT structure, the SOI LIGBT structure has the advantages of better short-circuit resistance, higher switching speed and lower switching loss.
Drawings
FIG. 1 is a schematic structural view of example 1;
FIG. 2 is a schematic structural view of example 2;
fig. 3 is a schematic structural view of embodiment 3.
Detailed Description
The technical solution of the present invention is further described in detail below with reference to the accompanying drawings and examples.
Example 1
As shown in fig. 1, the structure of this example includes a P substrate 1, a buried oxide layer 2, and a top semiconductor layer stacked in this order from bottom to top; the top semiconductor layer is provided with an N-type drift region 19, and the device is sequentially provided with a cathode structure, a gate structure and an anode structure from one side to the other side along the transverse direction of the N-type drift region 19;
the cathode structure comprises a P well region 9 and a cathode slot 10 which are arranged in parallel on the upper layer of one side of the N drift region 19, wherein the P well region 9 is arranged on one side close to the anode structure; the upper layer of the P well region 9 is provided with a P + body contact region 5 and an N + cathode region 6 which are arranged in parallel, wherein the P + body contact region 5 is contacted with the cathode groove 10; the cathode slot 10 is composed of an insulating medium 4 and a conductive material 3 wrapped by the insulating medium 4, and the junction depth of the cathode slot 10 is greater than that of the P well region 9; the common leading-out end of the conductive material 3, the P + body contact region 5 and the N + cathode region 6 is a cathode
The grid structure is formed by an insulating medium 8 and a conductive material 7 on the insulating medium, and the leading-out end of the conductive material 7 is a grid electrode; the insulating medium 8 is in contact with the top semiconductor layer, and the gate structure is positioned on the upper surface of part of the N + cathode region 6, the upper surface of the P well region 9 and the upper surface of part of the N-type drift region 19;
the anode structure comprises a field stop layer 11 and a first N-type doped region 18 which are arranged on the upper layer of the N-type drift region 19 in parallel and far away from one side of the cathode structure, wherein the field stop layer 11 is arranged on one side close to the cathode structure; the upper layer of the field stop layer 11 is provided with a P + anode region 12; the upper surface of the first N-type doped region 18 is provided with two anode groove structures 15 and a second N-type doped region 17 positioned between the anode groove structures; the upper surface of the second N-type doped region 17 is provided with an N + anode region 16; the anode slot structure 15 is composed of an insulating medium 13 positioned on the inner wall of the slot and a P-type doped conducting material 14 surrounded by the insulating medium 13; the common leading-out end of the P + anode region 12, the P-type conductive material 14 and the N + anode region 16 is an anode.
The working principle of the embodiment is as follows:
compared with the traditional SOI LIGBT, the cathode is introduced with a cathode groove connected with cathode potential, the cathode groove extends to the position below a cathode P well region, one side of the cathode groove close to the anode structure is contacted with a P + body contact region, meanwhile, two anode groove structures of high-concentration P-type doped conductive materials are introduced at the anode end, and the conductive materials are connected with anode potential; when the device is conducted in the forward direction, the cathode hole accumulation groove provides a hole bypass for the device, holes are accumulated on the wall of the cathode groove, the device is enabled to have stronger anti-latch-up capability under high current density, and the anti-short-circuit capability of the device is improved. When the device is turned off, the cathode slot and the anode slot respectively provide low-resistance channels for extracting holes and electrons, so that the extraction of non-equilibrium carriers stored in the drift region is accelerated, and the turn-off time and the turn-off energy loss are reduced.
Example 2
As shown in fig. 2, the difference between this example and example 1 is that the lower end of the cathode trench 10 extends to contact with the buried oxide layer 2; compared with embodiment 1, the design in this example can not only accumulate the holes flowing to the cathode on the groove wall, but also provide a channel directly flowing to the cathode for the holes accumulated above the buried oxide layer, and when the device is in forward conduction, the short-circuit resistance of the device is stronger. When the device is turned off, the extraction of the non-equilibrium carriers stored in the drift region is further accelerated, and the turn-off time and the turn-off energy loss are reduced.
Example 3
As shown in fig. 3, the difference between this example and embodiment 1 is that there are two cathode trenches 10, a P well region 9 is located between the two cathode trenches, a P + body contact region 5 is located on the upper layer of the P well region 9 between the two cathode trenches, and the lower end of the cathode trench 10 on the side far from the anode structure contacts with the buried oxide layer 2; compared with embodiments 1 and 2, the design in this example can not only provide a plurality of accumulation groove walls for the holes flowing to the cathode, but also provide a channel directly flowing to the cathode for the holes accumulated above the buried oxide layer, and when the device is conducted in the forward direction, the latch-up resistance of the device is stronger, and the short-circuit resistance of the device is further improved. When the device is turned off, the extraction of the non-equilibrium carriers stored in the drift region is further accelerated, and the turn-off time and the turn-off energy loss are reduced.
Claims (3)
1. An SOI LIGBT with a rapid turn-off characteristic comprises a P substrate (1), a buried oxide layer (2) and a top semiconductor layer which are sequentially stacked from bottom to top; the top semiconductor layer is provided with an N-type drift region (19), and the device is sequentially provided with a cathode structure, a grid structure and an anode structure from one side to the other side along the transverse direction of the N-type drift region (19);
the cathode structure comprises a P well region (9) and a cathode slot (10) which are arranged on the upper layer of one side of the N drift region (19) in parallel, wherein the P well region (9) is arranged on one side close to the anode structure; the upper layer of the P well region (9) is provided with a P + body contact region (5) and an N + cathode region (6) which are arranged in parallel, wherein the P + body contact region (5) is in contact with the cathode groove (10); the cathode slot (10) is composed of an insulating medium (4) and a conductive material (3) wrapped by the insulating medium (4), and the junction depth of the cathode slot (10) is greater than that of the P well region (9); the common leading-out end of the conductive material (3), the P + body contact region (5) and the N + cathode region (6) is a cathode;
the grid structure is formed by an insulating medium (8) and a conductive material (7) on the insulating medium, and the leading-out end of the conductive material (7) is a grid electrode; the insulating medium (8) is in contact with the top semiconductor layer, and the gate structure is positioned on the upper surface of part of the N + cathode region (6), the upper surface of the P well region (9) and the upper surface of part of the N-type drift region (19);
the anode structure comprises a field stop layer (11) and a first N-type doped region (18), wherein the field stop layer (11) and the first N-type doped region are arranged on the upper layer of the N-type drift region (19) in parallel and are far away from one side of the cathode structure, and the field stop layer (11) is arranged on one side close to the cathode structure; the upper layer of the field stop layer (11) is provided with a P + anode region (12); the upper surface of the first N-type doped region (18) is provided with two anode groove structures (15) and a second N-type doped region (17) positioned between the anode groove structures; the upper surface of the second N-type doped region (17) is provided with an N + anode region (16); the anode slot structure (15) consists of an insulating medium (13) positioned on the inner wall of the slot and a P-type doped conductive material (14) surrounded by the insulating medium (13); and the common leading-out end of the P + anode region (12), the P-type conductive material (14) and the N + anode region (16) is an anode.
2. SOI LIGBT with fast turn-off characteristics according to claim 1, characterized in that the cathode trench (10) extends with its lower end into contact with the buried oxide layer (2).
3. SOI LIGBT with fast turn-off characteristics according to claim 1, wherein there are two cathode trenches (10), there is a P well region (9) between two cathode trenches, the P well region (9) between two cathode trenches has a P + body contact region (5) on the upper layer, and the cathode trench (10) on the side away from the anode structure has its lower end in contact with the buried oxide layer (2).
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810113221.8A CN108321194B (en) | 2018-02-05 | 2018-02-05 | SOI LIGBT with quick turn-off characteristic |
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| CN201810113221.8A CN108321194B (en) | 2018-02-05 | 2018-02-05 | SOI LIGBT with quick turn-off characteristic |
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| CN108321194B true CN108321194B (en) | 2020-05-26 |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110504307B (en) * | 2019-08-28 | 2023-03-14 | 重庆邮电大学 | SA-LIGBT device with grid-controlled collector |
| CN113270474B (en) * | 2021-04-08 | 2022-12-27 | 西安电子科技大学 | Short-circuit anode lateral insulated gate bipolar transistor controlled by anode depletion region and manufacturing method thereof |
| CN113555424B (en) * | 2021-07-21 | 2023-05-26 | 电子科技大学 | Self-adaptive low-loss power device |
| CN114823863B (en) * | 2022-04-24 | 2023-04-25 | 电子科技大学 | Low-power-consumption transverse power device with anode groove |
| CN117650168A (en) * | 2024-01-30 | 2024-03-05 | 深圳天狼芯半导体有限公司 | Structure, manufacturing method, chip and electronic equipment of planar IGBT |
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|---|---|---|---|---|
| CN106684135A (en) * | 2017-01-10 | 2017-05-17 | 电子科技大学 | High-reliability SOI-LIGBT |
| CN106992208A (en) * | 2016-01-21 | 2017-07-28 | 重庆中科渝芯电子有限公司 | A kind of thin silicone layer SOI bases landscape insulation bar double-pole-type transistor and its manufacture method |
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| US8426913B2 (en) * | 2008-06-23 | 2013-04-23 | Force Mos Technology Co., Ltd. | Integrated trench MOSFET with trench Schottky rectifier |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106992208A (en) * | 2016-01-21 | 2017-07-28 | 重庆中科渝芯电子有限公司 | A kind of thin silicone layer SOI bases landscape insulation bar double-pole-type transistor and its manufacture method |
| CN106684135A (en) * | 2017-01-10 | 2017-05-17 | 电子科技大学 | High-reliability SOI-LIGBT |
Non-Patent Citations (1)
| Title |
|---|
| "Electrical Characteristic Study of an SOI-LIGBT With Segmented Trenches in the Anode Region";Jing Zhu等;《IEEE TRANSACTIONS ON ELECTRON DEVICES》;20160531;第63卷(第5期);第2003-2008页 * |
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