CN1090439C - 制备用于半导体组装的基板的方法 - Google Patents
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Abstract
制备用于半导体组装的基板的方法,包括在基板上形成具有所期望的电路图形的导电层;固化处理导电层;精压固化后的导电层以使表面均匀。固化后的导电层可以镀镍,然后镀金,整形后形成镀金电路板。
Description
本发明涉及一种制备用于半导体组装的基板的方法,更具体地说,涉及一种用导电油墨通过形成图形制备用于半导体组装的基板的方法。
通常,半导体组装件包括装在印刷电路板上的芯片载体。最好是将引线架(1ead frame)用作芯片载体。最近,随着组装件微小型化的趋势,表面贴装技术已得以发展,其中引线架可在功能上和印刷电路板合为一个整体,这样可直接将芯片安装在电路板上,而不需要引线架。鉴于上述趋势,芯片安装到电路板上以后,丝焊(wire bonding)概念的研究得到加强。
典型地,印制电路板或者用于表面贴装的印制电路板的图形是用腐蚀方法来制成的。用腐蚀方法制备印制电路板时,在绝缘体上镀上敷铜层,绝缘体是在基底材料上用高分子树脂层叠而成的。敷铜层上不需要的部分用化学药剂溶解并去除以形成导体图形。
按上面描述的腐蚀方法,可以大规模地制造用于半导体组装的电路板。但是,腐蚀方法包含三十多道工艺步骤,导致很高的设备和生产费用以及很高的废水处理费用。
本发明的其它目的和优点将部分地在下面予以描述,部分地通过描述变得显而易见,或者对本发明进行实验操作,也会了解这些目的和优点。利用所附权利要求中具体指出的诸项说明或其组合方法,可以实现本发明的目的和优点。
为达到此目的,按本发明的意图,如这里将详细描述的实施方式,本发明包括下列步骤:在基板上形成具有所期望的电路图形的导电层;固化处理导电层;精压固化后的导电层以使导电层的表面大致上均匀。
列入和构成说明书一部分的附图,示出了本发明的一个实施例,附图和文字描述一起用来解释本发明的原理。附图中:
图1表示制造用于半导体组装的印制电路板的传统加工方法的流程图;
图2表示按照本发明的实施例制造用于半导体组装的印制电路板的方法的流程图:
图3为精压前后印制电路板的横截面示意图,按照本发明的实施例,印制电路板的精压在第一次或第二次固化处理后进行;
图4为精压前后印制电路板的横截面示意图,按照本发明的实施例,印制电路板的精压在镀镍后进行。
下面参看图2描述本发明的实施例。
在印制电路板上钻通孔和过孔,最好是在电路板上用含有铜、银、铅等金属的导电油墨以丝网印出所期望的导电图形。然后,对电路板作第一次固化处理;作第二次固化处理;镀镍;镀金;以及整形,以适合于半导体组装。第一次固化处理最好在50℃-150℃温度下进行,第二次固化处理最好在100℃-250℃温度下进行。如图3所示,为平滑导电(油墨)图形的粗糙表面,在第一次固化处理后或第二次固化处理后实施精压(coining)。另一种方案是,如图4所示,镀镍后用精压机进行精压,镀镍后用表面上敷涂聚四氟乙烯的精压机进行精压,可防止异物粘贴到导电图形的表面上。对按上述方法制成的带有所期望的导电图形的印刷电路板进行检查后,最好用丝网对印刷电路板丝网印刷锡,接着敷涂上粘结剂。然后将元件安装在敷涂后的电路板上;对装上元件的印刷电路板进行干燥、热焊、冲洗和灌封以制成半导体组装件。
现在将参照下列的例子,对本发明的实施例作进一步的解释。这些例子只是作为本发明的范例,而不是意欲限制本发明的范围。
请看第一个例子。在尺寸15.24cm×15.24cm(6″×6″)的印刷板上钻出通孔和过孔,用含铜的导电油墨以丝网在印刷电路板上印出所期望的导电图形。第一次固化处理后进行精压。第二固化次处理后,在固化后的印刷电路板上镀镍、镀金并整形,以形成用于半导体组装的镀金印刷电路板。
检查后,用丝网对印刷电路板丝网印刷锡,并敷涂上粘结剂。然后,将元件安装到敷涂后的电路板上,对装上元件的印刷电路板进行干燥、热焊、冲洗和灌封以制成半导体组装件。
请看第二个例子。精压在第二次固化处理后进行,除此以外,制备半导体组装件的方法同第一个例子。
请看第三个例子。精压在镀镍后进行,除此以外,制备半导体组装件的方法同例子1。
请看第四个例子。在尺寸15.24cm×15.24cm(6″×6″)的印刷电路板上钻通孔和过孔,用化学电镀方法在其上镀铜。镀后的电路板以2%碳酸氢钠、酒精和三氯乙烯混合液清洗;用水冲洗,然后用10%的盐酸冲洗一分钟,再用水冲洗。然后,对电路进行研磨(或抛光),用水冲洗,干燥后形成层叠板。然后在层叠板上形成光致抗蚀剂膜,并在50℃~60℃的温度下干燥40分钟。然后在干燥后的层叠板上放上带有期望的导电图形的丝网,曝光2分钟。曝光后的层叠板用显影液显影并干燥。显影后的层叠板镀锡;将光致抗蚀剂剥落;在30℃温度下,用氯化亚铁对印刷电路板进行腐蚀;将镀锡剥落。
检查后,在印刷电路板上敷涂以防焊剂,用丝网曝露于光线下。曝光后的印刷电路板进行显影印出防焊剂图样。然后,用丝网将电路板的所需的部分作出标识,所需的端口部分进行镀覆;没有敷涂防焊剂的部分用热钎料焊接。
然后,将元件装在印刷电路板上。将装有这种元件的电路板干燥,浸入钎锡浴槽,切除多余的引线,冲洗电路板并灌封,形成半导体组装件。
如上所述,制造上面具有导电油墨图形的印刷电路板,不需要引线架,可进行表面贴装,按照本发明的上述实施例的方法,和利用腐蚀法的传统方法相比,减少了生产步骤数,因而降低了生产成本。另外,因为印刷电路板的表面上可直接提供导电图形,元件可以更加高效地安装在电路板上。
用导电油墨在印刷电路板上制作图形时,因导电油墨中含有金属颗粒、树脂和溶剂,和传统方法中仅用金属制作的图形相比,电路板的表面将会粗糙些。导电液的粘度使这一问题更加严重。这种表面粗糙度或不平度一般出现在制作图形之后,应该加以校正,以便于为后续的丝焊提供平整度。
按照本发明的实施例,为使导电油墨层表面平整,固化后或镀镍后用精压机对导电油墨层表面进行精压。因提供了平滑表面,元件可有效地贴在电路板上并实现线路焊接。
如上所述,按照本发明的实施例,制备用于半导体组装的印制线路板的过程大大降低了工艺步骤数,因而和利用腐蚀法的传统方法相比可降低生产和设备成本。
Claims (7)
1、一种制备用于半导体组装的基板的方法,包括下列步骤:
在板上通过丝网印刷包括金属的导电油墨在基板上形成具有所需的电路图形的导电层;
固化处理所述导电层,以及
精压所述处理过的导电层,使导电层的表面大致上均匀。
2、根据权利要求1所述的制备用于半导体组装的基板的方法,还包括用镍镀所述固化的导电层以及用金镀所述镀过的导电层。
3、根据权利要求1所述的制备用于半导体组装的基板的方法,其中,所述处理步骤包括:
在50℃-150℃温度下第一次固化处理所述导电层;然后
在100℃-250℃温度下,第二次固化处理所述处理过的导电层。
4、根据权利要求1所述的制备用于半导体组装的基板的方法,其中,用表面上敷涂有聚四氟乙烯的精压机实施所述的精压步骤。
5、根据权利要求2所述的制备用于半导体组装的基板的方法,其中,所述精压步骤在所述镀层步骤后实施。
6、根据权利要求3所述的制备用于半导体组装的基板的方法,其中,所述精压步骤在第一次固化处理步骤后实施。
7、根据权利要求3所述的制备用于半导体组装的基板的方法,其中,所述精压步骤在第二次固化处理步骤后实施。
Applications Claiming Priority (2)
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KR1019950024814A KR0172000B1 (ko) | 1995-08-11 | 1995-08-11 | 전도성 잉크를 이용한 반도체 패키지용 기판의 제조방법 |
KR24814/95 | 1995-08-11 |
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CN1143304A CN1143304A (zh) | 1997-02-19 |
CN1090439C true CN1090439C (zh) | 2002-09-04 |
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CN96101889A Expired - Fee Related CN1090439C (zh) | 1995-08-11 | 1996-03-13 | 制备用于半导体组装的基板的方法 |
Country Status (5)
Country | Link |
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US (1) | US5739055A (zh) |
JP (1) | JP2796270B2 (zh) |
KR (1) | KR0172000B1 (zh) |
CN (1) | CN1090439C (zh) |
DE (1) | DE19607323A1 (zh) |
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KR20030042873A (ko) * | 2001-11-26 | 2003-06-02 | 주식회사 심텍 | 순수금속의 레지스트 도금을 이용한 인쇄회로기판의회로형성방법 |
JP3771907B2 (ja) * | 2002-05-27 | 2006-05-10 | 山一電機株式会社 | 電極の回復処理方法 |
DE10347737A1 (de) * | 2003-09-30 | 2005-05-04 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement mit einem metallisierten Träger |
EP1521312A3 (de) * | 2003-09-30 | 2008-01-16 | Osram Opto Semiconductors GmbH | Optoelektronisches Bauelement mit einem metallisierten Träger |
US20050176270A1 (en) * | 2004-02-11 | 2005-08-11 | Daniel Luch | Methods and structures for the production of electrically treated items and electrical connections |
US20100193367A1 (en) * | 2004-02-11 | 2010-08-05 | Daniel Luch | Methods and structures for the production of electrically treated items and electrical connections |
KR100852406B1 (ko) * | 2007-01-26 | 2008-08-14 | 넥스콘 테크놀러지 주식회사 | 인쇄회로기판의 제조방법 |
KR100871034B1 (ko) * | 2007-06-12 | 2008-11-27 | 삼성전기주식회사 | 인쇄회로기판의 페이스트 범프 형성 방법 |
KR20120003458A (ko) * | 2009-04-24 | 2012-01-10 | 스미토모 덴키 고교 가부시키가이샤 | 프린트 배선판용 기판, 프린트 배선판, 및 그들의 제조방법 |
KR20120051991A (ko) * | 2010-11-15 | 2012-05-23 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조 방법 |
CN103929884A (zh) * | 2013-01-16 | 2014-07-16 | 深圳市牧泰莱电路技术有限公司 | 一种具有台阶槽孔的印刷电路板的制作方法 |
CN106134299B (zh) * | 2014-03-20 | 2018-10-23 | 住友电气工业株式会社 | 印刷线路板用基板、印刷线路板以及制造印刷线路板用基板的方法 |
WO2015147219A1 (ja) | 2014-03-27 | 2015-10-01 | 住友電気工業株式会社 | プリント配線板用基板、プリント配線板及びプリント配線板用基板の製造方法 |
JPWO2016117575A1 (ja) | 2015-01-22 | 2017-10-26 | 住友電気工業株式会社 | プリント配線板用基材、プリント配線板及びプリント配線板の製造方法 |
CN106793500B (zh) * | 2016-11-15 | 2021-11-26 | 智恩电子(大亚湾)有限公司 | 一种线路板文字印刷方法 |
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- 1995-08-11 KR KR1019950024814A patent/KR0172000B1/ko not_active IP Right Cessation
-
1996
- 1996-02-27 DE DE19607323A patent/DE19607323A1/de not_active Withdrawn
- 1996-02-28 US US08/608,503 patent/US5739055A/en not_active Expired - Lifetime
- 1996-03-05 JP JP8047153A patent/JP2796270B2/ja not_active Expired - Fee Related
- 1996-03-13 CN CN96101889A patent/CN1090439C/zh not_active Expired - Fee Related
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US5068714A (en) * | 1989-04-05 | 1991-11-26 | Robert Bosch Gmbh | Method of electrically and mechanically connecting a semiconductor to a substrate using an electrically conductive tacky adhesive and the device so made |
Also Published As
Publication number | Publication date |
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KR0172000B1 (ko) | 1999-05-01 |
JPH0955451A (ja) | 1997-02-25 |
CN1143304A (zh) | 1997-02-19 |
JP2796270B2 (ja) | 1998-09-10 |
US5739055A (en) | 1998-04-14 |
KR970014487A (ko) | 1997-03-29 |
DE19607323A1 (de) | 1997-02-13 |
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